xp_atom_reg.h

IBM source for pallas/vulcan/vesta

} XP_PCRSTCD_REG, *XP_PCRSTCD_REGP;

/*----------------------------------------------------------------------------+
|  PCRPID REGISTER
|  Location Address: 0x01FF
+----------------------------------------------------------------------------*/
typedef struct xp_pcrpid_type {
    unsigned res1        :19;
    unsigned pidv        :13;          /* pid value                          */
} XP_PCRPID_REG, *XP_PCRPID_REGP;
/*----------------------------------------------------------------------------+
|  CONFIGURATION 2 REGISTER
|  Location Address: 0x1000
+----------------------------------------------------------------------------*/
typedef struct xp_config2_type {
//ONLY make sens to XP0
    unsigned res1        :12;
    unsigned ved         : 1;          /* 1=vid unloader clear errors,0=send */
    unsigned res2        : 3;
    unsigned acpm        : 1;          /* 1=aud CPM mode disabled,0=enabled  */
    unsigned vcpm        : 1;          /* 1=vid CPM mode disabled,0=enabled  */
    unsigned res3        : 4;
    unsigned mwe         : 1;          /* 1=match word enabled,   0=disabled */
    unsigned salign      : 1;          /* 1=table sect word align,0=byte     */
//the following 8 fields only make sens to XP0
    unsigned res4        : 1;
    unsigned atsed       : 1;          /* 1=aud TS errs disabled, 0=enabled  */
    unsigned atbd        : 1;          /* 1=aud time base disable,0=enabled  */
    unsigned accd        : 1;          /* 1=aud chan chg disabled,0=enabled  */
    unsigned res5        : 1;
    unsigned vtsed       : 1;          /* 1=vid TS errs disabled, 0=enabled  */
    unsigned vtbd        : 1;          /* 1=vid time base disable,0=enabled  */
    unsigned vccd        : 1;          /* 1=vid chan chg disabled,0=enabled  */
} XP_CONFIG2_REG, *XP_CONFIG2_REGP;
/*----------------------------------------------------------------------------+
|  PACKET BUFFER LEVEL REGISTER
|  Location Address: 0x1002
+----------------------------------------------------------------------------*/
typedef struct xp_pbuflvl_type {
//the following 4 fields only make sense to XP0
    unsigned qpthres     : 4;          /* queue packet threshold             */
    unsigned apthres     : 4;          /* audio packet threshold             */
    unsigned vpthres     : 4;          /* video packet threshold             */
    unsigned res1        : 4;
    unsigned mlvl        : 4;          /* maximum packets seen in FIFO       */
    unsigned res2        : 2;
    unsigned cvp         :10;          /* bits for current packets           */
} XP_PBUFLVL_REG;
/*----------------------------------------------------------------------------+
|  BUCKET1 QUEUE REGISTER
|  Location Address: 0x1021
+----------------------------------------------------------------------------*/
#ifdef __DRV_FOR_PALLAS__
typedef struct xp_bucket1q_type {
    unsigned res1        :23;
    unsigned bqdt        : 1;          /* 1=packet delivered, 0=hdr/adapt    */
    unsigned res2        : 2;
    unsigned bvalid      : 1;          /* 1=bucket pid valid                 */
    unsigned indx        : 5;          /* bucket queue pid index             */
} XP_BUCKET1Q_REG, *XP_BUCKET1Q_REGP;
#else
typedef struct xp_bucket1q_type {
    unsigned res1        :19;
    unsigned bvalid      : 1;          /* 1=bucket pid valid                 */
    unsigned res2        : 3;
    unsigned bqdt        : 1;          /* 1=packet delivered, 0=hdr/adapt    */
    unsigned res3        : 2;
    unsigned indx        : 6;          /* bucket queue pid index             */
} XP_BUCKET1Q_REG, *XP_BUCKET1Q_REGP;
#endif
/*----------------------------------------------------------------------------+
|  FILTER REGISTERS
|  Location Address: 0x0100-0x011F
+----------------------------------------------------------------------------*/
typedef struct xp_pid_filter_type {
    /*------------------------------------------------------------------------+
    |  Bits 0-13 are valid for PIDS 24-27 only
    +------------------------------------------------------------------------*/
    unsigned dteic       : 1;          /* disable Transport Err indic check  */
    unsigned dafcc       : 1;          /* disable Adaptation Field Cnt check */
    unsigned ddpc        : 1;          /* disable Duplicate Packet Check     */
    unsigned tei         : 1;          /* comp to Transport Error indic      */
    unsigned pusi        : 1;          /* comp to Payload Unit Start indic   */
    unsigned tpi         : 1;          /* comp to Transport Polarity indic   */
    unsigned tsc         : 2;          /* comp to Transport Scrambling Cntl  */
    unsigned afc         : 2;          /* comp to Adaptation Field Cntl      */
    unsigned ccnt        : 4;          /* comp to Continuity Count           */
    /*------------------------------------------------------------------------+
    |  Bits 14-31 are valid for all PID registers
    +------------------------------------------------------------------------*/
    unsigned denbl       : 1;          /* 1=process packet by descrambler    */
    unsigned pesl        : 1;          /* 0=ts level, 1=PES descrambling     */
    unsigned kid         : 3;          /* indicates which key set to use     */
    unsigned pidv        :13;          /* pid value                          */
} XP_PID_FILTER_REG, *XP_PID_FILTER_REGP;
/*----------------------------------------------------------------------------+
|  QUEUE CONFIGA REGISTER
|  Location Address: 0x2200-0x223E (EVN)
+----------------------------------------------------------------------------*/
typedef struct xp_qconfiga_type {
    unsigned enda        :12;          /* address of top of queue            */
    unsigned starta      :12;          /* address of bottom of queue         */
    unsigned bthres      : 8;          /* num of blocks before an interrupt  */
} XP_QCONFIGA_REG, *XP_QCONFIGA_REGP;
/*----------------------------------------------------------------------------+
|  QUEUE CONFIGB REGISTER
|  Location Address: 0x2201-0x223F (ODD)
+----------------------------------------------------------------------------*/
typedef struct xp_qconfigb_type {
    unsigned rptr        :16;          /* address of the read pointer        */
    unsigned res1        : 1;
    unsigned scpc        : 1;          /* 1=generate interrupt for each table*/
    unsigned fsf         : 6;          /* first DRAM filter number           */
//make no sense to XP0
    unsigned bsel        : 2;          /* Bucket Que: 0=B1,1=B2,2=B1,3=B1/B2 */
    unsigned apus        : 1;          /* 1=wait for PUS first               */
    unsigned enbl        : 1;          /* 0=off, 1=use DRAM queues           */
    unsigned dtype       : 4;          /* types to dump                      */
} XP_QCONFIGB_REG, *XP_QCONFIGB_REGP;
/*----------------------------------------------------------------------------+
|  QUEUE STATUSB REGISTER
|  Location: 0x2801-0x287D (BY-4)
+----------------------------------------------------------------------------*/
typedef struct xp_qstatb_type {
    unsigned res         : 8;
    unsigned wptr        :24;          /* write pointer                      */
} XP_QSTATB_REG, *XP_QSTATB_REGP;
/*----------------------------------------------------------------------------+
|  QUEUE STATUSC REGISTER
|  Location: 0x2802-0x287E (BY-4)
+----------------------------------------------------------------------------*/
typedef struct xp_qstatc_type {
    unsigned crce        :32;          /* crc32 for current table section    */
} XP_QSTATC_REG, *XP_QSTATC_REGP;
/*----------------------------------------------------------------------------+
|  QUEUE STATUSD REGISTER
|  Location: 0x2803-0x287F (BY-4)
+----------------------------------------------------------------------------*/
typedef struct xp_qstatd_type {
    unsigned res1        : 8;
    unsigned wstart      :24;          /* write start of table section       */
} XP_QSTATD_REG, *XP_QSTATD_REGP;
/*----------------------------------------------------------------------------+
|  FILTER BLOCK CONTROL REGISTER
|  Location: 0x2380-0x23FC (BY-4)
+----------------------------------------------------------------------------*/
typedef struct xp_filter_control_type {
    unsigned res1        : 3;
    unsigned sfid        : 5;          /* group Id. of the filter block      */
    unsigned res2        :14;
    unsigned enbl        : 1;          /* 1=filter enabled, 0=disabled       */
    unsigned ncol        : 1;          /* 1=end of this column               */
    unsigned res3        : 2;
    unsigned nfilt       : 6;          /* next filter number                 */
} XP_FILTER_CONTROL_REG, *XP_FILTER_CONTROL_REGP;
#pragma pack()
#endif