📄 i2s_codec.txt
字号:
|L8.226|
0000e2 2006 MOVS r0,#6 ;601
0000e4 bd70 POP {r4-r6,pc}
|L8.230|
0000e6 2d01 CMP r5,#1 ;616
0000e8 d116 BNE |L8.280|
0000ea 2100 MOVS r1,#0 ;619
0000ec 2002 MOVS r0,#2 ;619
0000ee f7fff7ff BL ReadUnit
0000f2 b108 CBZ r0,|L8.248|
0000f4 2009 MOVS r0,#9 ;622
0000f6 bd70 POP {r4-r6,pc}
|L8.248|
0000f8 2101 MOVS r1,#1 ;625
0000fa 2004 MOVS r0,#4 ;625
0000fc f7fff7ff BL ReadUnit
000100 4914 LDR r1,|L8.340|
000102 4288 CMP r0,r1 ;626
000104 d001 BEQ |L8.266|
000106 200a MOVS r0,#0xa ;628
000108 bd70 POP {r4-r6,pc}
|L8.266|
00010a 2100 MOVS r1,#0 ;631
00010c 2004 MOVS r0,#4 ;631
00010e f7fff7ff BL ReadUnit
000112 7821 LDRB r1,[r4,#0] ;634 ; HeaderTabIndex
000114 4408 ADD r0,r0,r1 ;634
000116 7020 STRB r0,[r4,#0] ;634 ; HeaderTabIndex
|L8.280|
000118 2101 MOVS r1,#1 ;637
00011a 2004 MOVS r0,#4 ;637
00011c f7fff7ff BL ReadUnit
000120 490d LDR r1,|L8.344|
000122 4288 CMP r0,r1 ;638
000124 d001 BEQ |L8.298|
000126 2008 MOVS r0,#8 ;640
000128 bd70 POP {r4-r6,pc}
|L8.298|
00012a 2100 MOVS r1,#0 ;643
00012c 2004 MOVS r0,#4 ;643
00012e f7fff7ff BL ReadUnit
000132 6170 STR r0,[r6,#0x14] ;646 ; WAVE_Format
000134 7821 LDRB r1,[r4,#0] ;646 ; HeaderTabIndex
000136 6920 LDR r0,[r4,#0x10] ;646 ; DataStartAddr
000138 4408 ADD r0,r0,r1 ;646
00013a 6120 STR r0,[r4,#0x10] ;648 ; DataStartAddr
00013c 2000 MOVS r0,#0 ;648
00013e bd70 POP {r4-r6,pc}
;;;650
ENDP
|L8.320|
000140 00000000 DCD ||.data||
|L8.324|
000144 52494646 DCD 0x52494646
|L8.328|
000148 00000064 DCD ||.bss||+0x64
|L8.332|
00014c 57415645 DCD 0x57415645
|L8.336|
000150 666d7420 DCD 0x666d7420
|L8.340|
000154 66616374 DCD 0x66616374
|L8.344|
000158 64617461 DCD 0x64617461
AREA ||i.Media_BufferRead||, CODE, READONLY, ALIGN=2
Media_BufferRead PROC
;;;1555 void Media_BufferRead(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead)
;;;1556 {
000000 e92de92d PUSH {r3-r9,lr}
000004 4604 MOV r4,r0
000006 460d MOV r5,r1
;;;1557 GPIO_InitTypeDef GPIO_InitStructure;
;;;1558
;;;1559 /* Enable the FSMC that share a pin w/ I2C1 (LBAR) */
;;;1560 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
000008 f44ff44f MOV r9,#0x100
00000c 4616 MOV r6,r2 ;1556
00000e 2101 MOVS r1,#1
000010 4648 MOV r0,r9
000012 f7fff7ff BL RCC_AHBPeriphClockCmd
;;;1561
;;;1562 /* Enable FSMC Bank1_NOR Bank */
;;;1563 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
000016 2101 MOVS r1,#1
000018 2002 MOVS r0,#2
00001a f7fff7ff BL FSMC_NORSRAMCmd
;;;1564
;;;1565 /* NE2 configuration */
;;;1566 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00001e 2018 MOVS r0,#0x18
000020 f88df88d STRB r0,[sp,#3]
;;;1567 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000024 2003 MOVS r0,#3
000026 f88df88d STRB r0,[sp,#2]
;;;1568 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
;;;1569 GPIO_Init(GPIOG, &GPIO_InitStructure);
00002a f8dff8df LDR r8,|L9.128|
00002e f44ff44f MOV r7,#0x200 ;1568
000032 f8adf8ad STRH r7,[sp,#0] ;1568
000036 4669 MOV r1,sp
000038 4640 MOV r0,r8
00003a f7fff7ff BL GPIO_Init
;;;1570
;;;1571 /* Read the data */
;;;1572 while(NumByteToRead--)
00003e e004 B |L9.74|
|L9.64|
;;;1573 {
;;;1574 *pBuffer++ = *(vu8 *)ReadAddr++;
000040 f815f815 LDRB r1,[r5],#1
000044 1c60 ADDS r0,r4,#1
000046 7021 STRB r1,[r4,#0]
000048 4604 MOV r4,r0
|L9.74|
00004a 0030 MOVS r0,r6 ;1572
00004c f1a6f1a6 SUB r6,r6,#1 ;1572
000050 b2b6 UXTH r6,r6 ;1572
000052 d1f5 BNE |L9.64|
;;;1575 }
;;;1576
;;;1577 /* Disable FSMC Bank1_NOR Bank */
;;;1578 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, DISABLE);
000054 2100 MOVS r1,#0
000056 2002 MOVS r0,#2
000058 f7fff7ff BL FSMC_NORSRAMCmd
;;;1579
;;;1580 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
00005c 2010 MOVS r0,#0x10
00005e f88df88d STRB r0,[sp,#3]
;;;1581 GPIO_Init(GPIOG, &GPIO_InitStructure);
000062 4669 MOV r1,sp
000064 4640 MOV r0,r8
000066 f7fff7ff BL GPIO_Init
;;;1582 GPIO_SetBits(GPIOG, GPIO_Pin_9);
00006a 4639 MOV r1,r7
00006c 4640 MOV r0,r8
00006e f7fff7ff BL GPIO_SetBits
;;;1583
;;;1584 /* Disable the FSMC that share a pin w/ I2C1 (LBAR) */
;;;1585 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, DISABLE);
000072 2100 MOVS r1,#0
000074 4648 MOV r0,r9
000076 f7fff7ff BL RCC_AHBPeriphClockCmd
;;;1586 }
00007a e8bde8bd POP {r3-r9,pc}
;;;1587
ENDP
00007e 0000 DCW 0x0000
|L9.128|
000080 40012000 DCD 0x40012000
AREA ||i.Media_Init||, CODE, READONLY, ALIGN=2
Media_Init PROC
;;;1517 u32 Media_Init(void)
;;;1518 {
000000 b5f8 PUSH {r3-r7,lr}
;;;1519 GPIO_InitTypeDef GPIO_InitStructure;
;;;1520
;;;1521 /* Enable the FSMC that share a pin w/ I2C1 (LBAR) */
;;;1522 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
000002 2101 MOVS r1,#1
000004 020d LSLS r5,r1,#8
000006 4628 MOV r0,r5
000008 f7fff7ff BL RCC_AHBPeriphClockCmd
;;;1523
;;;1524 /* Initialize the FSMC NOR Flash Interface */
;;;1525 FSMC_NOR_Init();
00000c f7fff7ff BL FSMC_NOR_Init
;;;1526
;;;1527 /* Set the NOR read modes */
;;;1528 FSMC_NOR_ReturnToReadMode();
000010 f7fff7ff BL FSMC_NOR_ReturnToReadMode
;;;1529
;;;1530 /* Disable FSMC Bank1_NOR Bank */
;;;1531 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, DISABLE);
000014 2100 MOVS r1,#0
000016 2002 MOVS r0,#2
000018 f7fff7ff BL FSMC_NORSRAMCmd
;;;1532
;;;1533 /* NE2 configuration */
;;;1534 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00001c 2018 MOVS r0,#0x18
00001e f88df88d STRB r0,[sp,#3]
;;;1535 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000022 2003 MOVS r0,#3
000024 f88df88d STRB r0,[sp,#2]
;;;1536 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
;;;1537 GPIO_Init(GPIOG, &GPIO_InitStructure);
000028 4e08 LDR r6,|L10.76|
00002a 006c LSLS r4,r5,#1 ;1536
00002c f8adf8ad STRH r4,[sp,#0] ;1536
000030 4669 MOV r1,sp
000032 4630 MOV r0,r6
000034 f7fff7ff BL GPIO_Init
;;;1538 GPIO_SetBits(GPIOG, GPIO_Pin_9);
000038 4621 MOV r1,r4
00003a 4630 MOV r0,r6
00003c f7fff7ff BL GPIO_SetBits
;;;1539
;;;1540 /* Disable the FSMC that share a pin w/ I2C1 (LBAR) */
;;;1541 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, DISABLE);
000040 2100 MOVS r1,#0
000042 4628 MOV r0,r5
000044 f7fff7ff BL RCC_AHBPeriphClockCmd
;;;1542
;;;1543 return 0;
000048 2000 MOVS r0,#0
;;;1544 }
00004a bdf8 POP {r3-r7,pc}
;;;1545
ENDP
|L10.76|
00004c 40012000 DCD 0x40012000
AREA ||i.AudioFile_Init||, CODE, READONLY, ALIGN=2
AudioFile_Init PROC
;;;876 u32 AudioFile_Init(void)
;;;877 {
000000 b510 PUSH {r4,lr}
;;;878 u32 err = 0;
;;;879
;;;880 /* Initialize the media support */
;;;881 err = Media_Init();
000002 f7fff7ff BL Media_Init
;;;882
;;;883 /* Check if Memory initialization is OK */
;;;884 if (err != 0)
000006 b108 CBZ r0,|L11.12|
;;;885 {
;;;886 return 1;
000008 2001 MOVS r0,#1
;;;887 }
;;;888
;;;889 /* Read a Byte buffer and store it in the Header table*/
;;;890 Media_BufferRead(AudioFileHeader, AudioFileAddress, HEADER_SIZE);
;;;891
;;;892 /* Read and check the audio file Header */
;;;893 WaveFileStatus = I2S_CODEC_WaveParsing(AudioFileHeader);
;;;894
;;;895 /* Check if the selected file is a correct wave file */
;;;896 if(WaveFileStatus == Valid_WAVE_File)
;;;897 {
;;;898 /* Read and set the audio data length (/!\ data are counted as BYTES /!\) */
;;;899 AudioDataLength = WAVE_Format.DataSize ;
;;;900
;;;901 /* Read and set the audio frequency */
;;;902 i2saudiofreq = (u16)WAVE_Format.SampleRate;
;;;903
;;;904 /* Return the audio file length */
;;;905 return AudioDataLength;
;;;906 }
;;;907 else /* Wrong wave file */
;;;908 {
;;;909 return 2;
;;;910 }
;;;911 }
00000a bd10 POP {r4,pc}
|L11.12|
00000c 4c0a LDR r4,|L11.56|
00000e 2264 MOVS r2,#0x64 ;890
000010 68a1 LDR r1,[r4,#8] ;890 ; AudioFileAddress
000012 480a LDR r0,|L11.60|
000014 f7fff7ff BL Media_BufferRead
000018 4808 LDR r0,|L11.60|
00001a f7fff7ff BL I2S_CODEC_WaveParsing
00001e 70a0 STRB r0,[r4,#2] ;893 ; WaveFileStatus
000020 78a0 LDRB r0,[r4,#2] ;896 ; WaveFileStatus
000022 b930 CBNZ r0,|L11.50|
000024 4905 LDR r1,|L11.60|
000026 3164 ADDS r1,r1,#0x64 ;899
000028 6948 LDR r0,[r1,#0x14] ;899 ; WAVE_Format
00002a 60e0 STR r0,[r4,#0xc] ;902 ; AudioDataLength
00002c 6889 LDR r1,[r1,#8] ;902 ; WAVE_Format
00002e 80a1 STRH r1,[r4,#4] ;902 ; i2saudiofreq
000030 bd10 POP {r4,pc}
|L11.50|
000032 2002 MOVS r0,#2 ;909
000034 bd10 POP {r4,pc}
;;;912
ENDP
000036 0000 DCW 0x0000
|L11.56|
000038 00000000 DCD ||.data||
|L11.60|
00003c 00000000 DCD ||.bss||
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