📄 i2s_codec.txt
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;;;1094 counter += CODEC_WriteRegister(0x04, Standard);
00005e 4621 MOV r1,r4
000060 2004 MOVS r0,#4
000062 f7fff7ff BL CODEC_WriteRegister
000066 4605 MOV r5,r0
;;;1095 /* MCKI input frequency = 256.Fs */
;;;1096 counter += CODEC_WriteRegister(0x05, 0x00);
000068 2100 MOVS r1,#0
00006a 2005 MOVS r0,#5
00006c f7fff7ff BL CODEC_WriteRegister
000070 4405 ADD r5,r5,r0
;;;1097 /* VCOM Power up (PMVCM bit)*/
;;;1098 counter += CODEC_WriteRegister(0x00, 0x40);
000072 2140 MOVS r1,#0x40
000074 2000 MOVS r0,#0
|L6.118|
000076 f7fff7ff BL CODEC_WriteRegister
00007a 4405 ADD r5,r5,r0
;;;1099 }
;;;1100
;;;1101 /* Command the sending of dummy data */
;;;1102 SetVar_SendDummyData();
00007c f7fff7ff BL SetVar_SendDummyData
;;;1103
;;;1104 /* Enable the I2S2 TXE Interrupt => Generate the clocks*/
;;;1105 SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
000080 2201 MOVS r2,#1
000082 2171 MOVS r1,#0x71
000084 4640 MOV r0,r8
000086 f7fff7ff BL SPI_I2S_ITConfig
;;;1106
;;;1107 /* Extra Configuration (of the ALC) */
;;;1108 counter += CODEC_WriteRegister(0x06, 0x3C );
00008a 213c MOVS r1,#0x3c
00008c 2006 MOVS r0,#6
00008e f7fff7ff BL CODEC_WriteRegister
000092 4405 ADD r5,r5,r0
;;;1109 counter += CODEC_WriteRegister(0x08, 0xE1 );
000094 21e1 MOVS r1,#0xe1
000096 2008 MOVS r0,#8
000098 f7fff7ff BL CODEC_WriteRegister
00009c 4405 ADD r5,r5,r0
;;;1110 counter += CODEC_WriteRegister(0x0B, 0x00 );
00009e 2100 MOVS r1,#0
0000a0 200b MOVS r0,#0xb
0000a2 f7fff7ff BL CODEC_WriteRegister
0000a6 4405 ADD r5,r5,r0
;;;1111 counter += CODEC_WriteRegister(0x07, 0x20 );
0000a8 2120 MOVS r1,#0x20
0000aa 2007 MOVS r0,#7
0000ac f7fff7ff BL CODEC_WriteRegister
0000b0 4405 ADD r5,r5,r0
;;;1112 counter += CODEC_WriteRegister(0x09, 0xC1 );
0000b2 21c1 MOVS r1,#0xc1
0000b4 2009 MOVS r0,#9
0000b6 f7fff7ff BL CODEC_WriteRegister
0000ba 4405 ADD r5,r5,r0
;;;1113 counter += CODEC_WriteRegister(0x0C, 0xC1 );
0000bc 21c1 MOVS r1,#0xc1
0000be 200c MOVS r0,#0xc
0000c0 f7fff7ff BL CODEC_WriteRegister
0000c4 4405 ADD r5,r5,r0
;;;1114
;;;1115 /* Uncomment these lines and set the correct filters values to use the
;;;1116 codec digital filters (for more details refer to the codec datasheet) */
;;;1117 // /* Filter 1 programming as High Pass filter (Fc=500Hz, Fs=8KHz, K=20, A=1, B=1) */
;;;1118 // counter += CODEC_WriteRegister(0x1C, 0x01);
;;;1119 // counter += CODEC_WriteRegister(0x1D, 0x80);
;;;1120 // counter += CODEC_WriteRegister(0x1E, 0xA0);
;;;1121 // counter += CODEC_WriteRegister(0x1F, 0x0B);
;;;1122
;;;1123 // /* Filter 3 programming as Low Pass filter (Fc=20KHz, Fs=8KHz, K=40, A=1, B=1) */
;;;1124 // counter += CODEC_WriteRegister(0x1C, 0x01);
;;;1125 // counter += CODEC_WriteRegister(0x1D, 0x00);
;;;1126 // counter += CODEC_WriteRegister(0x1E, 0x01);
;;;1127 // counter += CODEC_WriteRegister(0x1F, 0x01);
;;;1128
;;;1129 // /* Equilizer programming BP filter (Fc1=20Hz, Fc2=2.5KHz, Fs=44.1KHz, K=40, A=?, B=?, C=?) */
;;;1130 // counter += CODEC_WriteRegister(0x16, 0x00);
;;;1131 // counter += CODEC_WriteRegister(0x17, 0x75);
;;;1132 // counter += CODEC_WriteRegister(0x18, 0x00);
;;;1133 // counter += CODEC_WriteRegister(0x19, 0x01);
;;;1134 // counter += CODEC_WriteRegister(0x1A, 0x00);
;;;1135 // counter += CODEC_WriteRegister(0x1B, 0x51);
;;;1136
;;;1137 /* MCKI is 256.Fs with no PLL */
;;;1138 counter += CODEC_WriteRegister(0x05, 0x00 );
0000c6 2100 MOVS r1,#0
0000c8 2005 MOVS r0,#5
0000ca f7fff7ff BL CODEC_WriteRegister
0000ce 4405 ADD r5,r5,r0
;;;1139 /* Switch control from DAC to Headphone */
;;;1140 counter += CODEC_WriteRegister(0x0F, 0x09 );
0000d0 2109 MOVS r1,#9
0000d2 200f MOVS r0,#0xf
0000d4 f7fff7ff BL CODEC_WriteRegister
0000d8 4405 ADD r5,r5,r0
;;;1141 /* Bass Boost and Demphasis enable */
;;;1142 counter += CODEC_WriteRegister(0x0E, 0x18 );
0000da 2118 MOVS r1,#0x18
0000dc 200e MOVS r0,#0xe
0000de f7fff7ff BL CODEC_WriteRegister
0000e2 4405 ADD r5,r5,r0
;;;1143 /* Left Channel Digital Volume control */
;;;1144 counter += CODEC_WriteRegister(0x0A, Volume);
0000e4 4649 MOV r1,r9
0000e6 200a MOVS r0,#0xa
0000e8 f7fff7ff BL CODEC_WriteRegister
0000ec 4405 ADD r5,r5,r0
;;;1145 /* Right Channel Digital Volume control */
;;;1146 counter += CODEC_WriteRegister(0x0D, Volume);
0000ee 4649 MOV r1,r9
0000f0 200d MOVS r0,#0xd
0000f2 f7fff7ff BL CODEC_WriteRegister
0000f6 4405 ADD r5,r5,r0
;;;1147 /* Power up MIN and DAC (PMMIN and PMDAC bits)*/
;;;1148 counter += CODEC_WriteRegister(0x00, 0x74);
0000f8 2174 MOVS r1,#0x74
0000fa 2000 MOVS r0,#0
0000fc f7fff7ff BL CODEC_WriteRegister
000100 4405 ADD r5,r5,r0
;;;1149 /* Enable Slave mode and Left/Right HP lines*/
;;;1150 counter += CODEC_WriteRegister(0x01, (0x30 | PLLMode));
000102 f046f046 ORR r1,r6,#0x30
000106 2001 MOVS r0,#1
000108 f7fff7ff BL CODEC_WriteRegister
00010c 4405 ADD r5,r5,r0
;;;1151 /* Exit HP mute mode */
;;;1152 counter += CODEC_WriteRegister(0x01, (0x70 | PLLMode));
00010e f046f046 ORR r1,r6,#0x70
000112 2001 MOVS r0,#1
000114 f7fff7ff BL CODEC_WriteRegister
000118 4405 ADD r5,r5,r0
|L6.282|
;;;1153 }
;;;1154
;;;1155 /* SPEAKER codec configuration */
;;;1156 if ((OutputDevice & OutputDevice_SPEAKER) != 0)
00011a 07f8 LSLS r0,r7,#31
00011c d06c BEQ |L6.504|
;;;1157 {
;;;1158 /* PLL Slave SD/WS reference mode ----------------------*/
;;;1159 if (I2S_MCLKOutput == I2S_MCLKOutput_Disable)
00011e f1baf1ba CMP r10,#0
000122 d112 BNE |L6.330|
;;;1160 {
;;;1161 /* Phillips(0x03)/MSB(0x02)/LSB(0x01) mode with no PLL */
;;;1162 counter += CODEC_WriteRegister(0x04, (Standard | 0x20));
000124 f044f044 ORR r1,r4,#0x20
000128 2004 MOVS r0,#4
00012a f7fff7ff BL CODEC_WriteRegister
00012e 1944 ADDS r4,r0,r5
;;;1163 /* MCKI input frequency = 256.Fs */
;;;1164 counter += CODEC_WriteRegister(0x05, 0x03);
000130 2103 MOVS r1,#3
000132 2005 MOVS r0,#5
000134 f7fff7ff BL CODEC_WriteRegister
000138 4404 ADD r4,r4,r0
;;;1165 /* VCOM Power up (PMVCM bit)*/
;;;1166 counter += CODEC_WriteRegister(0x00, 0x40);
00013a 2140 MOVS r1,#0x40
00013c 2000 MOVS r0,#0
00013e f7fff7ff BL CODEC_WriteRegister
000142 4404 ADD r4,r4,r0
;;;1167 /* Enable PLL*/
;;;1168 counter += CODEC_WriteRegister(0x01, 0x01);
000144 2101 MOVS r1,#1
000146 4608 MOV r0,r1
000148 e00b B |L6.354|
|L6.330|
;;;1169 }
;;;1170 /* Ext Slave mode with no PLL --------------------------*/
;;;1171 else
;;;1172 {
;;;1173 /* Phillips(0x03)/MSB(0x02)/LSB(0x01) mode with no PLL */
;;;1174 counter += CODEC_WriteRegister(0x04, Standard);
00014a 4621 MOV r1,r4
00014c 2004 MOVS r0,#4
00014e f7fff7ff BL CODEC_WriteRegister
000152 1944 ADDS r4,r0,r5
;;;1175 /* MCKI input frequency = 256.Fs */
;;;1176 counter += CODEC_WriteRegister(0x05, 0x00);
000154 2100 MOVS r1,#0
000156 2005 MOVS r0,#5
000158 f7fff7ff BL CODEC_WriteRegister
00015c 4404 ADD r4,r4,r0
;;;1177 /* VCOM Power up (PMVCM bit)*/
;;;1178 counter += CODEC_WriteRegister(0x00, 0x40);
00015e 2140 MOVS r1,#0x40
000160 2000 MOVS r0,#0
|L6.354|
000162 f7fff7ff BL CODEC_WriteRegister
000166 4404 ADD r4,r4,r0
;;;1179 }
;;;1180
;;;1181 /* Command the sending of dummy data */
;;;1182 SetVar_SendDummyData();
000168 f7fff7ff BL SetVar_SendDummyData
;;;1183
;;;1184 /* Enable the I2S2 TXE Interrupt => Generate the clocks*/
;;;1185 SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
00016c 2201 MOVS r2,#1
00016e 2171 MOVS r1,#0x71
000170 4640 MOV r0,r8
000172 f7fff7ff BL SPI_I2S_ITConfig
;;;1186
;;;1187 /* ReSelect the MCKI frequency (FS0-1 bits): 256.Fs */
;;;1188 counter += CODEC_WriteRegister(0x05, 0x02 );
000176 2102 MOVS r1,#2
000178 2005 MOVS r0,#5
00017a f7fff7ff BL CODEC_WriteRegister
00017e 4404 ADD r4,r4,r0
;;;1189 /* Set up the path "DAC->Speaker-Amp" with no power save (DACS and SPPSN bits) */
;;;1190 counter += CODEC_WriteRegister(0x02, 0x20 );
000180 2120 MOVS r1,#0x20
000182 2002 MOVS r0,#2
000184 f7fff7ff BL CODEC_WriteRegister
000188 4404 ADD r4,r4,r0
;;;1191 /* Speaker Gain (SPKG0-1 bits): Gain=+10.65dB(ALC off)/+12.65(ALC on) */
;;;1192 counter += CODEC_WriteRegister(0x03, 0x10);
00018a 2110 MOVS r1,#0x10
00018c 2003 MOVS r0,#3
00018e f7fff7ff BL CODEC_WriteRegister
000192 4404 ADD r4,r4,r0
;;;1193
;;;1194 /* Extra Configuration (of the ALC) */
;;;1195 counter += CODEC_WriteRegister(0x06, 0x3C );
000194 213c MOVS r1,#0x3c
000196 2006 MOVS r0,#6
000198 f7fff7ff BL CODEC_WriteRegister
00019c 4404 ADD r4,r4,r0
;;;1196 counter += CODEC_WriteRegister(0x08, 0xE1 );
00019e 21e1 MOVS r1,#0xe1
0001a0 2008 MOVS r0,#8
0001a2 f7fff7ff BL CODEC_WriteRegister
0001a6 4404 ADD r4,r4,r0
;;;1197 counter += CODEC_WriteRegister(0x0B, 0x00 );
0001a8 2100 MOVS r1,#0
0001aa 200b MOVS r0,#0xb
0001ac f7fff7ff BL CODEC_WriteRegister
0001b0 4404 ADD r4,r4,r0
;;;1198 counter += CODEC_WriteRegister(0x07, 0x20 );
0001b2 2120 MOVS r1,#0x20
0001b4 2007 MOVS r0,#7
0001b6 f7fff7ff BL CODEC_WriteRegister
0001ba 4404 ADD r4,r4,r0
;;;1199 counter += CODEC_WriteRegister(0x09, 0x91 );
0001bc 2191 MOVS r1,#0x91
0001be 2009 MOVS r0,#9
0001c0 f7fff7ff BL CODEC_WriteRegister
0001c4 4404 ADD r4,r4,r0
;;;1200 counter += CODEC_WriteRegister(0x0C, 0x91 );
0001c6 2191 MOVS r1,#0x91
0001c8 200c MOVS r0,#0xc
0001ca f7fff7ff BL CODEC_WriteRegister
0001ce 4404 ADD r4,r4,r0
;;;1201
;;;1202 /* Left Channel Digital Volume control */
;;;1203 counter += CODEC_WriteRegister(0x0A, Volume);
0001d0 4649 MOV r1,r9
0001d2 200a MOVS r0,#0xa
0001d4 f7fff7ff BL CODEC_WriteRegister
0001d8 4404 ADD r4,r4,r0
;;;1204 /* Right Channel Digital Volume control */
;;;1205 counter += CODEC_WriteRegister(0x0D, Volume);
0001da 4649 MOV r1,r9
0001dc 200d MOVS r0,#0xd
0001de f7fff7ff BL CODEC_WriteRegister
0001e2 4404 ADD r4,r4,r0
;;;1206 /* Power up Speaker and DAC (PMSPK and PMDAC bits)*/
;;;1207 counter += CODEC_WriteRegister(0x00, 0x54);
0001e4 2154 MOVS r1,#0x54
0001e6 2000 MOVS r0,#0
0001e8 f7fff7ff BL CODEC_WriteRegister
0001ec 4404 ADD r4,r4,r0
;;;1208 /* Set up the path "DAC -> Speaker-Amp" with no power save */
;;;1209 counter += CODEC_WriteRegister(0x02, 0xA0 /*0xA1*/);
0001ee 21a0 MOVS r1,#0xa0
0001f0 2002 MOVS r0,#2
0001f2 f7fff7ff BL CODEC_WriteRegister
0001f6 1905 ADDS r5,r0,r4
|L6.504|
;;;1210 }
;;;1211
;;;1212 /* Disable the I2S2 TXE Interrupt */
;;;1213 SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE);
0001f8 2200 MOVS r2,#0
0001fa 2171 MOVS r1,#0x71
0001fc 4640 MOV r0,r8
0001fe f7fff7ff BL SPI_I2S_ITConfig
;;;1214
;;;1215 /* Disable the sending of Dummy data */
;;;1216 ResetVar_SendDummyData();
000202 f7fff7ff BL ResetVar_SendDummyData
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