m32r.h

linux下的gcc编译器

   has an effect that depends on the machine mode it is used for.  */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)			\
do {									\
  if (GET_CODE (ADDR) == PRE_DEC					\
      || GET_CODE (ADDR) == PRE_INC					\
      || GET_CODE (ADDR) == POST_INC					\
      || GET_CODE (ADDR) == LO_SUM)					\
    goto LABEL;								\
} while (0)

/* Condition code usage.  */

/* Return nonzero if SELECT_CC_MODE will never return MODE for a
   floating point inequality comparison.  */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/

/* Costs.  */

/* ??? I'm quite sure I don't understand enough of the subtleties involved
   in choosing the right numbers to use here, but there doesn't seem to be
   enough documentation on this.  What I've done is define an insn to cost
   4 "units" and work from there.  COSTS_N_INSNS (N) is defined as (N) * 4 - 2
   so that seems reasonable.  Some values are supposed to be defined relative
   to each other and thus aren't necessarily related to COSTS_N_INSNS.  */

/* Compute the cost of computing a constant rtl expression RTX
   whose rtx-code is CODE.  The body of this macro is a portion
   of a switch statement.  If the code is computed here,
   return it with a return statement.  Otherwise, break from the switch.  */
/* Small integers are as cheap as registers.  4 byte values can be fetched
   as immediate constants - let's give that the cost of an extra insn.  */
#define CONST_COSTS(X, CODE, OUTER_CODE)			\
  case CONST_INT :						\
    if (INT16_P (INTVAL (X)))					\
      return 0;							\
    /* fall through */						\
  case CONST :							\
  case LABEL_REF :						\
  case SYMBOL_REF :						\
    return 4;							\
  case CONST_DOUBLE :						\
    {								\
      rtx high, low;						\
      split_double (X, &high, &low);				\
      return 4 * (!INT16_P (INTVAL (high))			\
		  + !INT16_P (INTVAL (low)));			\
    }

/* Compute the cost of an address.  */
#define ADDRESS_COST(ADDR) m32r_address_cost (ADDR)

/* Compute extra cost of moving data between one register class
   and another.  */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2

/* Compute the cost of moving data between registers and memory.  */
/* Memory is 3 times as expensive as registers.
   ??? Is that the right way to look at it?  */
#define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
(GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)

/* The cost of a branch insn.  */
/* A value of 2 here causes GCC to avoid using branches in comparisons like
   while (a < N && a).  Branches aren't that expensive on the M32R so
   we define this as 1.  Defining it as 2 had a heavy hit in fp-bit.c.  */
#define BRANCH_COST ((TARGET_BRANCH_COST) ? 2 : 1)

/* Provide the costs of a rtl expression.  This is in the body of a
   switch on CODE.  The purpose for the cost of MULT is to encourage
   `synth_mult' to find a synthetic multiply when reasonable.

   If we need more than 12 insns to do a multiply, then go out-of-line,
   since the call overhead will be < 10% of the cost of the multiply.  */
#define RTX_COSTS(X, CODE, OUTER_CODE)	\
  case MULT :				\
    return COSTS_N_INSNS (3);		\
  case DIV :				\
  case UDIV :				\
  case MOD :				\
  case UMOD :				\
    return COSTS_N_INSNS (10);

/* Nonzero if access to memory by bytes is slow and undesirable.
   For RISC chips, it means that access to memory by bytes is no
   better than access by words when possible, so grab a whole word
   and maybe make use of that.  */
#define SLOW_BYTE_ACCESS 1

/* Define this macro if it is as good or better to call a constant
   function address than to call an address kept in a register.  */
#define NO_FUNCTION_CSE

/* Define this macro if it is as good or better for a function to call
   itself with an explicit address than to call an address kept in a
   register.  */
#define NO_RECURSIVE_FUNCTION_CSE

/* When the `length' insn attribute is used, this macro specifies the
   value to be assigned to the address of the first insn in a
   function.  If not specified, 0 is used.  */
#define FIRST_INSN_ADDRESS m32r_first_insn_address ()


/* Section selection.  */

#define TEXT_SECTION_ASM_OP	"\t.section .text"
#define DATA_SECTION_ASM_OP	"\t.section .data"
#define RODATA_SECTION_ASM_OP	"\t.section .rodata"
#define BSS_SECTION_ASM_OP	"\t.section .bss"
#define SDATA_SECTION_ASM_OP	"\t.section .sdata"
#define SBSS_SECTION_ASM_OP	"\t.section .sbss"
/* This one is for svr4.h.  */
#undef  READONLY_DATA_SECTION_ASM_OP
#define READONLY_DATA_SECTION_ASM_OP	"\t.section .rodata"

/* A list of names for sections other than the standard two, which are
   `in_text' and `in_data'.  You need not define this macro
   on a system with no other sections (that GCC needs to use).  */
#undef  EXTRA_SECTIONS
#define EXTRA_SECTIONS in_sdata, in_sbss

/* One or more functions to be defined in "varasm.c".  These
   functions should do jobs analogous to those of `text_section' and
   `data_section', for your additional sections.  Do not define this
   macro if you do not define `EXTRA_SECTIONS'.  */
#undef  EXTRA_SECTION_FUNCTIONS
#define EXTRA_SECTION_FUNCTIONS	\
  SDATA_SECTION_FUNCTION	\
  SBSS_SECTION_FUNCTION

#define SDATA_SECTION_FUNCTION						\
void									\
sdata_section ()							\
{									\
  if (in_section != in_sdata)						\
    {									\
      fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP);		\
      in_section = in_sdata;						\
    }									\
}									\

#define SBSS_SECTION_FUNCTION						\
void									\
sbss_section ()								\
{									\
  if (in_section != in_sbss)						\
    {									\
      fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP);		\
      in_section = in_sbss;						\
    }									\
}									\

#undef  TARGET_ASM_SELECT_SECTION
#define TARGET_ASM_SELECT_SECTION  m32r_select_section

/* Define this macro if jump tables (for tablejump insns) should be
   output in the text section, along with the assembler instructions.
   Otherwise, the readonly data section is used.
   This macro is irrelevant if there is no separate readonly data section.  */
/*#define JUMP_TABLES_IN_TEXT_SECTION*/

/* Define this macro if references to a symbol must be treated
   differently depending on something about the variable or
   function named by the symbol (such as what section it is in).

   The macro definition, if any, is executed immediately after the
   rtl for DECL or other node is created.
   The value of the rtl will be a `mem' whose address is a
   `symbol_ref'.

   The usual thing for this macro to do is to store a flag in the
   `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
   name string in the `symbol_ref' (if one bit is not enough
   information).  */

#define SDATA_FLAG_CHAR '@'
/* Small objects are recorded with no prefix for space efficiency since
   they'll be the most common.  This isn't the case if the user passes
   -mmodel={medium|large} and one could choose to not mark symbols that
   are the default, but that complicates things.  */
/*#define SMALL_FLAG_CHAR '#'*/
#define MEDIUM_FLAG_CHAR '%'
#define LARGE_FLAG_CHAR '&'

#define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR)
/*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/
#define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
#define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR)
#define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR)
/* For string literals, etc.  */
#define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.')

#define ENCODED_NAME_P(SYMBOL_NAME) \
(SDATA_NAME_P (SYMBOL_NAME) \
 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \
 || MEDIUM_NAME_P (SYMBOL_NAME) \
 || LARGE_NAME_P (SYMBOL_NAME))

/* PIC */

/* The register number of the register used to address a table of static
   data addresses in memory.  In some cases this register is defined by a
   processor's ``application binary interface'' (ABI).  When this macro
   is defined, RTL is generated for this register once, as with the stack
   pointer and frame pointer registers.  If this macro is not defined, it
   is up to the machine-dependent files to allocate such a register (if
   necessary).  */
/*#define PIC_OFFSET_TABLE_REGNUM 12*/

/* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
   clobbered by calls.  Do not define this macro if PIC_OFFSET_TABLE_REGNUM
   is not defined.  */
/* This register is call-saved on the M32R.  */
/*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/

/* By generating position-independent code, when two different programs (A
   and B) share a common library (libC.a), the text of the library can be
   shared whether or not the library is linked at the same address for both
   programs.  In some of these environments, position-independent code
   requires not only the use of different addressing modes, but also
   special code to enable the use of these addressing modes.

   The FINALIZE_PIC macro serves as a hook to emit these special
   codes once the function is being compiled into assembly code, but not
   before.  (It is not done before, because in the case of compiling an
   inline function, it would lead to multiple PIC prologues being
   included in functions which used inline functions and were compiled to
   assembly language.)  */

/*#define FINALIZE_PIC m32r_finalize_pic ()*/

/* A C expression that is nonzero if X is a legitimate immediate
   operand on the target machine when generating position independent code.
   You can assume that X satisfies CONSTANT_P, so you need not
   check this.  You can also assume `flag_pic' is true, so you need not
   check it either.  You need not define this macro if all constants
   (including SYMBOL_REF) can be immediate operands when generating
   position independent code.  */
/*#define LEGITIMATE_PIC_OPERAND_P(X)*/

/* Control the assembler format that we output.  */

/* Output at beginning of assembler file.  */
#define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)

/* A C string constant describing how to begin a comment in the target
   assembler language.  The compiler assumes that the comment will
   end at the end of the line.  */
#define ASM_COMMENT_START ";"

/* Output to assembler file text saying following lines
   may contain character constants, extra white space, comments, etc.  */
#define ASM_APP_ON ""

/* Output to assembler file text saying following lines
   no longer contain unusual constructs.  */
#define ASM_APP_OFF ""

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.global\t"

/* This is how to output a reference to a user-level label named NAME.
   `assemble_name' uses this.  */
#undef  ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
  asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))

/* If -Os, don't force line number labels to begin at the beginning of
   the word; we still want the assembler to try to put things in parallel,
   should that be possible.
   For m32r/d, instructions are never in parallel (other than with a nop)
   and the simulator and stub both handle a breakpoint in the middle of
   a word so don't ever force line number labels to begin at the beginning
   of a word.  */

#undef	ASM_OUTPUT_SOURCE_LINE
#define ASM_OUTPUT_SOURCE_LINE(file, line)				\
  do									\
    {									\
      static int sym_lineno = 1;					\
      fprintf (file, ".stabn 68,0,%d,.LM%d-",				\
	       line, sym_lineno);					\
      assemble_name							\
	(file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));	\
      fprintf (file, (optimize_size || TARGET_M32R)			\
	       ? "\n\t.debugsym .LM%d\n"				\
	       : "\n.LM%d:\n",						\
	       sym_lineno);						\
      sym_lineno += 1;							\
    }									\
  while (0)

/* Store in OUTPUT a string (made with alloca) containing
   an assembler-name for a local static variable named NAME.
   LABELNO is an integer which is different for each call.  */
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)	\
  do							\
    {							\
      (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10);\
      sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO));	\
    }							\
  while (0)

/* How to refer to registers in assembler output.
   This sequence is indexed by compiler's hard-register-number (see above).  */
#ifndef SUBTARGET_REGISTER_NAMES
#define SUBTARGET_REGISTER_NAMES
#endif

#define REGISTER_NAMES					\
{							\
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",	\
  "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",	\
  "ap", "cbit", "a0"					\
  SUBTARGET_REGISTER_NAMES				\
}

/* If defined, a C initializer for an array of structures containing
   a name and a register number.  This macro defines additional names
   for hard registers, thus allowing the `asm' option in declarations
   to refer to registers using alternate names.  */
#ifndef SUBTARGET_ADDITIONAL_REGISTER_NAMES
#define SUBTARGET_ADDITIONAL_REGISTER_NAMES
#endif

#define ADDITIONAL_REGISTER_NAMES	\
{					\
  /*{ "gp", GP_REGNUM },*/		\
  { "r13", FRAME_POINTER_REGNUM },	\
  { "r14", RETURN_ADDR_REGNUM },	\
  { "r15", STACK_POINTER_REGNUM },	\
  SUBTARGET_ADDITIONAL_REGISTER_NAMES	\
}

/* A C expression which evaluates to true if CODE is a valid
   punctuation character for use in the `PRINT_OPERAND' macro.  */
extern char m32r_punct_chars[256];
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
  m32r_punct_chars[(unsigned char) (CHAR)]

/* Print operand X (an rtx) in assembler syntax to file FILE.
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
#define PRINT_OPERAND(FILE, X, CODE) \
  m32r_print_operand (FILE, X, CODE)

/* A C compound statement to output to stdio stream STREAM the
   assembler syntax for an instruction operand that is a memory
   reference whose address is ADDR.  ADDR is an RTL expression.  */
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
  m32r_print_operand_