📄 m32r.h
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/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a function whose data type is FNTYPE. For a library call, FNTYPE is 0. */#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \ ((CUM) = 0)/* The number of registers used for parameter passing. Local to this file. */#define M32R_MAX_PARM_REGS 4/* 1 if N is a possible register number for function argument passing. */#define FUNCTION_ARG_REGNO_P(N) \ ((unsigned) (N) < M32R_MAX_PARM_REGS)/* The ROUND_ADVANCE* macros are local to this file. *//* Round SIZE up to a word boundary. */#define ROUND_ADVANCE(SIZE) \ (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Round arg MODE/TYPE up to the next word boundary. */#define ROUND_ADVANCE_ARG(MODE, TYPE) \ ((MODE) == BLKmode \ ? ROUND_ADVANCE ((unsigned int) int_size_in_bytes (TYPE)) \ : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))/* Round CUM up to the necessary point for argument MODE/TYPE. */#define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)/* Return boolean indicating arg of type TYPE and mode MODE will be passed in a reg. This includes arguments that have to be passed by reference as the pointer to them is passed in a reg if one is available (and that is what we're given). This macro is only used in this file. */#define PASS_IN_REG_P(CUM, MODE, TYPE) \ (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)/* Determine where to put an argument to a function. Value is zero to push the argument on the stack, or a hard register in which to store the argument. MODE is the argument's machine mode. TYPE is the data type of the argument (as a tree). This is null for libcalls where that information may not be available. CUM is a variable of type CUMULATIVE_ARGS which gives info about the preceding args and about the function being called. NAMED is nonzero if this argument is a named parameter (otherwise it is an extra parameter matching an ellipsis). *//* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers and the rest are pushed. */#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \ ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0)/* A C expression for the number of words, at the beginning of an argument, must be put in registers. The value must be zero for arguments that are passed entirely in registers or that are entirely pushed on the stack. On some machines, certain arguments must be passed partially in registers and partially in memory. On these machines, typically the first @var{n} words of arguments are passed in registers, and the rest on the stack. If a multi-word argument (a @code{double} or a structure) crosses that boundary, its first few words must be passed in registers and the rest must be pushed. This macro tells the compiler when this occurs, and how many of the words should go in registers. */#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)/* A C expression that indicates when an argument must be passed by reference. If nonzero for an argument, a copy of that argument is made in memory and a pointer to the argument is passed instead of the argument itself. The pointer is passed in whatever way is appropriate for passing a pointer to that type. *//* All arguments greater than 8 bytes are passed this way. */#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ ((TYPE) && int_size_in_bytes (TYPE) > 8)/* Update the data in CUM to advance over an argument of mode MODE and data type TYPE. (TYPE is null for libcalls where that information may not be available.) */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \ + ROUND_ADVANCE_ARG ((MODE), (TYPE))))/* If defined, a C expression that gives the alignment boundary, in bits, of an argument with the specified mode and type. If it is not defined, PARM_BOUNDARY is used for all arguments. */#if 0/* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \(((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \ ? PARM_BOUNDARY \ : 2 * PARM_BOUNDARY)#endif/* This macro offers an alternative to using `__builtin_saveregs' and defining the macro `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register arguments into the stack so that all the arguments appear to have been passed consecutively on the stack. Once this is done, you can use the standard implementation of varargs that works for machines that pass all their arguments on the stack. The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, containing the values that obtain after processing of the named arguments. The arguments MODE and TYPE describe the last named argument--its machine mode and its data type as a tree node. The macro implementation should do two things: first, push onto the stack all the argument registers *not* used for the named arguments, and second, store the size of the data thus pushed into the `int'-valued variable whose name is supplied as the argument PRETEND_SIZE. The value that you store here will serve as additional offset for setting up the stack frame. If the argument NO_RTL is nonzero, it means that the arguments of the function are being analyzed for the second time. This happens for an inline function, which is not actually compiled until the end of the source file. The macro `SETUP_INCOMING_VARARGS' should not generate any instructions in this case. */#define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \ m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)/* Implement `va_arg'. */#define EXPAND_BUILTIN_VA_ARG(valist, type) \ m32r_va_arg (valist, type)/* Function results. *//* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)/* Define how to find the value returned by a library function assuming the value has mode MODE. */#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)/* 1 if N is a possible register number for a function value as seen by the caller. *//* ??? What about r1 in DI/DF values. */#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)/* A C expression which can inhibit the returning of certain function values in registers, based on the type of value. A nonzero value says to return the function value in memory, just as large structures are always returned. Here TYPE will be a C expression of type `tree', representing the data type of the value. */#define RETURN_IN_MEMORY(TYPE) \(int_size_in_bytes (TYPE) > 8)/* Tell GCC to use RETURN_IN_MEMORY. */#define DEFAULT_PCC_STRUCT_RETURN 0/* Register in which address to store a structure value is passed to a function, or 0 to use `invisible' first argument. */#define STRUCT_VALUE 0/* Function entry and exit. *//* Initialize data used by insn expanders. This is called from init_emit, once for each function, before code is generated. */#define INIT_EXPANDERS m32r_init_expanders ()/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, the stack pointer does not matter. The value is tested only in functions that have frame pointers. No definition is equivalent to always zero. */#define EXIT_IGNORE_STACK 1/* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */#define FUNCTION_PROFILER(FILE, LABELNO) abort ()/* Trampolines. *//* On the M32R, the trampoline is ld24 r7,STATIC ld24 r6,FUNCTION jmp r6 nop ??? Need addr32 support.*//* Length in bytes of the trampoline for entering a nested function. */#define TRAMPOLINE_SIZE 12/* Emit RTL insns to initialize the variable parts of a trampoline. FNADDR is an RTX for the address of the function's pure code. CXT is an RTX for the static chain value for the function. */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \do { \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \ plus_constant ((CXT), 0xe7000000)); \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \ plus_constant ((FNADDR), 0xe6000000)); \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \ GEN_INT (0x1fc67000)); \ emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \} while (0)/* Library calls. *//* Generate calls to memcpy, memcmp and memset. */#define TARGET_MEM_FUNCTIONS/* Addressing modes, and classification of registers for them. *//* Maximum number of registers that can appear in a valid memory address. */#define MAX_REGS_PER_ADDRESS 1/* We have post-inc load and pre-dec,pre-inc store, but only for 4 byte vals. */#define HAVE_PRE_DECREMENT 1#define HAVE_PRE_INCREMENT 1#define HAVE_POST_INCREMENT 1/* Recognize any constant value that is a valid address. */#define CONSTANT_ADDRESS_P(X) \(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)/* Nonzero if the constant value X is a legitimate general operand. We don't allow (plus symbol large-constant) as the relocations can't describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations. We allow all CONST_DOUBLE's as the md file patterns will force the constant to memory if they can't handle them. */#define LEGITIMATE_CONSTANT_P(X) \(! (GET_CODE (X) == CONST \ && GET_CODE (XEXP (X, 0)) == PLUS \ && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \ && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. */#ifdef REG_OK_STRICT/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)#else/* Nonzero if X is a hard reg that can be used as a base reg or if it is a pseudo reg. */#define REG_OK_FOR_BASE_P(X) \(GPR_P (REGNO (X)) \ || (REGNO (X)) == ARG_POINTER_REGNUM \ || REGNO (X) >= FIRST_PSEUDO_REGISTER)/* Nonzero if X is a hard reg that can be used as an index or if it is a pseudo reg. */#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. *//* Local to this file. */#define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X))/* Local to this file. */#define RTX_OK_FOR_OFFSET_P(X) \(GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))/* Local to this file. */#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \(GET_CODE (X) == PLUS \ && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))/* Local to this file. *//* For LO_SUM addresses, do not allow them if the MODE is > 1 word, since more than one instruction will be required. */#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \(GET_CODE (X) == LO_SUM \ && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ && CONSTANT_P (XEXP (X, 1)))/* Local to this file. *//* Is this a load and increment operation. */#define LOAD_POSTINC_P(MODE, X) \(((MODE) == SImode || (MODE) == SFmode) \ && GET_CODE (X) == POST_INC \ && GET_CODE (XEXP (X, 0)) == REG \ && RTX_OK_FOR_BASE_P (XEXP (X, 0)))/* Local to this file. *//* Is this an increment/decrement and store operation. */#define STORE_PREINC_PREDEC_P(MODE, X) \(((MODE) == SImode || (MODE) == SFmode) \ && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \ && GET_CODE (XEXP (X, 0)) == REG \ && RTX_OK_FOR_BASE_P (XEXP (X, 0)))#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ if (RTX_OK_FOR_BASE_P (X)) \ goto ADDR; \ if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \ goto ADDR; \ if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \ goto ADDR; \ if (LOAD_POSTINC_P ((MODE), (X))) \ goto ADDR; \ if (STORE_PREINC_PREDEC_P ((MODE), (X))) \ goto ADDR; \}/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. ??? Is there anything useful we can do here for the M32R? */#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)/* Go to LABEL if ADDR (a legitimate address expression)
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