📄 m32r.h
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/* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu. Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.This file is part of GCC.GCC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GCC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GCC; see the file COPYING. If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA. *//* Things to do:- longlong.h?*/#undef SWITCH_TAKES_ARG#undef WORD_SWITCH_TAKES_ARG#undef HANDLE_SYSV_PRAGMA#undef SIZE_TYPE#undef PTRDIFF_TYPE#undef WCHAR_TYPE#undef WCHAR_TYPE_SIZE#undef ASM_FILE_START#undef ASM_OUTPUT_EXTERNAL_LIBCALL#undef TARGET_VERSION#undef CPP_SPEC#undef ASM_SPEC#undef LINK_SPEC#undef STARTFILE_SPEC#undef ENDFILE_SPEC#undef SUBTARGET_SWITCHES/* M32R/X overrides. *//* Print subsidiary information on the compiler version in use. */#define TARGET_VERSION fprintf (stderr, " (m32r/x)");/* Additional flags for the preprocessor. */#define CPP_CPU_SPEC "%{m32rx:-D__M32RX__} %{m32r:-U__M32RX__}"/* Assembler switches. */#define ASM_CPU_SPEC \"%{m32r} %{m32rx} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts"/* Use m32rx specific crt0/crtinit/crtfini files. */#define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"#define ENDFILE_CPU_SPEC "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"/* Extra machine dependent switches. */#define SUBTARGET_SWITCHES \ { "32rx", TARGET_M32RX_MASK, "Compile for the m32rx" }, \ { "32r", -TARGET_M32RX_MASK, "" },/* Define this macro as a C expression for the initializer of an array of strings to tell the driver program which options are defaults for this target and thus do not need to be handled specially when using `MULTILIB_OPTIONS'. */#define SUBTARGET_MULTILIB_DEFAULTS , "m32r"/* Number of additional registers the subtarget defines. */#define SUBTARGET_NUM_REGISTERS 1/* 1 for registers that cannot be allocated. */#define SUBTARGET_FIXED_REGISTERS , 1/* 1 for registers that are not available across function calls. */#define SUBTARGET_CALL_USED_REGISTERS , 1/* Order to allocate model specific registers. */#define SUBTARGET_REG_ALLOC_ORDER , 19/* Registers which are accumulators. */#define SUBTARGET_REG_CLASS_ACCUM 0x80000/* All registers added. */#define SUBTARGET_REG_CLASS_ALL SUBTARGET_REG_CLASS_ACCUM/* Additional accumulator registers. */#define SUBTARGET_ACCUM_P(REGNO) ((REGNO) == 19)/* Define additional register names. */#define SUBTARGET_REGISTER_NAMES , "a1"/* end M32R/X overrides. *//* Print subsidiary information on the compiler version in use. */#ifndef TARGET_VERSION#define TARGET_VERSION fprintf (stderr, " (m32r)")#endif/* Switch Recognition by gcc.c. Add -G xx support */#undef SWITCH_TAKES_ARG#define SWITCH_TAKES_ARG(CHAR) \(DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')/* Names to predefine in the preprocessor for this target machine. *//* __M32R__ is defined by the existing compiler so we use that. */#define CPP_PREDEFINES "-Acpu=m32r -Amachine=m32r -D__M32R__"/* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the specification name, and a string constant that used by the GNU CC driver program. Do not define this macro if it does not need to do anything. */#ifndef SUBTARGET_EXTRA_SPECS#define SUBTARGET_EXTRA_SPECS#endif#ifndef ASM_CPU_SPEC#define ASM_CPU_SPEC ""#endif#ifndef CPP_CPU_SPEC#define CPP_CPU_SPEC ""#endif#ifndef CC1_CPU_SPEC#define CC1_CPU_SPEC ""#endif#ifndef LINK_CPU_SPEC#define LINK_CPU_SPEC ""#endif#ifndef STARTFILE_CPU_SPEC#define STARTFILE_CPU_SPEC "%{!shared:crt0.o%s} crtinit.o%s"#endif#ifndef ENDFILE_CPU_SPEC#define ENDFILE_CPU_SPEC "-lgloss crtfini.o%s"#endif#ifndef RELAX_SPEC#if 0 /* not supported yet */#define RELAX_SPEC "%{mrelax:-relax}"#else#define RELAX_SPEC ""#endif#endif#define EXTRA_SPECS \ { "asm_cpu", ASM_CPU_SPEC }, \ { "cpp_cpu", CPP_CPU_SPEC }, \ { "cc1_cpu", CC1_CPU_SPEC }, \ { "link_cpu", LINK_CPU_SPEC }, \ { "startfile_cpu", STARTFILE_CPU_SPEC }, \ { "endfile_cpu", ENDFILE_CPU_SPEC }, \ { "relax", RELAX_SPEC }, \ SUBTARGET_EXTRA_SPECS#define CC1_SPEC "%{G*} %(cc1_cpu)"/* Options to pass on to the assembler. */#undef ASM_SPEC#define ASM_SPEC "%{v} %(asm_cpu) %(relax)"#undef ASM_FINAL_SPEC#define LINK_SPEC "%{v} %(link_cpu) %(relax)"#undef STARTFILE_SPEC#define STARTFILE_SPEC "%(startfile_cpu)"#undef ENDFILE_SPEC#define ENDFILE_SPEC "%(endfile_cpu)"#undef LIB_SPEC/* Run-time compilation parameters selecting different hardware subsets. */extern int target_flags;/* If nonzero, tell the linker to do relaxing. We don't do anything with the option, other than recognize it. LINK_SPEC handles passing -relax to the linker. This can cause incorrect debugging information as line numbers may turn out wrong. This shouldn't be specified unless accompanied with -O2 [where the user expects debugging information to be less accurate]. */#define TARGET_RELAX_MASK (1 << 0)/* For miscellaneous debugging purposes. */#define TARGET_DEBUG_MASK (1 << 1)#define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)/* Align loops to 32 byte boundaries (cache line size). *//* ??? This option is experimental and is not documented. */#define TARGET_ALIGN_LOOPS_MASK (1 << 2)#define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)/* Change issue rate. */#define TARGET_LOW_ISSUE_RATE_MASK (1 << 3)#define TARGET_LOW_ISSUE_RATE (target_flags & TARGET_LOW_ISSUE_RATE_MASK)/* Change branch cost */#define TARGET_BRANCH_COST_MASK (1 << 4)#define TARGET_BRANCH_COST (target_flags & TARGET_BRANCH_COST_MASK)/* Target machine to compile for. */#define TARGET_M32R 1/* Support extended instruction set. */#define TARGET_M32RX_MASK (1 << 5)#define TARGET_M32RX (target_flags & TARGET_M32RX_MASK)#undef TARGET_M32R#define TARGET_M32R (! TARGET_M32RX)/* Macro to define tables used to set the flags. This is a list in braces of pairs in braces, each pair being { "NAME", VALUE } where VALUE is the bits to set or minus the bits to clear. An empty string NAME is used to identify the default VALUE. */#ifndef SUBTARGET_SWITCHES#define SUBTARGET_SWITCHES#endif#ifndef TARGET_DEFAULT#define TARGET_DEFAULT 0#endif#define TARGET_SWITCHES \{ \/* { "relax", TARGET_RELAX_MASK, "" }, \ { "no-relax", -TARGET_RELAX_MASK, "" },*/ \ { "debug", TARGET_DEBUG_MASK, \ N_("Display compile time statistics") }, \ { "align-loops", TARGET_ALIGN_LOOPS_MASK, \ N_("Align all loops to 32 byte boundary") }, \ { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK, "" }, \ { "issue-rate=1", TARGET_LOW_ISSUE_RATE_MASK, \ N_("Only issue one instruction per cycle") }, \ { "issue-rate=2", -TARGET_LOW_ISSUE_RATE_MASK, "" }, \ { "branch-cost=1", TARGET_BRANCH_COST_MASK, \ N_("Prefer branches over conditional execution") }, \ { "branch-cost=2", -TARGET_BRANCH_COST_MASK, "" }, \ SUBTARGET_SWITCHES \ { "", TARGET_DEFAULT, "" } \}extern const char * m32r_model_string;extern const char * m32r_sdata_string;#ifndef SUBTARGET_OPTIONS#define SUBTARGET_OPTIONS#endif#define TARGET_OPTIONS \{ \ { "model=", & m32r_model_string, \ N_("Code size: small, medium or large") }, \ { "sdata=", & m32r_sdata_string, \ N_("Small data area: none, sdata, use") } \ SUBTARGET_OPTIONS \}/* Code Models Code models are used to select between two choices of two separate possibilities (address space size, call insn to use): small: addresses use 24 bits, use bl to make calls medium: addresses use 32 bits, use bl to make calls (*1) large: addresses use 32 bits, use seth/add3/jl to make calls (*2) The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but using this one doesn't make much sense. (*1) The linker may eventually be able to relax seth/add3 -> ld24. (*2) The linker may eventually be able to relax seth/add3/jl -> bl. Internally these are recorded as TARGET_ADDR{24,32} and TARGET_CALL{26,32}. The __model__ attribute can be used to select the code model to use when accessing particular objects. */enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };extern enum m32r_model m32r_model;#define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)#define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)#define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)#define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)#define TARGET_ADDR32 (! TARGET_ADDR24)#define TARGET_CALL26 (! TARGET_CALL32)#define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)/* The default is the small model. */#ifndef M32R_MODEL_DEFAULT#define M32R_MODEL_DEFAULT "small"#endif/* Small Data Area The SDA consists of sections .sdata, .sbss, and .scommon. .scommon isn't a real section, symbols in it have their section index set to SHN_M32R_SCOMMON, though support for it exists in the linker script. Two switches control the SDA: -G NNN - specifies the maximum size of variable to go in the SDA -msdata=foo - specifies how such variables are handled -msdata=none - small data area is disabled -msdata=sdata - small data goes in the SDA, special code isn't generated to use it, and special relocs aren't generated -msdata=use - small data goes in the SDA, special code is generated to use the SDA and special relocs are generated The SDA is not multilib'd, it isn't necessary. MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use -msdata=use will successfully link with them (references in header files will cause the compiler to emit code that refers to library objects in .data). ??? There can be a problem if the user passes a -G value greater than the default and a library object in a header file is that size. The default is 8 so this should be rare - if it occurs the user is required to rebuild the libraries or use a smaller value for -G.*//* Maximum size of variables that go in .sdata/.sbss. The -msdata=foo switch also controls how small variables are handled. */#ifndef SDATA_DEFAULT_SIZE#define SDATA_DEFAULT_SIZE 8#endifextern int g_switch_value; /* value of the -G xx switch */extern int g_switch_set; /* whether -G xx was passed. */enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };extern enum m32r_sdata m32r_sdata;
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