dsp16xx.md

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          }
          else
            return \"%w0=%1\;%0=0\";
          default:
            abort();
      }
  }"
  [(set_attr "type" "data_move_2,data_move_2,data_move_2")])

;;
;; Floating point conversions
;;
(define_expand "floathihf2"
  [(set (match_operand:HF 0 "register_operand" "")
	(float:HF (match_operand:HI 1 "register_operand" "")))]
  ""
  "
{
  if (!dsp16xx_floathihf2_libcall)
    dsp16xx_floathihf2_libcall = gen_rtx_SYMBOL_REF (Pmode, FLOATHIHF2_LIBCALL);
  
  emit_library_call (dsp16xx_floathihf2_libcall, 1, HFmode, 1,
		     operands[1], HImode);
  emit_move_insn (operands[0], hard_libcall_value(HFmode));
  DONE;
}")

(define_expand "fix_trunchfhi2"
  [(set (match_operand:HI 0 "register_operand" "")
	(fix:HI (match_operand:HF 1 "register_operand" "")))]
  ""
  "
{
  if (!dsp16xx_fixhfhi2_libcall)
    dsp16xx_fixhfhi2_libcall = gen_rtx_SYMBOL_REF (Pmode, FIXHFHI2_LIBCALL);
  
  emit_library_call (dsp16xx_fixhfhi2_libcall, 1, HImode, 1,
		     operands[1], HFmode);
  emit_move_insn (operands[0], hard_libcall_value(HImode));
  DONE;
}")

(define_expand "fixuns_trunchfhi2"
  [(set (match_operand:HI 0 "register_operand" "")
	(unsigned_fix:HI (match_operand:HF 1 "register_operand" "")))]
  ""
  "
{
  rtx reg1 = gen_reg_rtx (HFmode);
  rtx reg2 = gen_reg_rtx (HFmode);
  rtx reg3 = gen_reg_rtx (HImode);
  rtx label1 = gen_label_rtx ();
  rtx label2 = gen_label_rtx ();
  REAL_VALUE_TYPE offset;

  real_2expN (&offset, 31);

  if (reg1)			/* turn off complaints about unreached code */
    {
      emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, HFmode));
      do_pending_stack_adjust ();

      emit_insn (gen_cmphf (operands[1], reg1));
      emit_jump_insn (gen_bge (label1));

      emit_insn (gen_fix_trunchfhi2 (operands[0], operands[1]));
      emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
				   gen_rtx_LABEL_REF (VOIDmode, label2)));
      emit_barrier ();

      emit_label (label1);
      emit_insn (gen_subhf3 (reg2, operands[1], reg1));
      emit_move_insn (reg3, GEN_INT (0x80000000));;

      emit_insn (gen_fix_trunchfhi2 (operands[0], reg2));
      emit_insn (gen_iorhi3 (operands[0], operands[0], reg3));

      emit_label (label2);

      /* allow REG_NOTES to be set on last insn (labels don't have enough
	 fields, and can't be used for REG_NOTES anyway).  */
      emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
      DONE;
    }
}")

;;
;; SHIFT INSTRUCTIONS
;;

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 1)))]
  ""
  "%0=%1>>1"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 4)))]
  ""
  "%0=%1>>4"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 8)))]
  ""
  "%0=%1>>8"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 16)))]
  ""
  "%0=%1>>16"
  [(set_attr "type" "special")])

;;
;; Arithmetic Right shift

(define_expand "ashrhi3"
  [(set (match_operand:HI 0 "register_operand" "")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "")
                     (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!TARGET_BMU)
  {
      /* If we are shifting by a constant we can do it in 1 or more
	 1600 core shift instructions. The core instructions can
	 shift by 1, 4, 8, or 16.  */
      
      if (GET_CODE(operands[2]) == CONST_INT)
	;
      else
      {
	rtx label1 = gen_label_rtx ();
	rtx label2 = gen_label_rtx ();

#if 0
	if (!dsp16xx_ashrhi3_libcall)
	  dsp16xx_ashrhi3_libcall
	    = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL);

	  emit_library_call (dsp16xx_ashrhi3_libcall, 1, HImode, 2,
			     operands[1], HImode,
			     operands[2], QImode);
	  emit_move_insn (operands[0], hard_libcall_value(HImode));
	  DONE;
#else
	do_pending_stack_adjust ();
	emit_insn (gen_tstqi (operands[2]));
	emit_jump_insn (gen_bne (label1));
	emit_move_insn (operands[0], operands[1]);
	emit_jump_insn (gen_jump (label2));
	emit_barrier ();
	emit_label (label1);

	if (GET_CODE(operands[2]) != MEM)
	  {
	    rtx stack_slot;
	    
	    stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
	    stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
	    emit_move_insn (stack_slot, operands[2]);
	    operands[2] = stack_slot;
	  }

	emit_insn (gen_match_ashrhi3_nobmu (operands[0], operands[1], operands[2]));
	emit_label (label2);
	DONE;
#endif
      }
  }
}")

(define_insn "match_ashrhi3_bmu"
  [(set (match_operand:HI 0 "register_operand" "=A,A,A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A,A,!A")
                     (match_operand:QI 2 "nonmemory_operand" "B,I,h")))]
  "TARGET_BMU"
  "@
   %0=%1>>%2
   %0=%1>>%H2
   %0=%1>>%2"
  [(set_attr "type" "shift,shift_i,shift")])

(define_insn "match_ashrhi3_nobmu"
  [(set (match_operand:HI 0 "register_operand" "=A,A")
        (ashiftrt:HI (match_operand:HI 1 "register_operand" "A,0")
                     (match_operand:QI 2 "general_operand" "n,m")))]
  "!TARGET_BMU"
  "*
{
  if (which_alternative == 0)
    {
      emit_1600_core_shift (ASHIFTRT, operands, INTVAL(operands[2]));
      return \"\";
    }
  else
    {
      output_asm_insn (\"cloop=%2\", operands);
      output_asm_insn (\"do 0 {\", operands);
      output_asm_insn (\"%0=%0>>1\", operands);
      return \"}\";
    }
}")
		   


;;
;; Logical Right Shift

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 1)))]
  "!TARGET_BMU"
  "%0=%1>>1\;%0=%b0&0x7fff"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 4)))]
  "!TARGET_BMU"
  "%0=%1>>4\;%0=%b0&0x0fff"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 8)))]
  "!TARGET_BMU"
  "%0=%1>>8\;%0=%b0&0x00ff"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
                     (const_int 16)))]
  "!TARGET_BMU"
  "%0=%1>>16\;%0=%b0&0x0000"
  [(set_attr "type" "special")])

(define_expand "lshrhi3"
  [(set (match_operand:HI 0 "register_operand" "")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "")
                     (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!TARGET_BMU)
    {
      /* If we are shifting by a constant we can do it in 1 or more
	 1600 core shift instructions. The core instructions can
	 shift by 1, 4, 8, or 16.  */
      
      if (GET_CODE(operands[2]) == CONST_INT)
	emit_insn (gen_match_lshrhi3_nobmu (operands[0], operands[1], operands[2]));	
      else
	{
	  rtx label1 = gen_label_rtx ();
	  rtx label2 = gen_label_rtx ();
#if 0
	  if (!dsp16xx_lshrhi3_libcall)
	    dsp16xx_lshrhi3_libcall
	      = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL);
	  
	  emit_library_call (dsp16xx_lshrhi3_libcall, 1, HImode, 2,
			     operands[1], HImode,
			     operands[2], QImode);
	  emit_move_insn (operands[0], hard_libcall_value(HImode));
	  DONE;
#else
	  do_pending_stack_adjust ();
	  emit_insn (gen_tstqi (operands[2]));
	  emit_jump_insn (gen_bne (label1));
	  emit_move_insn (operands[0], operands[1]);
	  emit_jump_insn (gen_jump (label2));
	  emit_barrier ();
	  emit_label (label1);

	  if (GET_CODE(operands[2]) != MEM)
	    {
	      rtx stack_slot;
	    
	      stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
	      stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
	      emit_move_insn (stack_slot, operands[2]);
	      operands[2] = stack_slot;
	    }

	  emit_insn (gen_match_lshrhi3_nobmu (operands[0], operands[1], operands[2]));
	  emit_label (label2);
	  DONE;
#endif
	}
    }
}")

(define_insn "match_lshrhi3"
  [(set (match_operand:HI 0 "register_operand" "=A,A,A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A,A,!A")
                     (match_operand:QI 2 "nonmemory_operand" "B,I,h")))]
  "TARGET_BMU"
  "@
   %0=%1>>>%2
   %0=%1>>>%H2
   %0=%1>>>%2"
  [(set_attr "type" "shift,shift_i,shift")])

(define_insn "match_lshrhi3_nobmu"
  [(set (match_operand:HI 0 "register_operand" "=A,A")
        (lshiftrt:HI (match_operand:HI 1 "register_operand" "A,0")
                     (match_operand:QI 2 "general_operand" "n,m")))
   (clobber (match_scratch:QI 3 "=X,Y"))]
  "!TARGET_BMU"
  "*
{
  if (which_alternative == 0)
    {
      emit_1600_core_shift (LSHIFTRT, operands, INTVAL(operands[2]));
      return \"\";
    }
  else
    {
      output_asm_insn (\"%3=psw\;psw=0\",operands);
      output_asm_insn (\"cloop=%2\", operands);
      output_asm_insn (\"do 0 {\", operands);
      output_asm_insn (\"%0=%0>>1\", operands);
      output_asm_insn (\"}\", operands);
      return \"psw=%3\";
    }
}")


;;
;; Arithmetic Left shift

;; Start off with special case arithmetic left shift by 1,4,8 or 16.


(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashift:HI (match_operand:HI 1 "register_operand" "A")
                   (const_int 1)))]
  ""
  "%0=%1<<1"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashift:HI (match_operand:HI 1 "register_operand" "A")
                   (const_int 4)))]
  ""
  "%0=%1<<4"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashift:HI (match_operand:HI 1 "register_operand" "A")
                   (const_int 8)))]
  ""
  "%0=%1<<8"
  [(set_attr "type" "special")])

(define_insn ""
  [(set (match_operand:HI 0 "register_operand" "=A")
        (ashift:HI (match_operand:HI 1 "general_operand" "A")
                   (const_int 16)))]
  ""
  "%0=%1<<16"
  [(set_attr "type" "special")])



;; Normal Arithmetic Shift Left


(define_expand "ashlhi3"
  [(set (match_operand:HI 0 "register_operand" "")
        (ashift:HI (match_operand:HI 1 "register_operand" "")
                   (match_operand:QI 2 "nonmemory_operand" "")))]
  ""
  "
{
  if (!TARGET_BMU)
  {
      /* If we are shifting by a constant we can do it in 1 or more
	 1600 core shift instructions. The core instructions can
	 shift by 1, 4, 8, or 16.  */
      
      if (GET_CODE(operands[2]) == CONST_INT)
	;
      else
      {
	rtx label1 = gen_label_rtx ();
	rtx label2 = gen_label_rtx ();
#if 0
	if (!dsp16xx_ashlhi3_libcall)
	  dsp16xx_ashlhi3_libcall
	    = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL);

	  emit_library_call (dsp16xx_ashlhi3_libcall, 1, HImode, 2,
			     operands[1], HImode, operands[2], QImode);
	  emit_move_insn (operands[0], hard_libcall_value(HImode));
	  DONE;
#else
	do_pending_stack_adjust ();
	emit_insn (gen_tstqi (operands[2]));
	emit_jump_insn (gen_bne (label1));
	emit_move_insn (operands[0], operands[1]);
	emit_jump_insn (gen_jump (label2));
	emit_barrier ();
	emit_label (label1);

	if (GET_CODE(operands[2]) != MEM)
	  {
	    rtx stack_slot;
	    
	    stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
	    stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
	    emit_move_insn (stack_slot, operands[2]);
	    operands[2] = stack_slot;
	  }
	emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1], operands[2]));
	emit_label (label2);
	DONE;
#endif
      }
  }
}")

(define_insn "match_ashlhi3"
  [(set (match_operand:HI 0 "register_operand" "=A,A,A")
        (ashift:HI (match_operand:HI 1 "register_operand" "A,A,A")
                   (match_operand:QI 2 "nonmemory_operand" "B,I,!h")))]
  "TARGET_BMU"
  "@
   %0=%1<<%2\;move %u0=%u0
   %0=%1<<%H2\;move %u0=%u0
   %0=%1<<%2\;move %u0=%u0"
  [(set_attr "type" "shift_multiple,shift_multiple,shift_multiple")])

(define_insn "match_ashlhi3_nobmu"
  [(set (match_operand:HI 0 "register_operand" "=A,A")
        (ashift:HI (match_operand:HI 1 "register_operand" "A,0")
		   (match_operand:QI 2 "general_operand" "n,m")))]
  "!TARGET_BMU"
  "*
{
  if (which_alternative == 0)
    {
      emit_1600_core_shift (ASHIFT, operands, INTVAL(operands[2]));
      return \"\";
    }
  else
    {
      output_asm_insn (\"cloop=%2\", operands);
      output_asm_insn (\"do 0 {\", operands);