i960.h

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/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
   will either zero-extend or sign-extend.  The value of this macro should
   be the code that says which one of the two operations is implicitly
   done, NIL if none.  */
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND

/* Nonzero if access to memory by bytes is no faster than for words.
   Value changed to 1 after reports of poor bit-field code with g++.
   Indications are that code is usually as good, sometimes better.  */   

#define SLOW_BYTE_ACCESS 1

/* We assume that the store-condition-codes instructions store 0 for false
   and some other value for true.  This is the value stored for true.  */

#define STORE_FLAG_VALUE 1

/* Define this to be nonzero if shift instructions ignore all but the low-order
   few bits.  */
#define SHIFT_COUNT_TRUNCATED 0

/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
   is done just by pretending it is already truncated.  */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1

/* Specify the machine mode that pointers have.
   After generation of rtl, the compiler makes no further distinction
   between pointers and any other objects of this machine mode.  */
#define Pmode SImode

/* Specify the widest mode that BLKmode objects can be promoted to */
#define	MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)

/* These global variables are used to pass information between
   cc setter and cc user at insn emit time.  */

extern struct rtx_def *i960_compare_op0, *i960_compare_op1;

/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
   return the mode to be used for the comparison.  For floating-point, CCFPmode
   should be used.  CC_NOOVmode should be used when the first operand is a
   PLUS, MINUS, or NEG.  CCmode should be used when no special processing is
   needed.  */
#define SELECT_CC_MODE(OP,X,Y) select_cc_mode (OP, X)

/* A function address in a call instruction is a byte address
   (for indexing purposes) so give the MEM rtx a byte's mode.  */
#define FUNCTION_MODE SImode

/* Define this if addresses of constant functions
   shouldn't be put through pseudo regs where they can be cse'd.
   Desirable on machines where ordinary constants are expensive
   but a CALL with constant address is cheap.  */
#define NO_FUNCTION_CSE

/* Use memcpy, etc. instead of bcopy.  */

#ifndef WIND_RIVER
#define	TARGET_MEM_FUNCTIONS	1
#endif

/* Compute the cost of computing a constant rtl expression RTX
   whose rtx-code is CODE.  The body of this macro is a portion
   of a switch statement.  If the code is computed here,
   return it with a return statement.  Otherwise, break from the switch.  */

/* Constants that can be (non-ldconst) insn operands are cost 0.  Constants
   that can be non-ldconst operands in rare cases are cost 1.  Other constants
   have higher costs.  */

/* Must check for OUTER_CODE of SET for power2_operand, because
   reload_cse_move2add calls us with OUTER_CODE of PLUS to decide when
   to replace set with add.  */

#define CONST_COSTS(RTX, CODE, OUTER_CODE)				\
  case CONST_INT:							\
    if ((INTVAL (RTX) >= 0 && INTVAL (RTX) < 32)			\
	|| (OUTER_CODE == SET && power2_operand (RTX, VOIDmode)))	\
      return 0; 							\
    else if (INTVAL (RTX) >= -31 && INTVAL (RTX) < 0)			\
      return 1;								\
  case CONST:								\
  case LABEL_REF:							\
  case SYMBOL_REF:							\
    return (TARGET_C_SERIES ? 6 : 8);					\
  case CONST_DOUBLE:							\
    if ((RTX) == CONST0_RTX (DFmode) || (RTX) == CONST0_RTX (SFmode)	\
	|| (RTX) == CONST1_RTX (DFmode) || (RTX) == CONST1_RTX (SFmode))\
      return 1;								\
    return 12;

/* The i960 offers addressing modes which are "as cheap as a register".
   See i960.c (or gcc.texinfo) for details.  */

#define ADDRESS_COST(RTX) \
  (GET_CODE (RTX) == REG ? 1 : i960_address_cost (RTX))

/* Control the assembler format that we output.  */

/* Output at beginning of assembler file.  */

#define ASM_FILE_START(file)

/* Output to assembler file text saying following lines
   may contain character constants, extra white space, comments, etc.  */

#define ASM_APP_ON ""

/* Output to assembler file text saying following lines
   no longer contain unusual constructs.  */

#define ASM_APP_OFF ""

/* Output before read-only data.  */

#define TEXT_SECTION_ASM_OP "\t.text"

/* Output before writable data.  */

#define DATA_SECTION_ASM_OP "\t.data"

/* How to refer to registers in assembler output.
   This sequence is indexed by compiler's hard-register-number (see above).  */

#define REGISTER_NAMES {						\
	"g0", "g1", "g2",  "g3",  "g4",  "g5",  "g6",  "g7",		\
	"g8", "g9", "g10", "g11", "g12", "g13", "g14", "fp",		\
	"pfp","sp", "rip", "r3",  "r4",  "r5",  "r6",  "r7",		\
	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",		\
	"fp0","fp1","fp2", "fp3", "cc", "fake" }

/* How to renumber registers for dbx and gdb.
   In the 960 encoding, g0..g15 are registers 16..31.  */

#define DBX_REGISTER_NUMBER(REGNO)					\
  (((REGNO) < 16) ? (REGNO) + 16					\
   : (((REGNO) > 31) ? (REGNO) : (REGNO) - 16))

/* Don't emit dbx records longer than this.  This is an arbitrary value.  */
#define DBX_CONTIN_LENGTH 1500

/* This is how to output a note to DBX telling it the line number
   to which the following sequence of instructions corresponds.  */

#define ASM_OUTPUT_SOURCE_LINE(FILE, LINE)			\
{ if (write_symbols == SDB_DEBUG) {				\
    fprintf ((FILE), "\t.ln	%d\n",				\
	     (sdb_begin_function_line				\
	      ? (LINE) - sdb_begin_function_line : 1));		\
  } else if (write_symbols == DBX_DEBUG) {			\
	fprintf((FILE),"\t.stabd	68,0,%d\n",(LINE));	\
  } }

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.globl "

/* The prefix to add to user-visible assembler symbols.  */

#define USER_LABEL_PREFIX "_"

/* This is how to output an internal numbered label where
   PREFIX is the class of label and NUM is the number within the class.  */

#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
  fprintf (FILE, "%s%d:\n", PREFIX, NUM)

/* This is how to store into the string LABEL
   the symbol_ref name of an internal numbered label where
   PREFIX is the class of label and NUM is the number within the class.
   This is suitable for output with `assemble_name'.  */

#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\
  sprintf (LABEL, "*%s%d", PREFIX, NUM)

#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
  fprintf (FILE, "\tst\t%s,(sp)\n\taddo\t4,sp,sp\n", reg_names[REGNO])

/* This is how to output an insn to pop a register from the stack.
   It need not be very fast code.  */

#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
  fprintf (FILE, "\tsubo\t4,sp,sp\n\tld\t(sp),%s\n", reg_names[REGNO])

/* This is how to output an element of a case-vector that is absolute.  */

#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
  fprintf (FILE, "\t.word L%d\n", VALUE)

/* This is how to output an element of a case-vector that is relative.  */

#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
  fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)

/* This is how to output an assembler line that says to advance the
   location counter to a multiple of 2**LOG bytes.  */

#define ASM_OUTPUT_ALIGN(FILE,LOG)	\
  fprintf (FILE, "\t.align %d\n", (LOG))

#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
  fprintf (FILE, "\t.space %d\n", (SIZE))

/* This says how to output an assembler line
   to define a global common symbol.  */

/* For common objects, output unpadded size... gld960 & lnk960 both
   have code to align each common object at link time.  Also, if size
   is 0, treat this as a declaration, not a definition - i.e.,
   do nothing at all.  */

#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)	\
{ if ((SIZE) != 0)					\
    {							\
      fputs (".globl ", (FILE)),			\
      assemble_name ((FILE), (NAME)),			\
      fputs ("\n.comm ", (FILE)),			\
      assemble_name ((FILE), (NAME)),			\
      fprintf ((FILE), ",%d\n", (SIZE));		\
    }							\
}

/* This says how to output an assembler line to define a local common symbol.
   Output unpadded size, with request to linker to align as requested.
   0 size should not be possible here.  */

#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)  \
( fputs (".bss\t", (FILE)),			\
  assemble_name ((FILE), (NAME)),		\
  fprintf ((FILE), ",%d,%d\n", (SIZE),		\
	   (floor_log2 ((ALIGN) / BITS_PER_UNIT))))

/* A C statement (sans semicolon) to output to the stdio stream
   FILE the assembler definition of uninitialized global DECL named
   NAME whose size is SIZE bytes and alignment is ALIGN bytes.
   Try to use asm_output_aligned_bss to implement this macro.  */

#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)	\
  do {								\
    fputs (".globl ", (FILE));					\
    assemble_name ((FILE), (NAME));				\
    fputs ("\n", (FILE));					\
    ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);		\
  } while (0)

/* Output text for an #ident directive.  */
#define	ASM_OUTPUT_IDENT(FILE, STR)  fprintf(FILE, "\t# %s\n", STR);

/* Align code to 8 byte boundary if TARGET_CODE_ALIGN is true.  */

#define	LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_CODE_ALIGN ? 3 : 0)

/* Store in OUTPUT a string (made with alloca) containing
   an assembler-name for a local static variable named NAME.
   LABELNO is an integer which is different for each call.  */

#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)	\
	( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),	\
	  sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))

/* Print operand X (an rtx) in assembler syntax to file FILE.
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
   For `%' followed by punctuation, CODE is the punctuation and X is null.  */

#define PRINT_OPERAND(FILE, X, CODE)  \
  i960_print_operand (FILE, X, CODE);

/* Print a memory address as an operand to reference that memory location.  */

#define PRINT_OPERAND_ADDRESS(FILE, ADDR)	\
  i960_print_operand_addr (FILE, ADDR)

/* Determine which codes are valid without a following integer.  These must
   not be alphabetic (the characters are chosen so that
   PRINT_OPERAND_PUNCT_VALID_P translates into a simple range change when
   using ASCII).  */

#define PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '+')

/* Output assembler code for a block containing the constant parts
   of a trampoline, leaving space for the variable parts.  */

/* On the i960, the trampoline contains three instructions:
     ldconst _function, r4
     ldconst static addr, g12
     jump (r4)  */

#define TRAMPOLINE_TEMPLATE(FILE)					\
{									\
  assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x8C203000));	\
  assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x00000000));	\
  assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x8CE03000));	\
  assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x00000000));	\
  assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x84212000));	\
}

/* Length in units of the trampoline for entering a nested function.  */

#define TRAMPOLINE_SIZE 20

/* Emit RTL insns to initialize the variable parts of a trampoline.
   FNADDR is an RTX for the address of the function's pure code.
   CXT is an RTX for the static chain value for the function.  */

#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)			\
{									\
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), FNADDR); \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
}

/* Generate RTL to flush the register windows so as to make arbitrary frames
   available.  */
#define SETUP_FRAME_ADDRESSES()		\
  emit_insn (gen_flush_register_windows ())

#define BUILTIN_SETJMP_FRAME_VALUE hard_frame_pointer_rtx

#if 0
/* Promote char and short arguments to ints, when want compatibility with
   the iC960 compilers.  */

/* ??? In order for this to work, all users would need to be changed
   to test the value of the macro at run time.  */
#define PROMOTE_PROTOTYPES	TARGET_CLEAN_LINKAGE
/* ??? This does not exist.  */
#define PROMOTE_RETURN		TARGET_CLEAN_LINKAGE
#endif

/* Instruction type definitions.  Used to alternate instructions types for
   better performance on the C series chips.  */

enum insn_types { I_TYPE_REG, I_TYPE_MEM, I_TYPE_CTRL };

/* Holds the insn type of the last insn output to the assembly file.  */

extern enum insn_types i960_last_insn_type;

/* Parse opcodes, and set the insn last insn type based on them.  */

#define ASM_OUTPUT_OPCODE(FILE, INSN)	i960_scan_opcode (INSN)

/* Table listing what rtl codes each predicate in i960.c will accept.  */

#define PREDICATE_CODES \
  {"fpmove_src_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\
			  LABEL_REF, SUBREG, REG, MEM}},		\
  {"arith_operand", {SUBREG, REG, CONST_INT}},				\
  {"logic_operand", {SUBREG, REG, CONST_INT}},				\
  {"fp_arith_operand", {SUBREG, REG, CONST_DOUBLE}},			\
  {"signed_arith_operand", {SUBREG, REG, CONST_INT}},			\
  {"literal", {CONST_INT}},						\
  {"fp_literal_one", {CONST_DOUBLE}},					\
  {"fp_literal_double", {CONST_DOUBLE}},				\
  {"fp_literal", {CONST_DOUBLE}},					\
  {"signed_literal", {CONST_INT}},					\
  {"symbolic_memory_operand", {SUBREG, MEM}},				\
  {"eq_or_neq", {EQ, NE}},						\
  {"arith32_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, CONST_INT,	\
		       CONST_DOUBLE, CONST}},				\
  {"power2_operand", {CONST_INT}},					\
  {"cmplpower2_operand", {CONST_INT}},

/* Defined in reload.c, and used in insn-recog.c.  */

extern int rtx_equal_function_value_matters;