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📄 c4x.h

📁 linux下的gcc编译器
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  (c4x_function_arg(&CUM, MODE, TYPE, NAMED))/* Define the profitability of saving registers around calls.   We disable caller save to avoid a bug in flow.c (this also affects   other targets such as m68k).  Since we must use stf/sti,   the profitability is marginal anyway.  */#define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0/* Never pass data by reference.  */#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0/* 1 if N is a possible register number for function argument passing.  */#define FUNCTION_ARG_REGNO_P(REGNO) \	(  (   ((REGNO) == AR2_REGNO)	/* AR2.  */	\	    || ((REGNO) == R2_REGNO)	/* R2.  */	\	    || ((REGNO) == R3_REGNO)	/* R3.  */	\	    || ((REGNO) == RC_REGNO)	/* RC.  */	\	    || ((REGNO) == RS_REGNO)	/* RS.  */	\	    || ((REGNO) == RE_REGNO))	/* RE.  */	\	 ? 1						\	 : 0)/* How Scalar Function Values Are Returned.  */#define FUNCTION_VALUE(VALTYPE, FUNC) \	gen_rtx(REG, TYPE_MODE(VALTYPE), R0_REGNO)	/* Return in R0.  */#define LIBCALL_VALUE(MODE) \	gen_rtx(REG, MODE, R0_REGNO)	/* Return in R0.  */#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == R0_REGNO)/* How Large Values Are Returned.  */#define DEFAULT_PCC_STRUCT_RETURN	0#define STRUCT_VALUE_REGNUM		AR0_REGNO	/* AR0.  *//* Varargs handling.  */#define EXPAND_BUILTIN_VA_ARG(valist, type) \  c4x_va_arg (valist, type)/* Generating Code for Profiling.  *//* Note that the generated assembly uses the ^ operator to load the 16   MSBs of the address.  This is not supported by the TI assembler.    The FUNCTION profiler needs a function mcount which gets passed   a pointer to the LABELNO.  */#define FUNCTION_PROFILER(FILE, LABELNO) 			\     if (! TARGET_C3X)						\     {								\	fprintf (FILE, "\tpush\tar2\n");			\	fprintf (FILE, "\tldhi\t^LP%d,ar2\n", (LABELNO));	\	fprintf (FILE, "\tor\t#LP%d,ar2\n", (LABELNO));		\	fprintf (FILE, "\tcall\tmcount\n");			\	fprintf (FILE, "\tpop\tar2\n");				\     }								\     else							\     {								\	fprintf (FILE, "\tpush\tar2\n");			\	fprintf (FILE, "\tldiu\t^LP%d,ar2\n", (LABELNO));	\	fprintf (FILE, "\tlsh\t16,ar2\n");			\	fprintf (FILE, "\tor\t#LP%d,ar2\n", (LABELNO));		\	fprintf (FILE, "\tcall\tmcount\n");			\	fprintf (FILE, "\tpop\tar2\n");				\     }/* Implicit Calls to Library Routines.  */#define MULQI3_LIBCALL      "__mulqi3"#define DIVQI3_LIBCALL      "__divqi3"#define UDIVQI3_LIBCALL     "__udivqi3"#define MODQI3_LIBCALL      "__modqi3"#define UMODQI3_LIBCALL     "__umodqi3"#define DIVQF3_LIBCALL      "__divqf3"#define MULHF3_LIBCALL      "__mulhf3"#define DIVHF3_LIBCALL      "__divhf3"#define MULHI3_LIBCALL      "__mulhi3"#define SMULHI3_LIBCALL     "__smulhi3_high"#define UMULHI3_LIBCALL     "__umulhi3_high"#define DIVHI3_LIBCALL      "__divhi3"#define UDIVHI3_LIBCALL     "__udivhi3"#define MODHI3_LIBCALL      "__modhi3"#define UMODHI3_LIBCALL     "__umodhi3"#define FLOATHIQF2_LIBCALL  "__floathiqf2"#define FLOATUNSHIQF2_LIBCALL  "__ufloathiqf2"#define FIX_TRUNCQFHI2_LIBCALL "__fix_truncqfhi2"#define FIXUNS_TRUNCQFHI2_LIBCALL "__ufix_truncqfhi2"#define FLOATHIHF2_LIBCALL  "__floathihf2"#define FLOATUNSHIHF2_LIBCALL  "__ufloathihf2"#define FIX_TRUNCHFHI2_LIBCALL "__fix_trunchfhi2"#define FIXUNS_TRUNCHFHI2_LIBCALL "__ufix_trunchfhi2"#define FFS_LIBCALL	    "__ffs"#define INIT_TARGET_OPTABS \  do { \    smul_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (MULQI3_LIBCALL);		\    sdiv_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (DIVQI3_LIBCALL);		\    udiv_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (UDIVQI3_LIBCALL);		\    smod_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (MODQI3_LIBCALL);		\    umod_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (UMODQI3_LIBCALL);		\    sdiv_optab->handlers[(int) QFmode].libfunc		\      = init_one_libfunc (DIVQF3_LIBCALL);		\    smul_optab->handlers[(int) HFmode].libfunc		\      = init_one_libfunc (MULHF3_LIBCALL);		\    sdiv_optab->handlers[(int) HFmode].libfunc		\      = init_one_libfunc (DIVHF3_LIBCALL);		\    smul_optab->handlers[(int) HImode].libfunc		\      = init_one_libfunc (MULHI3_LIBCALL);		\    sdiv_optab->handlers[(int) HImode].libfunc		\      = init_one_libfunc (DIVHI3_LIBCALL);		\    udiv_optab->handlers[(int) HImode].libfunc		\      = init_one_libfunc (UDIVHI3_LIBCALL);		\    smod_optab->handlers[(int) HImode].libfunc		\      = init_one_libfunc (MODHI3_LIBCALL);		\    umod_optab->handlers[(int) HImode].libfunc		\      = init_one_libfunc (UMODHI3_LIBCALL);		\    ffs_optab->handlers[(int) QImode].libfunc		\      = init_one_libfunc (FFS_LIBCALL);			\    smulhi3_libfunc					\      = init_one_libfunc(SMULHI3_LIBCALL);		\    umulhi3_libfunc					\      = init_one_libfunc(UMULHI3_LIBCALL);		\    fix_truncqfhi2_libfunc				\      = init_one_libfunc(FIX_TRUNCQFHI2_LIBCALL);	\    fixuns_truncqfhi2_libfunc				\      = init_one_libfunc(FIXUNS_TRUNCQFHI2_LIBCALL);	\    fix_trunchfhi2_libfunc				\      = init_one_libfunc(FIX_TRUNCHFHI2_LIBCALL);	\    fixuns_trunchfhi2_libfunc				\      = init_one_libfunc(FIXUNS_TRUNCHFHI2_LIBCALL);	\    floathiqf2_libfunc					\      = init_one_libfunc(FLOATHIQF2_LIBCALL);		\    floatunshiqf2_libfunc				\      = init_one_libfunc(FLOATUNSHIQF2_LIBCALL);	\    floathihf2_libfunc					\      = init_one_libfunc(FLOATHIHF2_LIBCALL);		\    floatunshihf2_libfunc				\      = init_one_libfunc(FLOATUNSHIHF2_LIBCALL);	\  } while (0)#define TARGET_MEM_FUNCTIONS/* CC_NOOVmode should be used when the first operand is a PLUS, MINUS, NEG   or MULT.   CCmode should be used when no special processing is needed.  */#define SELECT_CC_MODE(OP,X,Y) \  ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS		\    || GET_CODE (X) == NEG || GET_CODE (X) == MULT		\    || GET_MODE (X) == ABS					\    || GET_CODE (Y) == PLUS || GET_CODE (Y) == MINUS		\    || GET_CODE (Y) == NEG || GET_CODE (Y) == MULT		\    || GET_MODE (Y) == ABS)					\    ? CC_NOOVmode : CCmode)/* Addressing Modes.  */#define HAVE_POST_INCREMENT 1#define HAVE_PRE_INCREMENT 1#define HAVE_POST_DECREMENT 1#define HAVE_PRE_DECREMENT 1#define HAVE_PRE_MODIFY_REG 1#define HAVE_POST_MODIFY_REG 1#define HAVE_PRE_MODIFY_DISP 1#define HAVE_POST_MODIFY_DISP 1/* The number of insns that can be packed into a single opcode.  */#define PACK_INSNS 2/* Recognize any constant value that is a valid address.    We could allow arbitrary constant addresses in the large memory   model but for the small memory model we can only accept addresses   within the data page.  I suppose we could also allow   CONST PLUS SYMBOL_REF.  */#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == SYMBOL_REF)/* Maximum number of registers that can appear in a valid memory   address.  */#define MAX_REGS_PER_ADDRESS	2/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx   and check its validity for a certain class.   We have two alternate definitions for each of them.   The usual definition accepts all pseudo regs; the other rejects   them unless they have been allocated suitable hard regs.   The symbol REG_OK_STRICT causes the latter definition to be used.   Most source files want to accept pseudo regs in the hope that   they will get allocated to the class that the insn wants them to be in.   Source files for reload pass need to be strict.   After reload, it makes no difference, since pseudo regs have   been eliminated by then.  */#ifndef REG_OK_STRICT/* Nonzero if X is a hard or pseudo reg that can be used as an base.  */#define REG_OK_FOR_BASE_P(X) IS_ADDR_OR_PSEUDO_REG(X)/* Nonzero if X is a hard or pseudo reg that can be used as an index.  */#define REG_OK_FOR_INDEX_P(X) IS_INDEX_OR_PSEUDO_REG(X)#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)				\{									\  if (c4x_check_legit_addr (MODE, X, 0))				\    goto ADDR;								\}#else/* Nonzero if X is a hard reg that can be used as an index.  */#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))/* Nonzero if X is a hard reg that can be used as a base reg.  */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)				\{									\  if (c4x_check_legit_addr (MODE, X, 1))				\    goto ADDR;								\}#endif#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \{									\  rtx new;								\  new = c4x_legitimize_address (X, MODE);				\  if (new != NULL_RTX)							\  {									\    (X) = new;								\    goto WIN;								\  }									\}#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN)     \{									\  if (MODE != HImode							\      && MODE != HFmode							\      && GET_MODE (X) != HImode						\      && GET_MODE (X) != HFmode						\      && (GET_CODE (X) == CONST						\          || GET_CODE (X) == SYMBOL_REF					\          || GET_CODE (X) == LABEL_REF))				\    {									\      if (! TARGET_SMALL)						\	{								\          int i;							\      	  X = gen_rtx_LO_SUM (GET_MODE (X),				\			      gen_rtx_HIGH (GET_MODE (X), X), X);	\          i = push_reload (XEXP (X, 0), NULL_RTX,			\			   &XEXP (X, 0), NULL,				\		           DP_REG, GET_MODE (X), VOIDmode, 0, 0,	\		           OPNUM, TYPE);				\          /* The only valid reg is DP. This is a fixed reg and will	\	     normally not be used so force it.  */			\          rld[i].reg_rtx = gen_rtx_REG (Pmode, DP_REGNO); 		\          rld[i].nocombine = 1; 					\        }								\      goto WIN;								\   }									\  else if (MODE != HImode						\           && MODE != HFmode						\           && GET_MODE (X) != HImode					\           && GET_MODE (X) != HFmode					\           && GET_CODE (X) == LO_SUM					\           && GET_CODE (XEXP (X,0)) == HIGH				\           && (GET_CODE (XEXP (XEXP (X,0),0)) == CONST			\               || GET_CODE (XEXP (XEXP (X,0),0)) == SYMBOL_REF		\               || GET_CODE (XEXP (XEXP (X,0),0)) == LABEL_REF))		\    {									\      if (! TARGET_SMALL)						\	{								\          int i = push_reload (XEXP (X, 0), NULL_RTX,			\			       &XEXP (X, 0), NULL,			\		               DP_REG, GET_MODE (X), VOIDmode, 0, 0,	\		               OPNUM, TYPE);				\          /* The only valid reg is DP. This is a fixed reg and will	\	     normally not be used so force it.  */			\          rld[i].reg_rtx = gen_rtx_REG (Pmode, DP_REGNO); 		\          rld[i].nocombine = 1; 					\        }								\      goto WIN;								\   }									\}/* No mode-dependent addresses on the C4x are autoincrements.  */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)	\  if (GET_CODE (ADDR) == PRE_DEC	\      || GET_CODE (ADDR) == POST_DEC	\      || GET_CODE (ADDR) == PRE_INC	\      || GET_CODE (ADDR) == POST_INC	\      || GET_CODE (ADDR) == POST_MODIFY	\      || GET_CODE (ADDR) == PRE_MODIFY)	\    goto LABEL/* Nonzero if the constant value X is a legitimate general operand.   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.    The C4x can only load 16-bit immediate values, so we only allow a   restricted subset of CONST_INT and CONST_DOUBLE.  Disallow   LABEL_REF and SYMBOL_REF (except on the C40 with the big memory   model) so that the symbols will be forced into the constant pool.   On second thoughts, let's do this with the move expanders since   the alias analysis has trouble if we force constant addresses   into memory.*/#define LEGITIMATE_CONSTANT_P(X)				\  ((GET_CODE (X) == CONST_DOUBLE && c4x_H_constant (X))		\  || (GET_CODE (X) == CONST_INT)				\  || (GET_CODE (X) == SYMBOL_REF)				\  || (GET_CODE (X) == LABEL_REF)				\  || (GET_CODE (X) == CONST)					\  || (GET_CODE (X) == HIGH && ! TARGET_C3X)			\  || (GET_CODE (X) == LO_SUM && ! TARGET_C3X))#define LEGITIMATE_DISPLACEMENT_P(X) IS_DISP8_CONST (INTVAL (X))/* Descripting Relative Cost of Operations.  *//* Provide the costs of a rtl expression.  This is in the body of a   switch on CODE.    Note that we return, rather than break so that rtx_cost doesn't   include CONST_COSTS otherwise expand_mult will think that it is   cheaper to synthesize a multiply rather than to use a multiply   instruction.  I think this is because the algorithm synth_mult   doesn't take into account the loading of the operands, whereas the   calculation of mult_cost does. */#define RTX_COSTS(RTX, CODE, OUTER_CODE)				\    case PLUS:								\    case MINUS:								\    case AND:								\    case IOR:								\    case XOR:								\    case ASHIFT:							\    case ASHIFTRT:							\    case LSHIFTRT:							\    return COSTS_N_INSNS (1);						\    case MULT:								\    return COSTS_N_INSNS (GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT \			  || TARGET_MPYI ? 1 : 14);			\    case DIV:								\    case UDIV:								\    case MOD: 								\    case UMOD:								\    return COSTS_N_INSNS (GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT	\			  ? 15 : 50);

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