h8300.h

linux下的gcc编译器

/* Definitions of target machine for GNU compiler.
   Hitachi H8/300 version generating coff
   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
   2000, 2001, 2002 Free Software Foundation, Inc.
   Contributed by Steve Chamberlain ([e-mail]),
   Jim Wilson ([e-mail]), and Doug Evans ([e-mail]).

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#ifndef GCC_H8300_H
#define GCC_H8300_H

/* Which CPU to compile for.
   We use int for CPU_TYPE to avoid lots of casts.  */
#if 0 /* defined in insn-attr.h, here for documentation */
enum attr_cpu { CPU_H8300, CPU_H8300H };
#endif
extern int cpu_type;

/* Various globals defined in h8300.c.  */

extern const char *h8_push_op, *h8_pop_op, *h8_mov_op;
extern const char * const *h8_reg_names;

/* Target CPU builtins.  */
#define TARGET_CPU_CPP_BUILTINS()			\
  do							\
    {							\
      if (TARGET_H8300H)				\
	{						\
	  builtin_define ("__H8300H__");		\
	  builtin_assert ("cpu=h8300h");		\
	  builtin_assert ("machine=h8300h");		\
	  if (TARGET_NORMAL_MODE)			\
	    {						\
	      builtin_define ("__NORMAL_MODE__");	\
	    }						\
	}						\
      else if (TARGET_H8300S)				\
	{						\
	  builtin_define ("__H8300S__");		\
	  builtin_assert ("cpu=h8300s");		\
	  builtin_assert ("machine=h8300s");		\
	  if (TARGET_NORMAL_MODE)			\
	    {						\
	      builtin_define ("__NORMAL_MODE__");	\
	    }						\
	}						\
      else						\
	{						\
	  builtin_define ("__H8300__");			\
	  builtin_assert ("cpu=h8300");			\
	  builtin_assert ("machine=h8300");		\
	}						\
    }							\
  while (0)

#define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}"

#define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"

#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)				 \
  do									 \
    {									 \
      /* Basic block reordering is only beneficial on targets with cache \
	 and/or variable-cycle branches where (cycle count taken !=	 \
	 cycle count not taken).  */					 \
      flag_reorder_blocks = 0;						 \
    }									 \
  while (0)

/* Print subsidiary information on the compiler version in use.  */

#define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");

/* Run-time compilation parameters selecting different hardware subsets.  */

extern int target_flags;

/* Masks for the -m switches.  */
#define MASK_H8300S		0x00000001
#define MASK_MAC		0x00000002
#define MASK_INT32		0x00000008
#define MASK_ADDRESSES		0x00000040
#define MASK_QUICKCALL		0x00000080
#define MASK_SLOWBYTE		0x00000100
#define MASK_NORMAL_MODE 	0x00000200
#define MASK_RELAX		0x00000400
#define MASK_RTL_DUMP		0x00000800
#define MASK_H8300H		0x00001000
#define MASK_ALIGN_300		0x00002000

/* Macros used in the machine description to test the flags.  */

/* Make int's 32 bits.  */
#define TARGET_INT32 (target_flags & MASK_INT32)

/* Dump recorded insn lengths into the output file.  This helps debug the
   md file.  */
#define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)

/* Pass the first few arguments in registers.  */
#define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)

/* Pretend byte accesses are slow.  */
#define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)

/* Dump each assembler insn's rtl into the output file.
   This is for debugging the compiler only.  */
#define TARGET_RTL_DUMP	(target_flags & MASK_RTL_DUMP)

/* Select between the H8/300 and H8/300H CPUs.  */
#define TARGET_H8300	(! TARGET_H8300H && ! TARGET_H8300S)
#define TARGET_H8300H	(target_flags & MASK_H8300H)
#define TARGET_H8300S	(target_flags & MASK_H8300S)
#define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)

/* mac register and relevant instructions are available.  */
#define TARGET_MAC    (target_flags & MASK_MAC)

/* Align all values on the H8/300H the same way as the H8/300.  Specifically,
   32 bit and larger values are aligned on 16 bit boundaries.
   This is all the hardware requires, but the default is 32 bits for the H8/300H.
   ??? Now watch someone add hardware floating point requiring 32 bit
   alignment.  */
#define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)

/* Macro to define tables used to set the flags.
   This is a list in braces of pairs in braces,
   each pair being { "NAME", VALUE }
   where VALUE is the bits to set or minus the bits to clear.
   An empty string NAME is used to identify the default VALUE.  */

#define TARGET_SWITCHES							    \
{ {"s",			 MASK_H8300S, N_("Generate H8S code")},		    \
  {"no-s",		-MASK_H8300S, N_("Do not generate H8S code")},	    \
  {"s2600",		 MASK_MAC, N_("Generate H8S/2600 code")},	    \
  {"no-s2600",		-MASK_MAC, N_("Do not generate H8S/2600 code")},    \
  {"int32",		 MASK_INT32, N_("Make integers 32 bits wide")},	    \
  {"addresses",		 MASK_ADDRESSES, NULL},				    \
  {"quickcall",		 MASK_QUICKCALL,				    \
   N_("Use registers for argument passing")},				    \
  {"no-quickcall",	-MASK_QUICKCALL,				    \
   N_("Do not use registers for argument passing")},			    \
  {"slowbyte",		 MASK_SLOWBYTE,					    \
   N_("Consider access to byte sized memory slow")},			    \
  {"relax",		 MASK_RELAX, N_("Enable linker relaxing")},	    \
  {"rtl-dump",		 MASK_RTL_DUMP, NULL},				    \
  {"h",			 MASK_H8300H, N_("Generate H8/300H code")},	    \
  {"n",			 MASK_NORMAL_MODE, N_("Enable the normal mode")},   \
  {"no-h",		-MASK_H8300H, N_("Do not generate H8/300H code")},  \
  {"align-300",		 MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \
  { "",			 TARGET_DEFAULT, NULL}}

#ifdef IN_LIBGCC2
#undef TARGET_H8300H
#undef TARGET_H8300S
#undef TARGET_NORMAL_MODE
/* If compiling libgcc2, make these compile time constants based on what
   flags are we actually compiling with.  */
#ifdef __H8300H__
#define TARGET_H8300H	1
#else
#define TARGET_H8300H	0
#endif
#ifdef __H8300S__
#define TARGET_H8300S	1
#else
#define TARGET_H8300S	0
#endif
#ifdef __NORMAL_MODE__
#define TARGET_NORMAL_MODE 1
#else
#define TARGET_NORMAL_MODE 0
#endif
#endif /* !IN_LIBGCC2 */

/* Do things that must be done once at start up.  */

#define OVERRIDE_OPTIONS			\
  do						\
    {						\
      h8300_init_once ();			\
    }						\
  while (0)

/* Default target_flags if no switches specified.  */

#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_QUICKCALL)
#endif

/* Show we can debug even without a frame pointer.  */
/* #define CAN_DEBUG_WITHOUT_FP */

/* Define this if addresses of constant functions
   shouldn't be put through pseudo regs where they can be cse'd.
   Desirable on machines where ordinary constants are expensive
   but a CALL with constant address is cheap.

   Calls through a register are cheaper than calls to named
   functions; however, the register pressure this causes makes
   CSEing of function addresses generally a lose.  */
#define NO_FUNCTION_CSE

/* Target machine storage layout */

/* Define this if most significant bit is lowest numbered
   in instructions that operate on numbered bit-fields.
   This is not true on the H8/300.  */
#define BITS_BIG_ENDIAN 0

/* Define this if most significant byte of a word is the lowest numbered.  */
/* That is true on the H8/300.  */
#define BYTES_BIG_ENDIAN 1

/* Define this if most significant word of a multiword number is lowest
   numbered.
   This is true on an H8/300 (actually we can make it up, but we choose to
   be consistent).  */
#define WORDS_BIG_ENDIAN 1

#define MAX_BITS_PER_WORD	32

/* Width of a word, in units (bytes).  */
#define UNITS_PER_WORD		(TARGET_H8300H || TARGET_H8300S ? 4 : 2)
#define MIN_UNITS_PER_WORD	2

#define SHORT_TYPE_SIZE	16
#define INT_TYPE_SIZE		(TARGET_INT32 ? 32 : 16)
#define LONG_TYPE_SIZE		32
#define LONG_LONG_TYPE_SIZE	32
#define FLOAT_TYPE_SIZE	32
#define DOUBLE_TYPE_SIZE	32
#define LONG_DOUBLE_TYPE_SIZE	DOUBLE_TYPE_SIZE

#define MAX_FIXED_MODE_SIZE	32

/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
#define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)

/* Allocation boundary (in *bits*) for the code of a function.  */
#define FUNCTION_BOUNDARY 16

/* Alignment of field after `int : 0' in a structure.  */
/* One can argue this should be 32 for -mint32, but since 32 bit ints only
   need 16 bit alignment, this is left as is so that -mint32 doesn't change
   structure layouts.  */
#define EMPTY_FIELD_BOUNDARY 16

/* A bit-field declared as `int' forces `int' alignment for the struct.  */
#define PCC_BITFIELD_TYPE_MATTERS  0

/* No data type wants to be aligned rounder than this.
   32 bit values are aligned as such on the H8/300H and H8S for speed.  */
#define BIGGEST_ALIGNMENT \
(((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)

/* The stack goes in 16/32 bit lumps.  */
#define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)

/* Define this if move instructions will actually fail to work
   when given unaligned data.  */
/* On the H8/300, longs can be aligned on halfword boundaries, but not
   byte boundaries.  */
#define STRICT_ALIGNMENT 1

/* Standard register usage.  */

/* Number of actual hardware registers.
   The hardware registers are assigned numbers for the compiler
   from 0 to just below FIRST_PSEUDO_REGISTER.

   All registers that the compiler knows about must be given numbers,
   even those that are not normally considered general registers.

   Reg 9 does not correspond to any hardware register, but instead
   appears in the RTL as an argument pointer prior to reload, and is
   eliminated during reloading in favor of either the stack or frame
   pointer.  */

#define FIRST_PSEUDO_REGISTER 11

/* 1 for registers that have pervasive standard uses
   and are not available for the register allocator.  */

#define FIXED_REGISTERS \
  { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1}

/* 1 for registers not available across function calls.
   These must include the FIXED_REGISTERS and also any
   registers that can be used without being saved.
   The latter must include the registers where values are returned
   and the register where structure-value addresses are passed.
   Aside from that, you can include as many other registers as you
   like.

   H8 destroys r0,r1,r2,r3.  */

#define CALL_USED_REGISTERS \
  { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 }

#define REG_ALLOC_ORDER \
  { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10}

#define CONDITIONAL_REGISTER_USAGE			\
{							\
  if (!TARGET_MAC)					\
    fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1;	\
}

/* Return number of consecutive hard regs needed starting at reg REGNO