larith.asm

linux下的gcc编译器

/* libgcc routines for M68HC11 & M68HC12.
   Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.

In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file with other programs, and to distribute
those programs without any restriction coming from the use of this
file.  (The General Public License restrictions do apply in other
respects; for example, they cover modification of the file, and
distribution when not linked into another program.)

This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

/* As a special exception, if you link this library with other files,
   some of which are compiled with GCC, to produce an executable,
   this library does not by itself cause the resulting executable
   to be covered by the GNU General Public License.
   This exception does not however invalidate any other reasons why
   the executable file might be covered by the GNU General Public License.  */

	.file "larith.asm"

#ifdef __HAVE_SHORT_INT__
	.mode mshort
#else
	.mode mlong
#endif

	.macro declare_near name
	.globl \name
	.type  \name,@function
	.size  \name,.Lend-\name
\name:
	.endm

#if defined(__USE_RTC__)
# define ARG(N) N+1

	.macro ret
#if defined(mc68hc12)
	rtc
#else
	jmp __return_32
#endif
	.endm

	.macro declare name
	.globl \name
	.type  \name,@function
	.size  \name,.Lend-\name
	.far   \name
\name:
	.endm

	.macro farsym name
	.far NAME
	.endm

#else
# define ARG(N) N

	.macro ret
	rts
	.endm

	.macro farsym name
	.endm

	.macro declare name
	.globl \name
	.type  \name,@function
	.size  \name,.Lend-\name
\name:
	.endm

#endif

	.sect .text
	

#define REG(NAME)			\
NAME:	.dc.w	1;			\
	.type NAME,@object ;		\
	.size NAME,2

#ifdef L_regs_min
/* Pseudo hard registers used by gcc.
   They should be located in page0.  */

	.sect .softregs
	.globl _.tmp
	.globl _.z,_.xy
REG(_.tmp)
REG(_.z)
REG(_.xy)

#endif

#ifdef L_regs_frame
	.sect .softregs
	.globl _.frame
REG(_.frame)
#endif

#ifdef L_regs_d1_2
	.sect .softregs
	.globl _.d1,_.d2
REG(_.d1)
REG(_.d2)
#endif

#ifdef L_regs_d3_4
	.sect .softregs
	.globl _.d3,_.d4
REG(_.d3)
REG(_.d4)
#endif

#ifdef L_regs_d5_6
	.sect .softregs
	.globl _.d5,_.d6
REG(_.d5)
REG(_.d6)
#endif

#ifdef L_regs_d7_8
	.sect .softregs
	.globl _.d7,_.d8
REG(_.d7)
REG(_.d8)
#endif

#ifdef L_regs_d9_16
/* Pseudo hard registers used by gcc.
   They should be located in page0.  */
	.sect .softregs
	.globl _.d9,_.d10,_.d11,_.d12,_.d13,_.d14
	.globl _.d15,_.d16
REG(_.d9)
REG(_.d10)
REG(_.d11)
REG(_.d12)
REG(_.d13)
REG(_.d14)
REG(_.d15)
REG(_.d16)

#endif

#ifdef L_regs_d17_32
/* Pseudo hard registers used by gcc.
   They should be located in page0.  */
	.sect .softregs
	.globl _.d17,_.d18,_.d19,_.d20,_.d21,_.d22
	.globl _.d23,_.d24,_.d25,_.d26,_.d27,_.d28
	.globl _.d29,_.d30,_.d31,_.d32
REG(_.d17)
REG(_.d18)
REG(_.d19)
REG(_.d20)
REG(_.d21)
REG(_.d22)
REG(_.d23)
REG(_.d24)
REG(_.d25)
REG(_.d26)
REG(_.d27)
REG(_.d28)
REG(_.d29)
REG(_.d30)
REG(_.d31)
REG(_.d32)
#endif

#ifdef L_premain
;;
;; Specific initialization for 68hc11 before the main.
;; Nothing special for a generic routine; Just enable interrupts.
;;
	declare_near	__premain
	clra
	tap	; Clear both I and X.
	rts
#endif

#ifdef L__exit
;;
;; Exit operation.  Just loop forever and wait for interrupts.
;; (no other place to go)
;; This operation is split in several pieces collected together by
;; the linker script.  This allows to support destructors at the
;; exit stage while not impacting program sizes when there is no
;; destructors.
;;
;; _exit:
;;    *(.fini0)		/* Beginning of finish code (_exit symbol).  */
;;    *(.fini1)		/* Place holder for applications.  */
;;    *(.fini2)		/* C++ destructors.  */
;;    *(.fini3)		/* Place holder for applications.  */
;;    *(.fini4)		/* Runtime exit.  */
;;
	.sect .fini0,"ax",@progbits
	.globl _exit
	.globl exit
	.weak  exit
	farsym  exit
	farsym  _exit
exit:
_exit:

	.sect .fini4,"ax",@progbits
fatal:
	cli
	wai
	bra fatal
#endif

#ifdef L_abort
;;
;; Abort operation.  This is defined for the GCC testsuite.
;;
	declare	abort

	ldd	#255		; 
#ifdef mc68hc12
	trap	#0x30
#else
	.byte 0xCD		; Generate an illegal instruction trap
	.byte 0x03		; The simulator catches this and stops.
#endif
	jmp _exit
#endif
	
#ifdef L_cleanup
;;
;; Cleanup operation used by exit().
;;
	declare	_cleanup

	ret
#endif

;-----------------------------------------
; required gcclib code
;-----------------------------------------
#ifdef L_memcpy
       declare	memcpy
       declare	__memcpy

	.weak memcpy
;;;
;;; void* memcpy(void*, const void*, size_t)
;;; 
;;; D    = dst	Pmode
;;; 2,sp = src	Pmode
;;; 4,sp = size	HImode (size_t)
;;; 
#ifdef mc68hc12
	ldx	ARG(2),sp
	ldy	ARG(4),sp
	pshd
	xgdy
	lsrd
	bcc	Start
	movb	1,x+,1,y+
Start:
	beq	Done
Loop:
	movw	2,x+,2,y+
	dbne	d,Loop
Done:
	puld
	ret
#else
	xgdy
	tsx
	ldd	ARG(4),x
	ldx	ARG(2),x	; SRC = X, DST = Y
	cpd	#0
	beq	End
	pshy
	inca			; Correction for the deca below
L0:
	psha			; Save high-counter part
L1:
	ldaa	0,x		; Copy up to 256 bytes
	staa	0,y
	inx
	iny
	decb
	bne	L1
	pula
	deca
	bne	L0
	puly			; Restore Y to return the DST
End:
	xgdy
	ret
#endif
#endif

#ifdef L_memset
       declare	memset
       declare	__memset
;;;
;;; void* memset(void*, int value, size_t)
;;; 
#ifndef __HAVE_SHORT_INT__
;;; D    = dst	Pmode
;;; 2,sp = src	SImode
;;; 6,sp = size	HImode (size_t)
	val  = ARG(5)
	size = ARG(6)
#else
;;; D    = dst	Pmode
;;; 2,sp = src	SImode
;;; 6,sp = size	HImode (size_t)
	val  = ARG(3)
	size = ARG(4)
#endif
#ifdef mc68hc12
	xgdx
	ldab	val,sp
	ldy	size,sp
	pshx
	beq	End
Loop:
	stab	1,x+
	dbne	y,Loop
End:
	puld
	ret
#else
	xgdx
	tsy
	ldab	val,y
	ldy	size,y		; DST = X, CNT = Y
	beq	End
	pshx
L0:
	stab	0,x		; Fill up to 256 bytes
	inx
	dey
	bne	L0
	pulx			; Restore X to return the DST
End:
	xgdx
	ret
#endif
#endif

#ifdef L_adddi3
	declare	___adddi3

	tsx
	xgdy
	ldd	ARG(8),x		; Add LSB
	addd	ARG(16),x
	std	6,y		; Save (carry preserved)

	ldd	ARG(6),x
	adcb	ARG(15),x
	adca	ARG(14),x
	std	4,y

	ldd	ARG(4),x
	adcb	ARG(13),x
	adca	ARG(12),x
	std	2,y
	
	ldd	ARG(2),x
	adcb	ARG(11),x		; Add MSB
	adca	ARG(10),x
	std	0,y

	xgdy
	ret
#endif

#ifdef L_subdi3
	declare	___subdi3

	tsx
	xgdy
	ldd	ARG(8),x		; Subtract LSB
	subd	ARG(16),x
	std	6,y			; Save, borrow preserved

	ldd	ARG(6),x
	sbcb	ARG(15),x
	sbca	ARG(14),x
	std	4,y

	ldd	ARG(4),x
	sbcb	ARG(13),x
	sbca	ARG(12),x
	std	2,y
	
	ldd	ARG(2),x		; Subtract MSB
	sbcb	ARG(11),x
	sbca	ARG(10),x
	std	0,y

	xgdy			;
	ret
#endif
	
#ifdef L_notdi2
	declare	___notdi2

	tsy
	xgdx
	ldd	ARG(8),y
	coma
	comb
	std	6,x
	
	ldd	ARG(6),y
	coma
	comb
	std	4,x

	ldd	ARG(4),y
	coma
	comb
	std	2,x

	ldd	ARG(2),y
	coma
	comb
	std	0,x
	xgdx
	ret
#endif
	
#ifdef L_negsi2
	declare_near ___negsi2

	comb
	coma
	xgdx
	comb
	coma
	inx
	xgdx
	bne	done
	inx
done:
	rts
#endif

#ifdef L_one_cmplsi2
	declare_near ___one_cmplsi2

	comb
	coma
	xgdx
	comb
	coma
	xgdx
	rts
#endif
	
#ifdef L_ashlsi3
	declare_near ___ashlsi3

	xgdy
	clra
	andb	#0x1f
	xgdy
	beq	Return
Loop:
	lsld
	xgdx
	rolb
	rola
	xgdx
	dey
	bne	Loop
Return:
	rts
#endif

#ifdef L_ashrsi3
	declare_near ___ashrsi3

	xgdy
	clra
	andb	#0x1f
	xgdy
	beq	Return
Loop:
	xgdx
	asra
	rorb
	xgdx
	rora
	rorb
	dey
	bne	Loop
Return:
	rts
#endif

#ifdef L_lshrsi3
	declare_near ___lshrsi3

	xgdy
	clra
	andb	#0x1f
	xgdy
	beq	Return
Loop:
	xgdx
	lsrd
	xgdx
	rora
	rorb
	dey
	bne	Loop
Return:
	rts
#endif

#ifdef L_lshrhi3
	declare_near ___lshrhi3

	cpx	#16
	bge	Return_zero
	cpx	#0
	beq	Return
Loop:
	lsrd
	dex
	bne	Loop
Return:
	rts
Return_zero:
	clra
	clrb
	rts
#endif
	
#ifdef L_lshlhi3
	declare_near ___lshlhi3

	cpx	#16
	bge	Return_zero
	cpx	#0
	beq	Return
Loop:
	lsld
	dex
	bne	Loop
Return:
	rts
Return_zero:
	clra
	clrb
	rts
#endif

#ifdef L_rotrhi3
	declare_near ___rotrhi3

___rotrhi3:
	xgdx
	clra
	andb	#0x0f
	xgdx
	beq	Return
Loop:
	tap
	rorb
	rora
	dex
	bne	Loop
Return:
	rts
#endif

#ifdef L_rotlhi3
	declare_near ___rotlhi3

___rotlhi3:
	xgdx
	clra
	andb	#0x0f
	xgdx
	beq	Return
Loop:
	asrb
	rolb
	rola
	rolb
	dex
	bne	Loop
Return:
	rts
#endif

#ifdef L_ashrhi3
	declare_near ___ashrhi3

	cpx	#16
	bge	Return_minus_1_or_zero
	cpx	#0
	beq	Return
Loop:
	asra
	rorb
	dex
	bne	Loop
Return:
	rts
Return_minus_1_or_zero:
	clrb
	tsta
	bpl	Return_zero
	comb
Return_zero:
	tba
	rts
#endif
	
#ifdef L_ashrqi3
	declare_near ___ashrqi3

	cmpa	#8
	bge	Return_minus_1_or_zero
	tsta
	beq	Return
Loop:
	asrb
	deca
	bne	Loop
Return:
	rts
Return_minus_1_or_zero:
	clrb
	tstb
	bpl	Return_zero
	coma
Return_zero:
	tab
	rts
#endif

#ifdef L_lshlqi3
	declare_near ___lshlqi3

	cmpa	#8
	bge	Return_zero
	tsta
	beq	Return
Loop:
	lslb
	deca