📄 m68k.h
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#else /* defined SUPPORT_SUN_FPA *//* * Notes on final choices: * * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything * else. * 2) Removed all unions that involve address registers with * floating point registers (left in unions of address and data with * floating point). * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS. * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS. * 4) Left in everything else. */enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS, FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS, DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS, GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES };#define N_REG_CLASSES (int) LIM_REG_CLASSES/* Give names of register classes as strings for dump file. */#define REG_CLASS_NAMES \ { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \ "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \ "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \ "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }/* Define which registers fit in which classes. This is an initializer for a vector of HARD_REG_SET of length N_REG_CLASSES. */#define REG_CLASS_CONTENTS \{ \ {0, 0}, /* NO_REGS */ \ {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \ {0xff000000, 0x00ffffff}, /* FPA_REGS */ \ {0x00ff0000, 0x00000000}, /* FP_REGS */ \ {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \ {0x000000ff, 0x00000000}, /* DATA_REGS */ \ {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \ {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \ {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\ {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \ {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \ {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\ {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\ {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \}/* The same information, inverted: Return the class number of the smallest class containing reg number REGNO. This could be a conditional expression or could index an array. */extern const enum reg_class regno_reg_class[];#define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])#endif /* SUPPORT_SUN_FPA *//* The class value for index registers, and the one for base regs. */#define INDEX_REG_CLASS GENERAL_REGS#define BASE_REG_CLASS ADDR_REGS/* Get reg_class from a letter such as appears in the machine description. We do a trick here to modify the effective constraints on the machine description; we zorch the constraint letters that aren't appropriate for a specific target. This allows us to guarantee that a specific kind of register will not be used for a given target without fiddling with the register classes above. */#ifndef SUPPORT_SUN_FPA#define REG_CLASS_FROM_LETTER(C) \ ((C) == 'a' ? ADDR_REGS : \ ((C) == 'd' ? DATA_REGS : \ ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ NO_REGS) : \ NO_REGS)))#else /* defined SUPPORT_SUN_FPA */#define REG_CLASS_FROM_LETTER(C) \ ((C) == 'a' ? ADDR_REGS : \ ((C) == 'd' ? DATA_REGS : \ ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ NO_REGS) : \ ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \ NO_REGS) : \ ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \ NO_REGS) : \ NO_REGS)))))#endif /* defined SUPPORT_SUN_FPA *//* The letters I, J, K, L and M in a register constraint string can be used to stand for particular ranges of immediate operands. This macro defines what the ranges are. C is the letter, and VALUE is a constant value. Return 1 if VALUE is in the range specified by C. For the 68000, `I' is used for the range 1 to 8 allowed as immediate shift counts and in addq. `J' is used for the range of signed numbers that fit in 16 bits. `K' is for numbers that moveq can't handle. `L' is for range -8 to -1, range of values that can be added with subq. `M' is for numbers that moveq+notb can't handle. 'N' is for range 24 to 31, rotatert:SI 8 to 1 expressed as rotate. 'O' is for 16 (for rotate using swap). 'P' is for range 8 to 15, rotatert:HI 8 to 1 expressed as rotate. */#define CONST_OK_FOR_LETTER_P(VALUE, C) \ ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \ (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \ (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \ (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \ (C) == 'M' ? (VALUE) < -0x100 || (VALUE) >= 0x100 : \ (C) == 'N' ? (VALUE) >= 24 && (VALUE) <= 31 : \ (C) == 'O' ? (VALUE) == 16 : \ (C) == 'P' ? (VALUE) >= 8 && (VALUE) <= 15 : 0)/* * A small bit of explanation: * "G" defines all of the floating constants that are *NOT* 68881 * constants. this is so 68881 constants get reloaded and the * fpmovecr is used. "H" defines *only* the class of constants that * the fpa can use, because these can be gotten at in any fpa * instruction and there is no need to force reloads. */#ifndef SUPPORT_SUN_FPA#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )#else /* defined SUPPORT_SUN_FPA */#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \ (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)#endif /* defined SUPPORT_SUN_FPA *//* A C expression that defines the optional machine-dependent constraint letters that can be used to segregate specific types of operands, usually memory references, for the target machine. It should return 1 if VALUE corresponds to the operand type represented by the constraint letter C. If C is not defined as an extra constraint, the value returned should be 0 regardless of VALUE. *//* Letters in the range `Q' through `U' may be defined in a machine-dependent fashion to stand for arbitrary operand types. The machine description macro `EXTRA_CONSTRAINT' is passed the operand as its first argument and the constraint letter as its second operand. `Q' means address register indirect addressing mode. `S' is for operands that satisfy 'm' when -mpcrel is in effect. `T' is for operands that satisfy 's' when -mpcrel is not in effect. */#define EXTRA_CONSTRAINT(OP,CODE) \ (((CODE) == 'S') \ ? (TARGET_PCREL \ && GET_CODE (OP) == MEM \ && (GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \ || GET_CODE (XEXP (OP, 0)) == LABEL_REF \ || GET_CODE (XEXP (OP, 0)) == CONST)) \ : \ (((CODE) == 'T') \ ? ( !TARGET_PCREL \ && (GET_CODE (OP) == SYMBOL_REF \ || GET_CODE (OP) == LABEL_REF \ || GET_CODE (OP) == CONST)) \ : \ (((CODE) == 'Q') \ ? (GET_CODE (OP) == MEM \ && GET_CODE (XEXP (OP, 0)) == REG) \ : \ 0)))/* Given an rtx X being reloaded into a reg required to be in class CLASS, return the class of reg to actually use. In general this is just CLASS; but on some machines in some cases it is preferable to use a more restrictive class. On the 68000 series, use a data reg if possible when the value is a constant in the range where moveq could be used and we ensure that QImodes are reloaded into data regs. */#define PREFERRED_RELOAD_CLASS(X,CLASS) \ ((GET_CODE (X) == CONST_INT \ && (unsigned) (INTVAL (X) + 0x80) < 0x100 \ && (CLASS) != ADDR_REGS) \ ? DATA_REGS \ : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \ ? DATA_REGS \ : (GET_CODE (X) == CONST_DOUBLE \ && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ ? (TARGET_68881 && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \ ? FP_REGS : NO_REGS) \ : (TARGET_PCREL \ && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF)) \ ? ADDR_REGS \ : (CLASS))/* Force QImode output reloads from subregs to be allocated to data regs, since QImode stores from address regs are not supported. We make the assumption that if the class is not ADDR_REGS, then it must be a superset of DATA_REGS. */#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ (((MODE) == QImode && (CLASS) != ADDR_REGS) \ ? DATA_REGS \ : (CLASS))/* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. *//* On the 68000, this is the size of MODE in words, except in the FP regs, where a single reg is always enough. */#ifndef SUPPORT_SUN_FPA#define CLASS_MAX_NREGS(CLASS, MODE) \ ((CLASS) == FP_REGS ? 1 \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))/* Moves between fp regs and other regs are two insns. */#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ ? 4 : 2)#else /* defined SUPPORT_SUN_FPA */#define CLASS_MAX_NREGS(CLASS, MODE) \ ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))/* Moves between fp regs and other regs are two insns. *//* Likewise for high fpa regs and other regs. */#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \ || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \ ? 4 : 2)#endif /* define SUPPORT_SUN_FPA *//* Stack layout; function entry, exit and calling. *//* Define this if pushing a word on the stack makes the stack pointer a smaller address. */#define STACK_GROWS_DOWNWARD/* Nonzero if we need to generate stack-probe insns. On most systems they are not needed. When they are needed, define this as the stack offset to probe at. */#define NEED_PROBE 0/* Define this if the nominal address of the stack frame is at the high-address end of the local variables; that is, each additional local variable allocated goes at a more negative offset in the frame. */#define FRAME_GROWS_DOWNWARD/* Offset within stack frame to start allocating local variables at. If FRAME_GROWS_DOWNWARD, this is the offset to the END of the first local allocated. Otherwise, it is the offset to the BEGINNING of the first local allocated. */#define STARTING_FRAME_OFFSET 0/* If we generate an insn to push BYTES bytes, this says how many the stack pointer really advances by. On the 68000, sp@- in a byte insn really pushes a word. On the 5200 (coldfire), sp@- in a byte insn pushes just a byte. */#define PUSH_ROUNDING(BYTES) (TARGET_5200 ? BYTES : ((BYTES) + 1) & ~1)/* We want to avoid trying to push bytes. */#define MOVE_BY_PIECES_P(SIZE, ALIGN) \ (move_by_pieces_ninsns (SIZE, ALIGN) < MOVE_RATIO \ && (((SIZE) >=16 && (ALIGN) >= 16) || (TARGET_5200)))/* Offset of first parameter from the argument pointer register value. */#define FIRST_PARM_OFFSET(FNDECL) 8/* Value is the number of byte of arguments automatically popped when returning from a subroutine call. FUNDECL is the declaration node of the function (as a tree), FUNTYPE is the data type of the function (as a tree), or for a library call it is an identifier node for the subroutine name. SIZE is the number of bytes of arguments passed on the stack. On the 68000, the RTS insn cannot pop anything. On the 68010, the RTD insn may be used to pop them if the number of args is fixed, but if the number is variable then the caller must pop them all. RTD can't be used for library calls now because the library is compiled with the Unix compiler. Use of RTD is a selectable option, since it is incompatible with standard Unix calling sequences. If the option is not selected, the caller must always pop the args. */#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \ ((TARGET_RTD && (!(FUNDECL) || TREE_CODE (FUNDECL) != IDENTIFIER_NODE) \ && (TYPE_ARG_TYPES (FUNTYPE) == 0 \ || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \ == void_type_node))) \ ? (SIZE) : 0)/* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. *//* On the 68000 the return value is in D0 regardless. */#define FUNCTION_VALUE(VALTYPE, FUNC) \ gen_rtx_REG (TYPE_MODE (VALTYPE), 0)/* Define how to find the value returned by a library function assuming the value has mode MODE. *//* On the 68000 the return value is in D0 regardless. */#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)/* 1 if N is a possible register number for a function value. On the 68000, d0 is the only register thus used. */#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)/* Define this to be true when FUNCTION_VALUE_REGNO_P is true for more than one register. */
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