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📄 m68k.h

📁 linux下的gcc编译器
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/* Definitions of target machine for GNU compiler.   Sun 68000/68020 version.   Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999,   2000, 2001, 2002 Free Software Foundation, Inc.This file is part of GNU CC.GNU CC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GNU CC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GNU CC; see the file COPYING.  If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA.  *//* Note that some other tm.h files include this one and then override   many of the definitions that relate to assembler syntax.  *//* Classify the groups of pseudo-ops used to assemble QI, HI and SI   quantities.  */#define INT_OP_STANDARD	0	/* .byte, .short, .long */#define INT_OP_DOT_WORD	1	/* .byte, .word, .long */#define INT_OP_NO_DOT   2	/* byte, short, long */#define INT_OP_DC	3	/* dc.b, dc.w, dc.l *//* Set the default */#define INT_OP_GROUP INT_OP_DOT_WORD/* Names to predefine in the preprocessor for this target machine.  *//* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES.  *//* Print subsidiary information on the compiler version in use.  */#ifdef MOTOROLA#define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");#else#define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");#endif/* Define SUPPORT_SUN_FPA to include support for generating code for   the Sun Floating Point Accelerator, an optional product for Sun 3   machines.  By default, it is not defined.  Avoid defining it unless   you need to output code for the Sun3+FPA architecture, as it has the   effect of slowing down the register set operations in hard-reg-set.h   (total number of registers will exceed number of bits in a long,   if defined, causing the set operations to expand to loops).   SUPPORT_SUN_FPA is typically defined in sun3.h.  *//* Run-time compilation parameters selecting different hardware subsets.  */extern int target_flags;/* Macros used in the machine description to test the flags.  *//* Compile for a 68020 (not a 68000 or 68010).  */#define MASK_68020	1#define TARGET_68020 (target_flags & MASK_68020)/* Compile 68881 insns for floating point (not library calls).  */#define MASK_68881	2#define TARGET_68881 (target_flags & MASK_68881)/* Compile using 68020 bit-field insns.  */#define MASK_BITFIELD	4#define TARGET_BITFIELD (target_flags & MASK_BITFIELD)/* Compile using rtd insn calling sequence.   This will not work unless you use prototypes at least   for all functions that can take varying numbers of args.  */#define MASK_RTD	8#define TARGET_RTD (target_flags & MASK_RTD)/* Compile passing first two args in regs 0 and 1.   This exists only to test compiler features that will   be needed for RISC chips.  It is not usable   and is not intended to be usable on this cpu.  */#define MASK_REGPARM	16#define TARGET_REGPARM (target_flags & MASK_REGPARM)/* Compile with 16-bit `int'.  */#define MASK_SHORT	32#define TARGET_SHORT (target_flags & MASK_SHORT)/* Compile with special insns for Sun FPA.  */#define MASK_FPA	64#define TARGET_FPA (target_flags & MASK_FPA)/* Compile (actually, link) for Sun SKY board.  */#define MASK_SKY	128#define TARGET_SKY (target_flags & MASK_SKY)/* Optimize for 68040, but still allow execution on 68020   (-m68020-40 or -m68040).   The 68040 will execute all 68030 and 68881/2 instructions, but some   of them must be emulated in software by the OS.  When TARGET_68040 is   turned on, these instructions won't be used.  This code will still   run on a 68030 and 68881/2.  */#define MASK_68040	256#define TARGET_68040 (target_flags & MASK_68040)/* Use the 68040-only fp instructions (-m68040 or -m68060).  */#define MASK_68040_ONLY	512#define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)/* Optimize for 68060, but still allow execution on 68020   (-m68020-60 or -m68060).   The 68060 will execute all 68030 and 68881/2 instructions, but some   of them must be emulated in software by the OS.  When TARGET_68060 is   turned on, these instructions won't be used.  This code will still   run on a 68030 and 68881/2.  */#define MASK_68060	1024#define TARGET_68060 (target_flags & MASK_68060)/* Compile for mcf5200 */#define MASK_5200	2048#define TARGET_5200 (target_flags & MASK_5200)/* Align ints to a word boundary.  This breaks compatibility with the    published ABI's for structures containing ints, but produces faster   code on cpus with 32 bit busses (020, 030, 040, 060, CPU32+, coldfire).   It's required for coldfire cpus without a misalignment module.  */#define MASK_ALIGN_INT	4096#define TARGET_ALIGN_INT (target_flags & MASK_ALIGN_INT)/* Compile for a CPU32 */	/* A 68020 without bitfields is a good heuristic for a CPU32 */#define TARGET_CPU32	(TARGET_68020 && !TARGET_BITFIELD)/* Use PC-relative addressing modes (without using a global offset table).   The m68000 supports 16-bit PC-relative addressing.   The m68020 supports 32-bit PC-relative addressing   (using outer displacements).   Under this model, all SYMBOL_REFs (and CONSTs) and LABEL_REFs are   treated as all containing an implicit PC-relative component, and hence   cannot be used directly as addresses for memory writes.  See the comments   in m68k.c for more information.  */#define MASK_PCREL	8192#define TARGET_PCREL	(target_flags & MASK_PCREL)/* Relax strict alignment.  */#define MASK_NO_STRICT_ALIGNMENT 16384#define TARGET_STRICT_ALIGNMENT  (~target_flags & MASK_NO_STRICT_ALIGNMENT)/* Macro to define tables used to set the flags.   This is a list in braces of pairs in braces,   each pair being { "NAME", VALUE }   where VALUE is the bits to set or minus the bits to clear.   An empty string NAME is used to identify the default VALUE.  */#define TARGET_SWITCHES							\  { { "68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY),	\      N_("Generate code for a 68020") },				\    { "c68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY),	\      N_("Generate code for a 68020") },				\    { "68020", (MASK_68020|MASK_BITFIELD), "" },			\    { "c68020", (MASK_68020|MASK_BITFIELD), "" },			\    { "68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\		|MASK_68020|MASK_BITFIELD|MASK_68881),			\      N_("Generate code for a 68000") },				\    { "c68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\		|MASK_68020|MASK_BITFIELD|MASK_68881),			\      N_("Generate code for a 68000") },				\    { "bitfield", MASK_BITFIELD,					\      N_("Use the bit-field instructions") },				\    { "nobitfield", - MASK_BITFIELD,					\      N_("Do not use the bit-field instructions") },			\    { "rtd", MASK_RTD,							\      N_("Use different calling convention using 'rtd'") },		\    { "nortd", - MASK_RTD,						\      N_("Use normal calling convention") },				\    { "short", MASK_SHORT,						\      N_("Consider type `int' to be 16 bits wide") },			\    { "noshort", - MASK_SHORT,						\      N_("Consider type `int' to be 32 bits wide") },			\    { "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881),			\      N_("Generate code for a Sun FPA") },				\    { "fpa", MASK_FPA, "" },						\    { "nofpa", - MASK_FPA,						\      N_("Do not generate code for a Sun FPA") },			\    { "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881),			\      N_("Generate code for a Sun Sky board") },			\    { "sky", MASK_SKY,							\      N_("Generate code for a Sun Sky board") },			\    { "nosky", - MASK_SKY,						\      N_("Do not use Sky linkage convention") },			\    { "68881", - (MASK_FPA|MASK_SKY),					\      N_("Generate code for a 68881") },				\    { "68881", MASK_68881, "" },					\    { "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881),	\      N_("Generate code with library calls for floating point") },	\    { "68020-40", -(MASK_5200|MASK_68060|MASK_68040_ONLY),		\      N_("Generate code for a 68040, without any new instructions") },	\    { "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040), ""},\    { "68020-60", -(MASK_5200|MASK_68040_ONLY),				\      N_("Generate code for a 68060, without any new instructions") },	\    { "68020-60", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040	\		   |MASK_68060), "" },					\    { "68030", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY),	\      N_("Generate code for a 68030") },				\    { "68030", (MASK_68020|MASK_BITFIELD), "" },			\    { "68040", - (MASK_5200|MASK_68060),				\      N_("Generate code for a 68040") },				\    { "68040", (MASK_68020|MASK_68881|MASK_BITFIELD			\		|MASK_68040_ONLY|MASK_68040), "" },			\    { "68060", - (MASK_5200|MASK_68040),				\      N_("Generate code for a 68060") },				\    { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD			\		|MASK_68040_ONLY|MASK_68060), "" },			\    { "5200", - (MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020	\		|MASK_BITFIELD|MASK_68881),				\      N_("Generate code for a 520X") },					\    { "5200", (MASK_5200), "" },					\    { "68851", 0,							\      N_("Generate code for a 68851") },				\    { "no-68851", 0,							\      N_("Do no generate code for a 68851") },				\    { "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\		  |MASK_68020|MASK_BITFIELD|MASK_68881),		\      N_("Generate code for a 68302") },				\    { "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\		  |MASK_BITFIELD|MASK_68881),				\      N_("Generate code for a 68332") },				\    { "68332", MASK_68020, "" },					\    { "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY	\		  |MASK_BITFIELD|MASK_68881),				\      N_("Generate code for a cpu32") },				\    { "cpu32", MASK_68020, "" },					\    { "align-int", MASK_ALIGN_INT, 					\      N_("Align variables on a 32-bit boundary") },			\    { "no-align-int", -MASK_ALIGN_INT, 					\      N_("Align variables on a 16-bit boundary") },			\    { "pcrel", MASK_PCREL,						\      N_("Generate pc-relative code") },				\    { "strict-align", -MASK_NO_STRICT_ALIGNMENT,			\      N_("Do not use unaligned memory references") },			\    { "no-strict-align", MASK_NO_STRICT_ALIGNMENT,			\      N_("Use unaligned memory references") },				\    SUBTARGET_SWITCHES							\    { "", TARGET_DEFAULT, "" }}/* TARGET_DEFAULT is defined in sun*.h and isi.h, etc.  *//* This macro is similar to `TARGET_SWITCHES' but defines names of   command options that have values.  Its definition is an   initializer with a subgrouping for each command option.   Each subgrouping contains a string constant, that defines the   fixed part of the option name, and the address of a variable.  The   variable, type `char *', is set to the variable part of the given   option if the fixed part matches.  The actual option name is made   by appending `-m' to the specified name.  */#define TARGET_OPTIONS							\{ { "align-loops=",	&m68k_align_loops_string,			\    N_("Loop code aligned to this power of 2") },			\  { "align-jumps=",	&m68k_align_jumps_string,			\    N_("Jump targets are aligned to this power of 2") },		\  { "align-functions=",	&m68k_align_funcs_string,			\    N_("Function starts are aligned to this power of 2") },		\  SUBTARGET_OPTIONS							\}/* Sometimes certain combinations of command options do not make   sense on a particular target machine.  You can define a macro   `OVERRIDE_OPTIONS' to take account of this.  This macro, if   defined, is executed once just after all the command options have   been parsed.   Don't use this macro to turn on various extra optimizations for   `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */#define OVERRIDE_OPTIONS   override_options()/* These are meant to be redefined in the host dependent files */#define SUBTARGET_SWITCHES#define SUBTARGET_OPTIONS#define SUBTARGET_OVERRIDE_OPTIONS/* target machine storage layout *//* Define for XFmode extended real floating point support.  */#define LONG_DOUBLE_TYPE_SIZE 96/* Set the value of FLT_EVAL_METHOD in float.h.  When using 68040 fp   instructions, we get proper intermediate rounding, otherwise we    get extended precision results.  */#define TARGET_FLT_EVAL_METHOD (TARGET_68040_ONLY ? 0 : 2)/* Define this if most significant bit is lowest numbered   in instructions that operate on numbered bit-fields.   This is true for 68020 insns such as bfins and bfexts.   We make it true always by avoiding using the single-bit insns   except in special cases with constant bit numbers.  */#define BITS_BIG_ENDIAN 1/* Define this if most significant byte of a word is the lowest numbered.  *//* That is true on the 68000.  */#define BYTES_BIG_ENDIAN 1/* Define this if most significant word of a multiword number is the lowest   numbered.  *//* For 68000 we can decide arbitrarily   since there are no machine instructions for them.   So let's be consistent.  */#define WORDS_BIG_ENDIAN 1/* Width of a word, in units (bytes).  */#define UNITS_PER_WORD 4/* Allocation boundary (in *bits*) for storing arguments in argument list.  */#define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)/* Boundary (in *bits*) on which stack pointer should be aligned.  */#define STACK_BOUNDARY 16/* Allocation boundary (in *bits*) for the code of a function.  */#define FUNCTION_BOUNDARY (1 << (m68k_align_funcs + 3))/* Alignment of field after `int : 0' in a structure.  */#define EMPTY_FIELD_BOUNDARY 16/* No data type wants to be aligned rounder than this.    Most published ABIs say that ints should be aligned on 16 bit

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