📄 v850.h
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#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ ((TYPE) && int_size_in_bytes (TYPE) > 8)/* 1 if N is a possible register number for function argument passing. */#define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)/* Define how to find the value returned by a function. VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ gen_rtx_REG (TYPE_MODE (VALTYPE), 10)/* Define how to find the value returned by a library function assuming the value has mode MODE. */#define LIBCALL_VALUE(MODE) \ gen_rtx_REG (MODE, 10)/* 1 if N is a possible register number for a function value. */#define FUNCTION_VALUE_REGNO_P(N) ((N) == 10)/* Return values > 8 bytes in length in memory. */#define DEFAULT_PCC_STRUCT_RETURN 0#define RETURN_IN_MEMORY(TYPE) \ (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)/* Register in which address to store a structure value is passed to a function. On the V850 it's passed as the first parameter. */#define STRUCT_VALUE 0/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, the stack pointer does not matter. The value is tested only in functions that have frame pointers. No definition is equivalent to always zero. */#define EXIT_IGNORE_STACK 1/* Define this macro as a C expression that is nonzero for registers used by the epilogue or the `return' pattern. */#define EPILOGUE_USES(REGNO) \ (reload_completed && (REGNO) == LINK_POINTER_REGNUM)/* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */#define FUNCTION_PROFILER(FILE, LABELNO) ;#define TRAMPOLINE_TEMPLATE(FILE) \ do { \ fprintf (FILE, "\tjarl .+4,r12\n"); \ fprintf (FILE, "\tld.w 12[r12],r20\n"); \ fprintf (FILE, "\tld.w 16[r12],r12\n"); \ fprintf (FILE, "\tjmp [r12]\n"); \ fprintf (FILE, "\tnop\n"); \ fprintf (FILE, "\t.long 0\n"); \ fprintf (FILE, "\t.long 0\n"); \ } while (0)/* Length in units of the trampoline for entering a nested function. */#define TRAMPOLINE_SIZE 24/* Emit RTL insns to initialize the variable parts of a trampoline. FNADDR is an RTX for the address of the function's pure code. CXT is an RTX for the static chain value for the function. */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \{ \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 16)), \ (CXT)); \ emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 20)), \ (FNADDR)); \}/* Addressing modes, and classification of registers for them. *//* 1 if X is an rtx for a constant that is a valid address. *//* ??? This seems too exclusive. May get better code by accepting more possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */#define CONSTANT_ADDRESS_P(X) \ (GET_CODE (X) == CONST_INT \ && CONST_OK_FOR_K (INTVAL (X)))/* Maximum number of registers that can appear in a valid memory address. */#define MAX_REGS_PER_ADDRESS 1/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. */#ifndef REG_OK_STRICT/* Nonzero if X is a hard reg that can be used as an index or if it is a pseudo reg. */#define REG_OK_FOR_INDEX_P(X) 0/* Nonzero if X is a hard reg that can be used as a base reg or if it is a pseudo reg. */#define REG_OK_FOR_BASE_P(X) 1#define REG_OK_FOR_INDEX_P_STRICT(X) 0#define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))#define STRICT 0#else/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) 0/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#define STRICT 1#endif/* A C expression that defines the optional machine-dependent constraint letters that can be used to segregate specific types of operands, usually memory references, for the target machine. Normally this macro will not be defined. If it is required for a particular target machine, it should return 1 if VALUE corresponds to the operand type represented by the constraint letter C. If C is not defined as an extra constraint, the value returned should be 0 regardless of VALUE. For example, on the ROMP, load instructions cannot have their output in r0 if the memory reference contains a symbolic address. Constraint letter `Q' is defined as representing a memory address that does *not* contain a symbolic address. An alternative is specified with a `Q' constraint on the input and `r' on the output. The next alternative specifies `m' on the input and a register class that does not include r0 on the output. */#define EXTRA_CONSTRAINT(OP, C) \ ((C) == 'Q' ? ep_memory_operand (OP, GET_MODE (OP), 0) \ : (C) == 'R' ? special_symbolref_operand (OP, VOIDmode) \ : (C) == 'S' ? (GET_CODE (OP) == SYMBOL_REF && ! ZDA_NAME_P (XSTR (OP, 0))) \ : (C) == 'T' ? ep_memory_operand(OP,GET_MODE(OP),TRUE) \ : (C) == 'U' ? ((GET_CODE (OP) == SYMBOL_REF && ZDA_NAME_P (XSTR (OP, 0))) \ || (GET_CODE (OP) == CONST \ && GET_CODE (XEXP (OP, 0)) == PLUS \ && GET_CODE (XEXP (XEXP (OP, 0), 0)) == SYMBOL_REF \ && ZDA_NAME_P (XSTR (XEXP (XEXP (OP, 0), 0), 0)))) \ : 0)/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, except for CONSTANT_ADDRESS_P which is actually machine-independent. *//* Accept either REG or SUBREG where a register is valid. */ #define RTX_OK_FOR_BASE_P(X) \ ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ && REG_OK_FOR_BASE_P (SUBREG_REG (X))))#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \do { \ if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \ if (CONSTANT_ADDRESS_P (X) \ && (MODE == QImode || INTVAL (X) % 2 == 0) \ && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \ goto ADDR; \ if (GET_CODE (X) == LO_SUM \ && GET_CODE (XEXP (X, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ && CONSTANT_P (XEXP (X, 1)) \ && (GET_CODE (XEXP (X, 1)) != CONST_INT \ || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \ && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \ && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \ goto ADDR; \ if (special_symbolref_operand (X, MODE) \ && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \ goto ADDR; \ if (GET_CODE (X) == PLUS \ && CONSTANT_ADDRESS_P (XEXP (X, 1)) \ && (MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \ && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR; \} while (0)/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. */#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}/* Nonzero if the constant value X is a legitimate general operand. It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */#define LEGITIMATE_CONSTANT_P(X) \ (GET_CODE (X) == CONST_DOUBLE \ || !(GET_CODE (X) == CONST \ && GET_CODE (XEXP (X, 0)) == PLUS \ && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \ && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ && ! CONST_OK_FOR_K (INTVAL (XEXP (XEXP (X, 0), 1)))))/* In rare cases, correct code generation requires extra machine dependent processing between the second jump optimization pass and delayed branch scheduling. On those machines, define this macro as a C statement to act on the code starting at INSN. */#define MACHINE_DEPENDENT_REORG(INSN) v850_reorg (INSN)/* Tell final.c how to eliminate redundant test instructions. *//* Here we define machine-dependent flags and fields in cc_status (see `conditions.h'). No extra ones are needed for the VAX. *//* Store in cc_status the expressions that the condition codes will describe after execution of an instruction whose pattern is EXP. Do not alter them if the instruction would not alter the cc's. */#define CC_OVERFLOW_UNUSABLE 0x200#define CC_NO_CARRY CC_NO_OVERFLOW#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)/* A part of a C `switch' statement that describes the relative costs of constant RTL expressions. It must contain `case' labels for expression codes `const_int', `const', `symbol_ref', `label_ref' and `const_double'. Each case must ultimately reach a `return' statement to return the relative cost of the use of that kind of constant value in an expression. The cost may depend on the precise value of the constant, which is available for examination in X, and the rtx code of the expression in which it is contained, found in OUTER_CODE. CODE is the expression code--redundant, since it can be obtained with `GET_CODE (X)'. */#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ case CONST_INT: \ case CONST_DOUBLE: \ case CONST: \ case SYMBOL_REF: \ case LABEL_REF: \ { \ int _zxy = const_costs(RTX, CODE); \ return (_zxy) ? COSTS_N_INSNS (_zxy) : 0; \ }/* A crude cut at RTX_COSTS for the V850. *//* Provide the costs of a rtl expression. This is in the body of a switch on CODE. There aren't DImode MOD, DIV or MULT operations, so call them very expensive. Everything else is pretty much a constant cost. */#define RTX_COSTS(RTX,CODE,OUTER_CODE) \ case MOD: \ case DIV: \ case UMOD: \ case UDIV: \ if (TARGET_V850E && optimize_size) \ return 6; \ return 60; \ case MULT: \ if (TARGET_V850E \ && ( GET_MODE (RTX) == SImode \ || GET_MODE (RTX) == HImode \ || GET_MODE (RTX) == QImode)) \ { \ if (GET_CODE (XEXP (RTX, 1)) == REG) \ return 4; \ else if (GET_CODE (XEXP (RTX, 1)) == CONST_INT) \ { \ if (CONST_OK_FOR_O (INTVAL (XEXP (RTX, 1)))) \ return 6; \ else if (CONST_OK_FOR_K (INTVAL (XEXP (RTX, 1)))) \ return 10; \ } \ } \ return 20;/* All addressing modes have the same cost on the V850 series. */#define ADDRESS_COST(ADDR) 1/* Nonzero if access to memory by bytes or half words is no faster than accessing full words. */#define SLOW_BYTE_ACCESS 1/* According expr.c, a value of around 6 should minimize code size, and for the V850 series, that's our primary concern. */#define MOVE_RATIO 6/* Indirect calls are expensive, never turn a direct call into an indirect call. */#define NO_FUNCTION_CSE/* The four different data regions on the v850. */typedef enum { DATA_AREA_NORMAL, DATA_AREA_SDA, DATA_AREA_TDA, DATA_AREA_ZDA} v850_data_area;/* A list of names for sections other than the standard two, which are `in_text' and `in_data'. You need not define this macro on a system with no other sections (that GCC needs to use). */#undef EXTRA_SECTIONS#define EXTRA_SECTIONS in_tdata, in_sdata, in_zdata, \ in_rozdata, in_rosdata, in_sbss, in_zbss, in_zcommon, in_scommon/* One or more functions to be defined in `varasm.c'. These functions should do jobs analogous to those of `text_section' and `data_section', for your additional sections. Do not define this macro if you do not define `EXTRA_SECTIONS'. */#undef EXTRA_SECTION_FUNCTIONS/* This could be done a lot more cleanly using ANSI C ... */#define EXTRA_SECTION_FUNCTIONS \void \sdata_section () \{ \ if (in_section != in_sdata) \ { \ fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ in_section = in_sdata; \ } \} \ \void \rosdata_section () \{ \ if (in_section != in_rosdata) \ { \ fprintf (asm_out_file, "%s\n", ROSDATA_SECTION_ASM_OP); \ in_section = in_sdata; \ } \} \ \void \sbss_section () \{ \ if (in_section != in_sbss) \ { \ fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \ in_section = in_sbss; \ } \} \ \void \
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