mcore.md

linux下的gcc编译器

  "*
{
   switch (which_alternative)
     {
     case 0: return \"or	%0,%2\";
     case 1: return \"bseti	%0,%P2\";
     case 2: return mcore_output_bseti (operands[0], INTVAL (operands[2]));
     default: abort ();
     }
}")

(define_insn ""
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r,r")
	(ior:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0,0,0")
		(match_operand:SI 2 "mcore_arith_M_operand" "r,M,T")))]
  "!TARGET_RELAX_IMM"
  "*
{
   switch (which_alternative)
     {
     case 0: return \"or	%0,%2\";
     case 1: return \"bseti	%0,%P2\";
     case 2: return mcore_output_bseti (operands[0], INTVAL (operands[2]));
     default: abort ();
     }
}")

;(define_insn ""
;  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
;	(ior:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0")
;		(match_operand:SI 2 "const_int_operand" "M")))]
;  "exact_log2 (INTVAL (operands[2])) >= 0"
;  "bseti	%0,%P2")

;(define_insn ""
;  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
;	(ior:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0")
;		(match_operand:SI 2 "const_int_operand" "i")))]
;  "mcore_num_ones (INTVAL (operands[2])) < 3"
;  "* return mcore_output_bseti (operands[0], INTVAL (operands[2]));")

(define_insn "xorsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
	(xor:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0")
		(match_operand:SI 2 "mcore_arith_reg_operand" "r")))]
  ""
  "xor	%0,%2")

; these patterns give better code then gcc invents if
; left to its own devices

(define_insn "anddi3"
  [(set (match_operand:DI 0 "mcore_arith_reg_operand" "=r")
	(and:DI (match_operand:DI 1 "mcore_arith_reg_operand" "%0")
		(match_operand:DI 2 "mcore_arith_reg_operand" "r")))]
  ""
  "and	%0,%2\;and	%R0,%R2"
  [(set_attr "length" "4")])

(define_insn "iordi3"
  [(set (match_operand:DI 0 "mcore_arith_reg_operand" "=r")
	(ior:DI (match_operand:DI 1 "mcore_arith_reg_operand" "%0")
		(match_operand:DI 2 "mcore_arith_reg_operand" "r")))]
  ""
  "or	%0,%2\;or	%R0,%R2"
  [(set_attr "length" "4")])

(define_insn "xordi3"
  [(set (match_operand:DI 0 "mcore_arith_reg_operand" "=r")
	(xor:DI (match_operand:DI 1 "mcore_arith_reg_operand" "%0")
		(match_operand:DI 2 "mcore_arith_reg_operand" "r")))]
  ""
  "xor	%0,%2\;xor	%R0,%R2"
  [(set_attr "length" "4")])

;; -------------------------------------------------------------------------
;; Shifts and rotates
;; -------------------------------------------------------------------------

;; Only allow these if the shift count is a convenient constant.
(define_expand "rotlsi3"
  [(set (match_operand:SI            0 "mcore_arith_reg_operand" "")
	(rotate:SI (match_operand:SI 1 "mcore_arith_reg_operand" "")
		   (match_operand:SI 2 "nonmemory_operand" "")))]
  ""
  "if (! mcore_literal_K_operand (operands[2], SImode))
	 FAIL;
  ")

;; We can only do constant rotates, which is what this pattern provides.
;; The combiner will put it together for us when we do:
;;	(x << N) | (x >> (32 - N))
(define_insn ""
  [(set (match_operand:SI              0 "mcore_arith_reg_operand" "=r")
	(rotate:SI (match_operand:SI   1 "mcore_arith_reg_operand"  "0")
		     (match_operand:SI 2 "mcore_literal_K_operand"  "K")))]
  ""
  "rotli	%0,%2"
  [(set_attr "type" "shift")])

(define_insn "ashlsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r")
	(ashift:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,0")
		   (match_operand:SI 2 "mcore_arith_K_operand_not_0" "r,K")))]
  ""
  "@
	lsl	%0,%2
	lsli	%0,%2"
  [(set_attr "type" "shift")])

(define_insn ""
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
	(ashift:SI (const_int 1)
		   (match_operand:SI 1 "mcore_arith_reg_operand" "r")))]
  ""
  "bgenr	%0,%1"
  [(set_attr "type" "shift")])

(define_insn "ashrsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r")
	(ashiftrt:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,0")
		     (match_operand:SI 2 "mcore_arith_K_operand_not_0" "r,K")))]
  ""
  "@
	asr	%0,%2
	asri	%0,%2"
  [(set_attr "type" "shift")])

(define_insn "lshrsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r")
	(lshiftrt:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,0")
		     (match_operand:SI 2 "mcore_arith_K_operand_not_0" "r,K")))]
  ""
  "@
	lsr	%0,%2
	lsri	%0,%2"
  [(set_attr "type" "shift")])

;(define_expand "ashldi3"
;  [(parallel[(set (match_operand:DI 0 "mcore_arith_reg_operand" "")
;		  (ashift:DI (match_operand:DI 1 "mcore_arith_reg_operand" "")
;			     (match_operand:DI 2 "immediate_operand" "")))
;
;	     (clobber (reg:CC 17))])]
;	    
;  ""
;  "
;{
;  if (GET_CODE (operands[2]) != CONST_INT
;      || INTVAL (operands[2]) != 1)
;    FAIL;
;}")
;
;(define_insn ""
;  [(set (match_operand:DI 0 "mcore_arith_reg_operand" "=r")
;	(ashift:DI (match_operand:DI 1 "mcore_arith_reg_operand" "0")
;		     (const_int 1)))
;   (clobber (reg:CC 17))]
;  ""
;  "lsli	%R0,0\;rotli	%0,0"
;  [(set_attr "length" "4") (set_attr "type" "shift")])

;; -------------------------------------------------------------------------
;; Index instructions
;; -------------------------------------------------------------------------
;; The second of each set of patterns is borrowed from the alpha.md file.
;; These variants of the above insns can occur if the second operand
;; is the frame pointer.  This is a kludge, but there doesn't
;; seem to be a way around it.  Only recognize them while reloading.

;; We must use reload_operand for some operands in case frame pointer
;; elimination put a MEM with invalid address there.  Otherwise,
;; the result of the substitution will not match this pattern, and reload
;; will not be able to correctly fix the result.

;; indexing longlongs or doubles (8 bytes)

(define_insn "indexdi_t"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
	(plus:SI (mult:SI (match_operand:SI 1 "mcore_arith_reg_operand" "r")
			  (const_int 8))
		 (match_operand:SI 2 "mcore_arith_reg_operand" "0")))]
  ""
  "*
    if (! mcore_is_same_reg (operands[1], operands[2]))
      {
        output_asm_insn (\"ixw\\t%0,%1\", operands);
        output_asm_insn (\"ixw\\t%0,%1\", operands);
      }
    else
      {
        output_asm_insn (\"ixh\\t%0,%1\", operands);
        output_asm_insn (\"ixh\\t%0,%1\", operands);
      }
    return \"\";
  "
;; if operands[1] == operands[2], the first option above is wrong! -- dac
;; was this... -- dac
;; ixw	%0,%1\;ixw	%0,%1"

  [(set_attr "length" "4")])

(define_insn ""
  [(set (match_operand:SI 0 "mcore_reload_operand" "=r,r,r")
	(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "mcore_reload_operand" "r,r,r")
				   (const_int 8))
			  (match_operand:SI 2 "mcore_arith_reg_operand" "0,0,0"))
		 (match_operand:SI 3 "mcore_addsub_operand" "r,J,L")))]
  "reload_in_progress"
  "@
	ixw	%0,%1\;ixw	%0,%1\;addu	%0,%3
	ixw	%0,%1\;ixw	%0,%1\;addi	%0,%3
	ixw	%0,%1\;ixw	%0,%1\;subi	%0,%M3"
  [(set_attr "length" "6")])

;; indexing longs (4 bytes)

(define_insn "indexsi_t"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
	(plus:SI (mult:SI (match_operand:SI 1 "mcore_arith_reg_operand" "r")
			  (const_int 4))
		 (match_operand:SI 2 "mcore_arith_reg_operand" "0")))]
  ""
  "ixw	%0,%1")

(define_insn ""
  [(set (match_operand:SI 0 "mcore_reload_operand" "=r,r,r")
	(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "mcore_reload_operand" "r,r,r")
				   (const_int 4))
			  (match_operand:SI 2 "mcore_arith_reg_operand" "0,0,0"))
		 (match_operand:SI 3 "mcore_addsub_operand" "r,J,L")))]
  "reload_in_progress"
  "@
	ixw	%0,%1\;addu	%0,%3
	ixw	%0,%1\;addi	%0,%3
	ixw	%0,%1\;subi	%0,%M3"
  [(set_attr "length" "4")])

;; indexing shorts (2 bytes)

(define_insn "indexhi_t"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
	(plus:SI (mult:SI (match_operand:SI 1 "mcore_arith_reg_operand" "r")
			  (const_int 2))
		 (match_operand:SI 2 "mcore_arith_reg_operand" "0")))]
  ""
  "ixh	%0,%1")

(define_insn ""
  [(set (match_operand:SI 0 "mcore_reload_operand" "=r,r,r")
	(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "mcore_reload_operand" "r,r,r")
				   (const_int 2))
			  (match_operand:SI 2 "mcore_arith_reg_operand" "0,0,0"))
		 (match_operand:SI 3 "mcore_addsub_operand" "r,J,L")))]
  "reload_in_progress"
  "@
	ixh	%0,%1\;addu	%0,%3
	ixh	%0,%1\;addi	%0,%3
	ixh	%0,%1\;subi	%0,%M3"
  [(set_attr "length" "4")])

;;
;; Other sizes may be handy for indexing. 
;; the tradeoffs to consider when adding these are
;;	codesize, execution time [vs. mul it is easy to win],
;;	and register pressure -- these patterns don't use an extra
;;	register to build the offset from the base
;;	and whether the compiler will not come up with some other idiom.
;;

;; -------------------------------------------------------------------------
;; Addition, Subtraction instructions
;; -------------------------------------------------------------------------

(define_expand "addsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "")
	(plus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "")
		 (match_operand:SI 2 "nonmemory_operand" "")))]
  ""
  "
{
  extern int flag_omit_frame_pointer;

  /* If this is an add to the frame pointer, then accept it as is so
     that we can later fold in the fp/sp offset from frame pointer
     elimination.  */
  if (flag_omit_frame_pointer
      && GET_CODE (operands[1]) == REG
      && (REGNO (operands[1]) == VIRTUAL_STACK_VARS_REGNUM
	  || REGNO (operands[1]) == FRAME_POINTER_REGNUM))
    {
      emit_insn (gen_addsi3_fp (operands[0], operands[1], operands[2]));
      DONE;
    }

  /* Convert adds to subtracts if this makes loading the constant cheaper.
     But only if we are allowed to generate new pseudos.  */
  if (! (reload_in_progress || reload_completed)
      && GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < -32)
    {
      int neg_value = - INTVAL (operands[2]);
      if (   CONST_OK_FOR_I (neg_value)
	  || CONST_OK_FOR_M (neg_value)
	  || CONST_OK_FOR_N (neg_value))
	{
	  operands[2] = copy_to_mode_reg (SImode, GEN_INT (neg_value));
	  emit_insn (gen_subsi3 (operands[0], operands[1], operands[2]));
	  DONE;
	}
    } 

  if (! mcore_addsub_operand (operands[2], SImode))
    operands[2] = copy_to_mode_reg (SImode, operands[2]);
}")
 
;; RBE: for some constants which are not in the range which allows
;; us to do a single operation, we will try a paired addi/addi instead
;; of a movi/addi. This relieves some register pressure at the expense
;; of giving away some potential constant reuse.
;;
;; RBE 6/17/97: this didn't buy us anything, but I keep the pattern
;; for later reference
;; 
;; (define_insn "addsi3_i2"
;;   [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
;;      (plus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0")
;;               (match_operand:SI 2 "const_int_operand" "g")))]
;;   "GET_CODE(operands[2]) == CONST_INT
;;    && ((INTVAL (operands[2]) > 32 && INTVAL(operands[2]) <= 64)
;;        || (INTVAL (operands[2]) < -32 && INTVAL(operands[2]) >= -64))"
;;   "*
;; {
;;    int n = INTVAL(operands[2]);
;;    if (n > 0)
;;      {
;;        operands[2] = GEN_INT(n - 32);
;;        return \"addi\\t%0,32\;addi\\t%0,%2\";
;;      }
;;    else
;;      {
;;        n = (-n);
;;        operands[2] = GEN_INT(n - 32);
;;        return \"subi\\t%0,32\;subi\\t%0,%2\";
;;      }
;; }"
;;  [(set_attr "length" "4")])

(define_insn "addsi3_i"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r,r")
	(plus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0,0,0")
		 (match_operand:SI 2 "mcore_addsub_operand" "r,J,L")))]
  ""
  "@
	addu	%0,%2
	addi	%0,%2
	subi	%0,%M2")

;; This exists so that address computations based on the frame pointer
;; can be folded in when frame pointer elimination occurs.  Ordinarily
;; this would be bad because it allows insns which would require reloading,
;; but without it, we get multiple adds where one would do.

(define_insn "addsi3_fp"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r,r")
	(plus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0,0,0")
		 (match_operand:SI 2 "immediate_operand" "r,J,L")))]
  "flag_omit_frame_pointer
   && (reload_in_progress || reload_completed || REGNO (operands[1]) == FRAME_POINTER_REGNUM)"
  "@
	addu	%0,%2
	addi	%0,%2
	subi	%0,%M2")

;; RBE: for some constants which are not in the range which allows
;; us to do a single operation, we will try a paired addi/addi instead
;; of a movi/addi. This relieves some register pressure at the expense
;; of giving away some potential constant reuse.
;;
;; RBE 6/17/97: this didn't buy us anything, but I keep the pattern
;; for later reference
;; 
;; (define_insn "subsi3_i2"
;;   [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
;;      (plus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "%0")
;;               (match_operand:SI 2 "const_int_operand" "g")))]
;;   "TARGET_RBETEST && GET_CODE(operands[2]) == CONST_INT
;;    && ((INTVAL (operands[2]) > 32 && INTVAL(operands[2]) <= 64)
;;        || (INTVAL (operands[2]) < -32 && INTVAL(operands[2]) >= -64))"
;;   "*
;; {
;;    int n = INTVAL(operands[2]);
;;    if ( n > 0)
;;      {
;;        operands[2] = GEN_INT( n - 32);
;;        return \"subi\\t%0,32\;subi\\t%0,%2\";
;;      }
;;    else
;;      {
;;        n = (-n);
;;        operands[2] = GEN_INT(n - 32);
;;        return \"addi\\t%0,32\;addi\\t%0,%2\";
;;      }
;; }"
;;   [(set_attr "length" "4")])

;(define_insn "subsi3"
;  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r,r,r")
;	(minus:SI (match_operand:SI 1 "mcore_arith_K_operand" "0,0,r,K")
;		  (match_operand:SI 2 "mcore_arith_J_operand" "r,J,0,0")))]
;  ""
;  "@
;	sub	%0,%2
;	subi	%0,%2
;	rsub	%0,%1
;	rsubi	%0,%1")

(define_insn "subsi3"
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r,r,r")
        (minus:SI (match_operand:SI 1 "mcore_arith_reg_operand" "0,0,r")
                  (match_operand:SI 2 "mcore_arith_J_operand" "r,J,0")))]
  ""
  "@
	subu	%0,%2
	subi	%0,%2
	rsub	%0,%1")

(define_insn ""
  [(set (match_operand:SI 0 "mcore_arith_reg_operand" "=r")
        (minus:SI (match_operand:SI 1 "mcore_literal_K_operand" "K")