📄 mips.h
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} while (0)#define PUT_SDB_FUNCTION_START(LINE)#define PUT_SDB_FUNCTION_END(LINE) \do { \ extern FILE *asm_out_text_file; \ ASM_OUTPUT_SOURCE_LINE (asm_out_text_file, LINE + sdb_begin_function_line); \} while (0)#define PUT_SDB_EPILOGUE_END(NAME)#define PUT_SDB_SRC_FILE(FILENAME) \do { \ extern FILE *asm_out_text_file; \ output_file_directive (asm_out_text_file, (FILENAME));\} while (0)#define SDB_GENERATE_FAKE(BUFFER, NUMBER) \ sprintf ((BUFFER), ".%dfake", (NUMBER));/* Correct the offset of automatic variables and arguments. Note that the MIPS debug format wants all automatic variables and arguments to be in terms of the virtual frame pointer (stack pointer before any adjustment in the function), while the MIPS 3.0 linker wants the frame pointer to be the stack pointer after the initial adjustment. */#define DEBUGGER_AUTO_OFFSET(X) \ mips_debugger_offset (X, (HOST_WIDE_INT) 0)#define DEBUGGER_ARG_OFFSET(OFFSET, X) \ mips_debugger_offset (X, (HOST_WIDE_INT) OFFSET)/* Tell collect that the object format is ECOFF */#define OBJECT_FORMAT_COFF /* Object file looks like COFF */#define EXTENDED_COFF /* ECOFF, not normal coff *//* Target machine storage layout *//* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields.*/#define BITS_BIG_ENDIAN 0/* Define this if most significant byte of a word is the lowest numbered. */#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)/* Define this if most significant word of a multiword number is the lowest. */#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)/* Define this to set the endianness to use in libgcc2.c, which can not depend on target_flags. */#if !defined(MIPSEL) && !defined(__MIPSEL__)#define LIBGCC2_WORDS_BIG_ENDIAN 1#else#define LIBGCC2_WORDS_BIG_ENDIAN 0#endif#define MAX_BITS_PER_WORD 64/* Width of a word, in units (bytes). */#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)#define MIN_UNITS_PER_WORD 4/* For MIPS, width of a floating point register. */#define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4)/* If register $f0 holds a floating-point value, $f(0 + FP_INC) is the next available register. */#define FP_INC (TARGET_FLOAT64 || TARGET_SINGLE_FLOAT ? 1 : 2)/* The largest size of value that can be held in floating-point registers and moved with a single instruction. */#define UNITS_PER_HWFPVALUE (TARGET_SOFT_FLOAT ? 0 : FP_INC * UNITS_PER_FPREG)/* The largest size of value that can be held in floating-point registers. */#define UNITS_PER_FPVALUE \ (TARGET_SOFT_FLOAT ? 0 : (LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT))/* The number of bytes in a double. */#define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT)/* A C expression for the size in bits of the type `int' on the target machine. If you don't define this, the default is one word. */#define INT_TYPE_SIZE (TARGET_INT64 ? 64 : 32)/* Tell the preprocessor the maximum size of wchar_t. */#ifndef MAX_WCHAR_TYPE_SIZE#ifndef WCHAR_TYPE_SIZE#define MAX_WCHAR_TYPE_SIZE 64#endif#endif/* A C expression for the size in bits of the type `short' on the target machine. If you don't define this, the default is half a word. (If this would be less than one storage unit, it is rounded up to one unit.) */#define SHORT_TYPE_SIZE 16/* A C expression for the size in bits of the type `long' on the target machine. If you don't define this, the default is one word. */#define LONG_TYPE_SIZE (TARGET_LONG64 ? 64 : 32)#define MAX_LONG_TYPE_SIZE 64/* A C expression for the size in bits of the type `long long' on the target machine. If you don't define this, the default is two words. */#define LONG_LONG_TYPE_SIZE 64/* A C expression for the size in bits of the type `float' on the target machine. If you don't define this, the default is one word. */#define FLOAT_TYPE_SIZE 32/* A C expression for the size in bits of the type `double' on the target machine. If you don't define this, the default is two words. */#define DOUBLE_TYPE_SIZE 64/* A C expression for the size in bits of the type `long double' on the target machine. If you don't define this, the default is two words. */#define LONG_DOUBLE_TYPE_SIZE \ (mips_abi == ABI_N32 || mips_abi == ABI_64 ? 128 : 64)/* long double is not a fixed mode, but the idea is that, if we support long double, we also want a 128-bit integer type. */#define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE#ifdef IN_LIBGCC2#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \ || (defined _ABI64 && _MIPS_SIM == _ABI64)# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128# else# define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64# endif#endif/* Width in bits of a pointer. See also the macro `Pmode' defined below. */#ifndef POINTER_SIZE#define POINTER_SIZE (Pmode == DImode ? 64 : 32)#endif/* Allocation boundary (in *bits*) for storing pointers in memory. */#define POINTER_BOUNDARY (Pmode == DImode ? 64 : 32)/* Allocation boundary (in *bits*) for storing arguments in argument list. */#define PARM_BOUNDARY ((mips_abi == ABI_O64 || mips_abi == ABI_N32 \ || mips_abi == ABI_64 \ || (mips_abi == ABI_EABI && TARGET_64BIT)) ? 64 : 32)/* Allocation boundary (in *bits*) for the code of a function. */#define FUNCTION_BOUNDARY 32/* Alignment of field after `int : 0' in a structure. */#define EMPTY_FIELD_BOUNDARY 32/* Every structure's size must be a multiple of this. *//* 8 is observed right on a DECstation and on riscos 4.02. */#define STRUCTURE_SIZE_BOUNDARY 8/* There is no point aligning anything to a rounder boundary than this. */#define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE/* Set this nonzero if move instructions will actually fail to work when given unaligned data. */#define STRICT_ALIGNMENT 1/* Define this if you wish to imitate the way many other C compilers handle alignment of bitfields and the structures that contain them. The behavior is that the type written for a bit-field (`int', `short', or other integer type) imposes an alignment for the entire structure, as if the structure really did contain an ordinary field of that type. In addition, the bit-field is placed within the structure so that it would fit within such a field, not crossing a boundary for it. Thus, on most machines, a bit-field whose type is written as `int' would not cross a four-byte boundary, and would force four-byte alignment for the whole structure. (The alignment used may not be four bytes; it is controlled by the other alignment parameters.) If the macro is defined, its definition should be a C expression; a nonzero value for the expression enables this behavior. */#define PCC_BITFIELD_TYPE_MATTERS 1/* If defined, a C expression to compute the alignment given to a constant that is being placed in memory. CONSTANT is the constant and ALIGN is the alignment that the object would ordinarily have. The value of this macro is used instead of that alignment to align the object. If this macro is not defined, then ALIGN is used. The typical use of this macro is to increase alignment for string constants to be word aligned so that `strcpy' calls that copy constants can be done inline. */#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))/* If defined, a C expression to compute the alignment for a static variable. TYPE is the data type, and ALIGN is the alignment that the object would ordinarily have. The value of this macro is used instead of that alignment to align the object. If this macro is not defined, then ALIGN is used. One use of this macro is to increase alignment of medium-size data to make it all fit in fewer cache lines. Another is to cause character arrays to be word-aligned so that `strcpy' calls that copy constants to character arrays can be done inline. */#undef DATA_ALIGNMENT#define DATA_ALIGNMENT(TYPE, ALIGN) \ ((((ALIGN) < BITS_PER_WORD) \ && (TREE_CODE (TYPE) == ARRAY_TYPE \ || TREE_CODE (TYPE) == UNION_TYPE \ || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))/* Force right-alignment for small varargs in 32 bit little_endian mode */#define PAD_VARARGS_DOWN (TARGET_64BIT \ || mips_abi == ABI_MEABI \ ? BYTES_BIG_ENDIAN : !BYTES_BIG_ENDIAN)/* Define this macro if an argument declared as `char' or `short' in a prototype should actually be passed as an `int'. In addition to avoiding errors in certain cases of mismatch, it also makes for better code on certain machines. */#define PROMOTE_PROTOTYPES 1/* Define if operations between registers always perform the operation on the full register even if a narrower mode is specified. */#define WORD_REGISTER_OPERATIONS/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD will either zero-extend or sign-extend. The value of this macro should be the code that says which one of the two operations is implicitly done, NIL if none. When in 64 bit mode, mips_move_1word will sign extend SImode and CCmode moves. All other referces are zero extended. */#define LOAD_EXTEND_OP(MODE) \ (TARGET_64BIT && ((MODE) == SImode || (MODE) == CCmode) \ ? SIGN_EXTEND : ZERO_EXTEND)/* Define this macro if it is advisable to hold scalars in registers in a wider mode than that declared by the program. In such cases, the value is constrained to be within the bounds of the declared type, but kept valid in the wider mode. The signedness of the extension may differ from that of the type. We promote any value smaller than SImode up to SImode. We don't want to promote to DImode when in 64 bit mode, because that would prevent us from using the faster SImode multiply and divide instructions. */#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ if (GET_MODE_CLASS (MODE) == MODE_INT \ && GET_MODE_SIZE (MODE) < 4) \ (MODE) = SImode;/* Define this if function arguments should also be promoted using the above procedure. */#define PROMOTE_FUNCTION_ARGS/* Likewise, if the function return value is promoted. */#define PROMOTE_FUNCTION_RETURN/* Standard register usage. *//* Number of actual hardware registers. The hardware registers are assigned numbers for the compiler from 0 to just below FIRST_PSEUDO_REGISTER. All registers that the compiler knows about must be given numbers, even those that are not normally considered general registers. On the Mips, we have 32 integer registers, 32 floating point registers, 8 condition code registers, and the special registers hi, lo, hilo, and rap. Afetr that we have 32 COP0 registers, 32 COP2 registers, and 32 COp3 registers. (COP1 is the floating-point processor.) The 8 condition code registers are only used if mips_isa >= 4. The hilo register is only used in 64 bit mode. It represents a 64 bit value stored as two 32 bit values in the hi and lo registers; this is the result of the mult instruction. rap is a pointer to the stack where the return address reg ($31) was stored. This is needed for C++ exception handling. */#define FIRST_PSEUDO_REGISTER 176/* 1 for registers that have pervasive standard uses and are not available for the register allocator. On the MIPS, see conventions, page D-2 *//* Regarding coprocessor registers: without evidence to the contrary, it's best to assume that each coprocessor register has a unique use. This can be overridden, in, e.g., override_options() or CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate for a particular target. */#define FIXED_REGISTERS \{ \ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ /* COP0 registers */ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ /* COP2 registers */ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ /* COP3 registers */ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \}/* 1 for registers not available across function calls. These must include the FIXED_REGISTERS and also any registers that can be used without being saved. The latter must include the registers where values are returned and the register where structure-value addresses are passed. Aside from that, you can include as many other registers as you like. */#define CALL_USED_REGISTERS \{ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \ /* COP0 registers */ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ /* COP2 registers */ \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1
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