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📄 sh.h

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	   && ! TARGET_SHMEDIA && MODE == SImode))			\      && (GET_CODE (X) == MEM						\	  || (GET_CODE (X) == REG					\	      && (REGNO (X) >= FIRST_PSEUDO_REGISTER			\		  || REGNO (X) == T_REG					\		  || system_reg_operand (X, VOIDmode)))))		\   ? GENERAL_REGS							\   : ((CLASS) == TARGET_REGS						\      || (TARGET_SHMEDIA && (CLASS) == SIBCALL_REGS))			\   ? ((target_operand ((X), (MODE))					\       && ! target_reg_operand ((X), (MODE)))				\      ? NO_REGS : GENERAL_REGS)						\   : (((CLASS) == MAC_REGS || (CLASS) == PR_REGS)			\      && GET_CODE (X) == REG && ! GENERAL_REGISTER_P (REGNO (X))	\      && (CLASS) != REGNO_REG_CLASS (REGNO (X)))			\   ? GENERAL_REGS							\   : ((CLASS) != GENERAL_REGS && GET_CODE (X) == REG			\      && TARGET_REGISTER_P (REGNO (X)))					\   ? GENERAL_REGS : NO_REGS)#define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,X)  \  ((REGCLASS_HAS_FP_REG (CLASS) 					\    && ! TARGET_SHMEDIA							\    && immediate_operand ((X), (MODE))					\    && ! ((fp_zero_operand (X) || fp_one_operand (X))			\	  && (MODE) == SFmode && fldi_ok ()))				\   ? R0_REGS								\   : (CLASS == FPUL_REGS						\      && ((GET_CODE (X) == REG						\	   && (REGNO (X) == MACL_REG || REGNO (X) == MACH_REG		\	       || REGNO (X) == T_REG))					\	  || GET_CODE (X) == PLUS))					\   ? GENERAL_REGS							\   : CLASS == FPUL_REGS && immediate_operand ((X), (MODE))		\   ? (GET_CODE (X) == CONST_INT && CONST_OK_FOR_I (INTVAL (X))		\      ? GENERAL_REGS							\      : R0_REGS)							\   : (CLASS == FPSCR_REGS						\      && ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER)	\	  || (GET_CODE (X) == MEM && GET_CODE (XEXP ((X), 0)) == PLUS)))\   ? GENERAL_REGS							\   : (REGCLASS_HAS_FP_REG (CLASS) 					\      && TARGET_SHMEDIA							\      && immediate_operand ((X), (MODE))				\      && (X) != CONST0_RTX (GET_MODE (X))				\      && GET_MODE (X) != V4SFmode)					\   ? GENERAL_REGS							\   : SECONDARY_OUTPUT_RELOAD_CLASS((CLASS),(MODE),(X)))/* Return the maximum number of consecutive registers   needed to represent mode MODE in a register of class CLASS.   On SH this is the size of MODE in words.  */#define CLASS_MAX_NREGS(CLASS, MODE) \     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* If defined, gives a class of registers that cannot be used as the   operand of a SUBREG that changes the mode of the object illegally.  *//* ??? We need to renumber the internal numbers for the frnn registers   when in little endian in order to allow mode size changes.  */#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) 			    \  sh_cannot_change_mode_class (FROM, TO, CLASS)/* Stack layout; function entry, exit and calling.  *//* Define the number of registers that can hold parameters.   These macros are used only in other macro definitions below.  */#define NPARM_REGS(MODE) \  (TARGET_FPU_ANY && (MODE) == SFmode \   ? (TARGET_SH5 ? 12 : 8) \   : TARGET_SH4 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \		    || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \   ? (TARGET_SH5 ? 12 : 8) \   : (TARGET_SH5 ? 8 : 4))#define FIRST_PARM_REG (FIRST_GENERAL_REG + (TARGET_SH5 ? 2 : 4))#define FIRST_RET_REG  (FIRST_GENERAL_REG + (TARGET_SH5 ? 2 : 0))#define FIRST_FP_PARM_REG (FIRST_FP_REG + (TARGET_SH5 ? 0 : 4))#define FIRST_FP_RET_REG FIRST_FP_REG/* Define this if pushing a word on the stack   makes the stack pointer a smaller address.  */#define STACK_GROWS_DOWNWARD/*  Define this macro if the addresses of local variable slots are at    negative offsets from the frame pointer.    The SH only has positive indexes, so grow the frame up.  *//* #define FRAME_GROWS_DOWNWARD *//* Offset from the frame pointer to the first local variable slot to   be allocated.  */#define STARTING_FRAME_OFFSET  0/* If we generate an insn to push BYTES bytes,   this says how many the stack pointer really advances by.  *//* Don't define PUSH_ROUNDING, since the hardware doesn't do this.   When PUSH_ROUNDING is not defined, PARM_BOUNDARY will cause gcc to   do correct alignment.  */#if 0#define PUSH_ROUNDING(NPUSHED)  (((NPUSHED) + 3) & ~3)#endif/* Offset of first parameter from the argument pointer register value.  */#define FIRST_PARM_OFFSET(FNDECL)  0/* Value is the number of byte of arguments automatically   popped when returning from a subroutine call.   FUNDECL is the declaration node of the function (as a tree),   FUNTYPE is the data type of the function (as a tree),   or for a library call it is an identifier node for the subroutine name.   SIZE is the number of bytes of arguments passed on the stack.   On the SH, the caller does not pop any of its arguments that were passed   on the stack.  */#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE)  0/* Value is the number of bytes of arguments automatically popped when   calling a subroutine.   CUM is the accumulated argument list.   On SHcompact, the call trampoline pops arguments off the stack.  */#define CALL_POPS_ARGS(CUM) (TARGET_SHCOMPACT ? (CUM).stack_regs * 8 : 0)/* Nonzero if we do not know how to pass TYPE solely in registers.   Values that come in registers with inconvenient padding are stored   to memory at the function start.  */#define MUST_PASS_IN_STACK(MODE,TYPE)			\  ((TYPE) != 0						\   && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST	\       || TREE_ADDRESSABLE (TYPE)))/* Some subroutine macros specific to this machine.  */#define BASE_RETURN_VALUE_REG(MODE) \  ((TARGET_FPU_ANY && ((MODE) == SFmode))			\   ? FIRST_FP_RET_REG					\   : TARGET_FPU_ANY && (MODE) == SCmode		\   ? FIRST_FP_RET_REG					\   : (TARGET_FPU_DOUBLE					\      && ((MODE) == DFmode || (MODE) == SFmode		\	  || (MODE) == DCmode || (MODE) == SCmode ))	\   ? FIRST_FP_RET_REG					\   : FIRST_RET_REG)#define BASE_ARG_REG(MODE) \  ((TARGET_SH3E && ((MODE) == SFmode))			\   ? FIRST_FP_PARM_REG					\   : TARGET_SH4 && (GET_MODE_CLASS (MODE) == MODE_FLOAT	\		    || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)\   ? FIRST_FP_PARM_REG					\   : FIRST_PARM_REG)/* Define how to find the value returned by a function.   VALTYPE is the data type of the value (as a tree).   If the precise function being called is known, FUNC is its FUNCTION_DECL;   otherwise, FUNC is 0.   For the SH, this is like LIBCALL_VALUE, except that we must change the   mode like PROMOTE_MODE does.   ??? PROMOTE_MODE is ignored for non-scalar types.  The set of types   tested here has to be kept in sync with the one in explow.c:promote_mode.  */#define FUNCTION_VALUE(VALTYPE, FUNC)					\  gen_rtx (REG,								\	   ((GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_INT		\	     && GET_MODE_SIZE (TYPE_MODE (VALTYPE)) < UNITS_PER_WORD	\	     && (TREE_CODE (VALTYPE) == INTEGER_TYPE			\		 || TREE_CODE (VALTYPE) == ENUMERAL_TYPE		\		 || TREE_CODE (VALTYPE) == BOOLEAN_TYPE			\		 || TREE_CODE (VALTYPE) == CHAR_TYPE			\		 || TREE_CODE (VALTYPE) == REAL_TYPE			\		 || TREE_CODE (VALTYPE) == OFFSET_TYPE))		\	    ? (TARGET_SHMEDIA ? DImode : SImode) : TYPE_MODE (VALTYPE)), \	   BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))     /* Define how to find the value returned by a library function   assuming the value has mode MODE.  */#define LIBCALL_VALUE(MODE) \  gen_rtx_REG ((MODE), BASE_RETURN_VALUE_REG (MODE));/* 1 if N is a possible register number for a function value.  */#define FUNCTION_VALUE_REGNO_P(REGNO) \  ((REGNO) == FIRST_RET_REG || (TARGET_SH3E && (REGNO) == FIRST_FP_RET_REG) \   || (TARGET_SHMEDIA_FPU && (REGNO) == FIRST_FP_RET_REG))/* 1 if N is a possible register number for function argument passing.  */#define FUNCTION_ARG_REGNO_P(REGNO) \  (((REGNO) >= FIRST_PARM_REG && (REGNO) < (FIRST_PARM_REG		\					    + NPARM_REGS (SImode)))	\   || (TARGET_FPU_ANY                                                   \       && (REGNO) >= FIRST_FP_PARM_REG && (REGNO) < (FIRST_FP_PARM_REG	\						     + NPARM_REGS (SFmode))))/* Define a data type for recording info about an argument list   during the scan of that argument list.  This data type should   hold all necessary information about the function itself   and about the args processed so far, enough to enable macros   such as FUNCTION_ARG to determine where the next arg should go.   On SH, this is a single integer, which is a number of words   of arguments scanned so far (including the invisible argument,   if any, which holds the structure-value-address).   Thus NARGREGS or more means all following args should go on the stack.  */enum sh_arg_class { SH_ARG_INT = 0, SH_ARG_FLOAT = 1 };struct sh_args {    int arg_count[2];    int force_mem;  /* Nonzero if a prototype is available for the function.  */    int prototype_p;  /* The number of an odd floating-point register, that should be used     for the next argument of type float.  */    int free_single_fp_reg;  /* Whether we're processing an outgoing function call.  */    int outgoing;  /* The number of general-purpose registers that should have been     used to pass partial arguments, that are passed totally on the     stack.  On SHcompact, a call trampoline will pop them off the     stack before calling the actual function, and, if the called     function is implemented in SHcompact mode, the incoming arguments     decoder will push such arguments back onto the stack.  For     incoming arguments, STACK_REGS also takes into account other     arguments passed by reference, that the decoder will also push     onto the stack.  */    int stack_regs;  /* The number of general-purpose registers that should have been     used to pass arguments, if the arguments didn't have to be passed     by reference.  */    int byref_regs;  /* Set by SHCOMPACT_BYREF if the current argument is to be passed by     reference.  */    int byref;  /* call_cookie is a bitmask used by call expanders, as well as     function prologue and epilogues, to allow SHcompact to comply     with the SH5 32-bit ABI, that requires 64-bit registers to be     used even though only the lower 32-bit half is visible in     SHcompact mode.  The strategy is to call SHmedia trampolines.     The alternatives for each of the argument-passing registers are     (a) leave it unchanged; (b) pop it off the stack; (c) load its     contents from the address in it; (d) add 8 to it, storing the     result in the next register, then (c); (e) copy it from some     floating-point register,     Regarding copies from floating-point registers, r2 may only be     copied from dr0.  r3 may be copied from dr0 or dr2.  r4 maybe     copied from dr0, dr2 or dr4.  r5 maybe copied from dr0, dr2,     dr4 or dr6.  r6 may be copied from dr0, dr2, dr4, dr6 or dr8.     r7 through to r9 may be copied from dr0, dr2, dr4, dr8, dr8 or     dr10.     The bit mask is structured as follows:     - 1 bit to tell whether to set up a return trampoline.     - 3 bits to count the number consecutive registers to pop off the       stack.     - 4 bits for each of r9, r8, r7 and r6.     - 3 bits for each of r5, r4, r3 and r2.     - 3 bits set to 0 (the most significant ones)        3           2            1           0       1098 7654 3210 9876 5432 1098 7654 3210       FLPF LPFL PFLP FFLP FFLP FFLP FFLP SSST       2223 3344 4555 6666 7777 8888 9999 SSS-     - If F is set, the register must be copied from an FP register,       whose number is encoded in the remaining bits.     - Else, if L is set, the register must be loaded from the address       contained in it.  If the P bit is *not* set, the address of the       following dword should be computed first, and stored in the       following register.     - Else, if P is set, the register alone should be popped off the       stack.     - After all this processing, the number of registers represented       in SSS will be popped off the stack.  This is an optimization       for pushing/popping consecutive registers, typically used for       varargs and large arguments partially passed in registers.     - If T is set, a return trampoline will be set up for 64-bit     return values to be split into 2 32-bit registers.  */#define CALL_COOKIE_RET_TRAMP_SHIFT 0#define CALL_COOKIE_RET_TRAMP(VAL) ((VAL) << CALL_COOKIE_RET_TRAMP_SHIFT)#define CALL_COOKIE_STACKSEQ_SHIFT 1#define CALL_COOKIE_STACKSEQ(VAL) ((VAL) << CALL_COOKIE_STACKSEQ_SHIFT)#define CALL_COOKIE_STACKSEQ_GET(COOKIE) \  (((COOKIE) >> CALL_COOKIE_STACKSEQ_SHIFT) & 7)#define CALL_COOKIE_INT_REG_SHIFT(REG) \  (4 * (7 - (REG)) + (((REG) <= 2) ? ((REG) - 2) : 1) + 3)#define CALL_COOKIE_INT_REG(REG, VAL) \  ((VAL) << CALL_COOKIE_INT_REG_SHIFT (REG))#define CALL_COOKIE_INT_REG_GET(COOKIE, REG) \  (((COOKIE) >> CALL_COOKIE_INT_REG_SHIFT (REG)) & ((REG) < 4 ? 7 : 15))    long call_cookie;};#define CUMULATIVE_ARGS  struct sh_args#define GET_SH_ARG_CLASS(MODE) \  ((TARGET_FPU_ANY && (MODE) == SFmode) \   ? SH_ARG_FLOAT \   /* There's no mention of complex float types in the SH5 ABI, so we      should presumably handle them as aggregate types.  */ \   : TARGET_SH5 && GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \   ? SH_ARG_INT \   : TARGET_FPU_DOUBLE && (GET_MODE_CLASS (MODE) == MODE_FLOAT \			   || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \   ? SH_ARG_FLOAT : SH_ARG_INT)#define ROUND_ADVANCE(SIZE) \  (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Round a register number up to a proper boundary for an arg of mode   MODE.   The SH doesn't care about double alignment, so we only   round doubles to even regs when asked to explicitly.  */#define ROUND_REG(CUM, MODE) \   (((TARGET_ALIGN_DOUBLE					\      || (TARGET_S

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