s390.md

linux下的gcc编译器

;
; clrstrM instruction pattern(s).
;

(define_expand "clrstrdi"
  [(set (match_operand:BLK 0 "memory_operand" "")
        (const_int 0))
   (use (match_operand:DI 1 "general_operand" ""))
   (match_operand 2 "" "")]
  "TARGET_64BIT"
  "s390_expand_clrstr (operands[0], operands[1]); DONE;")

(define_expand "clrstrsi"
  [(set (match_operand:BLK 0 "memory_operand" "")
        (const_int 0))
   (use (match_operand:SI 1 "general_operand" ""))
   (match_operand 2 "" "")]
  ""
  "s390_expand_clrstr (operands[0], operands[1]); DONE;")

; Clear a block that is up to 256 bytes in length.
; The block length is taken as (operands[2] % 256) + 1.

(define_insn "clrstr_short_64"
  [(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
        (const_int 0))
   (use (match_operand:DI 1 "nonmemory_operand" "n,a"))
   (clobber (match_scratch:DI 2 "=X,&a"))
   (clobber (reg:CC 33))]
  "TARGET_64BIT"
  "*
{
  switch (which_alternative)
    {
      case 0:
	return \"xc\\t%O0(%b1+1,%R0),%0\";

      case 1:
	output_asm_insn (\"bras\\t%2,.+10\", operands);
	output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands);
	return \"ex\\t%1,0(%2)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "type"    "cs,cs")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

(define_insn "clrstr_short_31"
  [(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
        (const_int 0))
   (use (match_operand:SI 1 "nonmemory_operand" "n,a"))
   (clobber (match_scratch:SI 2 "=X,&a"))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT"
  "*
{
  switch (which_alternative)
    {
      case 0:
	return \"xc\\t%O0(%b1+1,%R0),%0\";

      case 1:
	output_asm_insn (\"bras\\t%2,.+10\", operands);
	output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands);
	return \"ex\\t%1,0(%2)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "type"    "cs,cs")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

; Clear a block of arbitrary length.

(define_insn "clrstr_long_64"
  [(set (match_operand:TI 0 "register_operand" "=d")
        (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0")
                            (lshiftrt:TI (match_dup 2) (const_int 64)))
                   (const_int 64)))
   (set (mem:BLK (subreg:DI (match_dup 2) 0))
        (const_int 0))
   (use (match_operand:TI 1 "register_operand" "d"))
   (clobber (reg:CC 33))]
  "TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

(define_insn "clrstr_long_31"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0")
                            (lshiftrt:DI (match_dup 2) (const_int 32)))
                   (const_int 32)))
   (set (mem:BLK (subreg:SI (match_dup 2) 0))
        (const_int 0))
   (use (match_operand:DI 1 "register_operand" "d"))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

;
; cmpmemM instruction pattern(s).
;

(define_expand "cmpmemdi"
  [(set (match_operand:DI 0 "register_operand" "")
        (compare:DI (match_operand:BLK 1 "memory_operand" "")
                    (match_operand:BLK 2 "memory_operand" "") ) )
   (use (match_operand:DI 3 "general_operand" ""))
   (use (match_operand:DI 4 "" ""))]
  "TARGET_64BIT"
  "s390_expand_cmpmem (operands[0], operands[1], 
                       operands[2], operands[3]); DONE;")

(define_expand "cmpmemsi"
  [(set (match_operand:SI 0 "register_operand" "")
        (compare:SI (match_operand:BLK 1 "memory_operand" "")
                    (match_operand:BLK 2 "memory_operand" "") ) )
   (use (match_operand:SI 3 "general_operand" ""))
   (use (match_operand:SI 4 "" ""))]
  ""
  "s390_expand_cmpmem (operands[0], operands[1], 
                       operands[2], operands[3]); DONE;")

; Compare a block that is up to 256 bytes in length.
; The block length is taken as (operands[2] % 256) + 1.

(define_insn "cmpmem_short_64"
  [(set (reg:CCS 33)
        (compare:CCS (match_operand:BLK 0 "memory_operand" "=Q,Q")
                     (match_operand:BLK 1 "memory_operand" "Q,Q")))
   (use (match_operand:DI 2 "nonmemory_operand" "n,a"))
   (clobber (match_scratch:DI 3 "=X,&a"))]
  "TARGET_64BIT"
  "*
{
  switch (which_alternative)
    {
      case 0:
	return \"clc\\t%O0(%b2+1,%R0),%1\";

      case 1:
	output_asm_insn (\"bras\\t%3,.+10\", operands);
	output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands);
	return \"ex\\t%2,0(%3)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "type"    "cs,cs")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

(define_insn "cmpmem_short_31"
  [(set (reg:CCS 33)
        (compare:CCS (match_operand:BLK 0 "memory_operand" "=Q,Q")
                     (match_operand:BLK 1 "memory_operand" "Q,Q")))
   (use (match_operand:SI 2 "nonmemory_operand" "n,a"))
   (clobber (match_scratch:SI 3 "=X,&a"))]
  "!TARGET_64BIT"
  "*
{
  switch (which_alternative)
    {
      case 0:
	return \"clc\\t%O0(%b2+1,%R0),%1\";

      case 1:
	output_asm_insn (\"bras\\t%3,.+10\", operands);
	output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands);
	return \"ex\\t%2,0(%3)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "type"    "cs,cs")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

; Compare a block of arbitrary length.

(define_insn "cmpmem_long_64"
  [(clobber (match_operand:TI 0 "register_operand" "=d"))
   (clobber (match_operand:TI 1 "register_operand" "=d"))
   (set (reg:CCS 33)
        (compare:CCS (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
                     (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))
   (use (match_dup 2))
   (use (match_dup 3))]
  "TARGET_64BIT"
  "clcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

(define_insn "cmpmem_long_31"
  [(clobber (match_operand:DI 0 "register_operand" "=d"))
   (clobber (match_operand:DI 1 "register_operand" "=d"))
   (set (reg:CCS 33)
        (compare:CCS (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
                     (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))))
   (use (match_dup 2))
   (use (match_dup 3))]
  "!TARGET_64BIT"
  "clcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

; Convert condition code to integer in range (-1, 0, 1)

(define_insn "cmpint_si"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (compare:SI (reg:CCS 33) (const_int 0)))]
  ""
  "*
{
   output_asm_insn (\"lhi\\t%0,1\", operands);
   output_asm_insn (\"jh\\t.+12\", operands);
   output_asm_insn (\"jl\\t.+6\", operands);
   output_asm_insn (\"sr\\t%0,%0\", operands);
   return \"lcr\\t%0,%0\";
}"
  [(set_attr "op_type" "NN")
   (set_attr "length"  "16")
   (set_attr "atype"   "reg")
   (set_attr "type"    "other")])

(define_insn "cmpint_di"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (compare:DI (reg:CCS 33) (const_int 0)))]
  "TARGET_64BIT"
  "*
{
   output_asm_insn (\"lghi\\t%0,1\", operands);
   output_asm_insn (\"jh\\t.+16\", operands);
   output_asm_insn (\"jl\\t.+8\", operands);
   output_asm_insn (\"sgr\\t%0,%0\", operands);
   return \"lcgr\\t%0,%0\";
}"
  [(set_attr "op_type" "NN")
   (set_attr "length"  "20")
   (set_attr "atype"   "reg")
   (set_attr "type"    "other")])


;;
;;- Conversion instructions.
;;

(define_insn "*sethighqisi"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (unspec:SI [(match_operand:QI 1 "s_operand" "Q")] 10))
   (clobber (reg:CC 33))]
  ""
  "icm\\t%0,8,%1"
  [(set_attr "op_type" "RS")
   (set_attr "atype"   "mem")])

(define_insn "*sethighhisi"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (unspec:SI [(match_operand:HI 1 "s_operand" "Q")] 10))
   (clobber (reg:CC 33))]
  ""
  "icm\\t%0,12,%1"
  [(set_attr "op_type" "RS")
   (set_attr "atype"   "mem")])

(define_insn "*sethighqidi_64"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (unspec:DI [(match_operand:QI 1 "s_operand" "Q")] 10))
   (clobber (reg:CC 33))]
  "TARGET_64BIT"
  "icmh\\t%0,8,%1"
  [(set_attr "op_type" "RSE")
   (set_attr "atype"   "mem")])

(define_insn "*sethighqidi_31"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (unspec:DI [(match_operand:QI 1 "s_operand" "Q")] 10))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT"
  "icm\\t%0,8,%1"
  [(set_attr "op_type" "RS")
   (set_attr "atype"   "mem")])

(define_insn_and_split "*extractqi"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
                         (match_operand 2 "const_int_operand" "n")
                         (const_int 0)))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT
   && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 8"
  "#"
  "&& reload_completed"
  [(parallel
    [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
     (clobber (reg:CC 33))])
    (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
  "
{
  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
  operands[1] = change_address (operands[1], QImode, 0);
}"
  [(set_attr "atype"   "mem")])

(define_insn_and_split "*extracthi"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
                         (match_operand 2 "const_int_operand" "n")
                         (const_int 0)))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT
   && INTVAL (operands[2]) >= 8 && INTVAL (operands[2]) < 16"
  "#"
  "&& reload_completed"
  [(parallel
    [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10))
     (clobber (reg:CC 33))])
    (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
  "
{
  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
  operands[1] = change_address (operands[1], HImode, 0);
}"
  [(set_attr "atype"   "mem")])

;
; extendsidi2 instruction pattern(s).
;

(define_expand "extendsidi2"
  [(set (match_operand:DI 0 "register_operand" "")
        (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))]
  ""
  "
{
  if (!TARGET_64BIT)
    {
      emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0]));
      emit_move_insn (gen_highpart (SImode, operands[0]), operands[1]);
      emit_move_insn (gen_lowpart (SImode, operands[0]), const0_rtx);
      emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (32)));
      DONE;
    }
}
")

(define_insn "*extendsidi2"
  [(set (match_operand:DI 0 "register_operand" "=d,d")
        (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")))]
  "TARGET_64BIT"
  "@
   lgfr\\t%0,%1
   lgf\\t%0,%1"
  [(set_attr "op_type" "RRE,RXE")
   (set_attr "atype"   "reg,mem")])

;
; extendhidi2 instruction pattern(s).
;

(define_expand "extendhidi2"
  [(set (match_operand:DI 0 "register_operand" "")
        (sign_extend:DI (match_operand:HI 1 "register_operand" "")))]
  ""
  "
{
  if (!TARGET_64BIT)
    {
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_extendhisi2 (tmp, operands[1]));
      emit_insn (gen_extendsidi2 (operands[0], tmp));
      DONE;
    }
  else
    {
      operands[1] = gen_lowpart (DImode, operands[1]);
      emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (48)));
      emit_insn (gen_ashrdi3 (operands[0], operands[0], GEN_INT (48))); 
      DONE;
    }
}
")

(define_insn "*extendhidi2"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (sign_extend:DI (match_operand:HI 1 "memory_operand" "m")))]
  "TARGET_64BIT"
  "lgh\\t%0,%1"
  [(set_attr "op_type" "RXE")
   (set_attr "atype"   "mem")])

;
; extendqidi2 instruction pattern(s).
;

(define_expand "extendqidi2"
  [(set (match_operand:DI 0 "register_operand" "")
        (sign_extend:DI (match_operand:QI 1 "register_operand" "")))]
  ""
  "
{
  if (!TARGET_64BIT)
    {
      rtx tmp = gen_reg_rtx (SImode);
      emit_insn (gen_extendqisi2 (tmp, operands[1]));
      emit_insn (gen_extendsidi2 (operands[0], tmp));
      DONE;
    }
  else
    {
      operands[1] = gen_lowpart (DImode, operands[1]);
      emit_insn (gen_ashldi3 (operands[0], operands[1], GEN_INT (56)));
      emit_insn (gen