📄 rom.rpt
字号:
13 - - C -- OUTPUT 0 1 0 0 L11
11 - - C -- OUTPUT 0 1 0 0 L12
39 - - - 21 OUTPUT 0 1 0 0 L13
73 - - - 01 OUTPUT 0 1 0 0 L14
89 - - C -- OUTPUT 0 1 0 0 L15
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: f:\test52\10k10 rom\led\rom.rpt
rom
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 8 - A 07 AND2 s 4 0 0 10 ~8602~1
- 7 - A 02 OR2 s ! 4 0 0 30 ~8622~1
- 8 - A 02 OR2 s 4 0 0 44 ~8662~1
- 8 - A 03 OR2 s 4 0 0 40 ~8702~1
- 7 - A 03 OR2 s 4 0 0 33 ~8722~1
- 1 - A 07 AND2 s 4 0 0 23 ~8742~1
- 5 - A 02 OR2 s 4 0 0 21 ~8902~1
- 1 - A 03 OR2 s ! 4 0 0 32 ~8942~1
- 2 - A 03 OR2 s 4 0 0 20 ~8982~1
- 6 - F 22 OR2 ! 0 2 0 5 :8982
- 6 - A 02 OR2 s 4 0 0 30 ~9022~1
- 3 - F 19 OR2 ! 0 2 0 6 :9042
- 1 - B 02 OR2 ! 0 2 0 5 :9062
- 4 - A 07 OR2 s ! 4 0 0 30 ~9082~1
- 1 - F 06 OR2 ! 0 2 0 3 :9082
- 4 - F 02 AND2 0 2 0 7 :9142
- 1 - F 09 OR2 0 4 0 1 :9165
- 1 - F 14 OR2 ! 0 2 0 2 :9222
- 6 - A 07 OR2 s 4 0 0 36 ~9262~1
- 8 - F 14 OR2 ! 0 2 0 5 :9262
- 1 - F 02 AND2 0 2 0 1 :9302
- 1 - F 03 OR2 ! 0 2 0 6 :9382
- 3 - F 12 OR2 ! 0 2 0 3 :9402
- 8 - F 12 AND2 0 2 0 9 :9462
- 5 - F 01 OR2 ! 0 2 0 7 :9482
- 2 - F 19 OR2 s 0 4 0 2 ~9487~1
- 3 - F 09 AND2 s 0 4 0 1 ~9487~2
- 1 - E 11 AND2 0 2 0 1 :9502
- 2 - E 03 OR2 ! 0 2 0 1 :9542
- 1 - F 11 AND2 0 2 0 3 :9602
- 3 - A 07 OR2 s 4 0 0 38 ~9722~1
- 3 - F 10 AND2 0 2 0 9 :9782
- 3 - F 11 OR2 s 0 4 0 2 ~9807~1
- 1 - F 04 AND2 s 0 4 0 1 ~9807~2
- 4 - F 09 OR2 0 4 0 1 :9807
- 5 - A 08 OR2 s 4 0 0 28 ~9902~1
- 1 - E 12 AND2 0 2 0 10 :9922
- 4 - E 12 OR2 s 0 4 0 3 ~9927~1
- 5 - E 04 OR2 s 0 4 0 3 ~9927~2
- 5 - F 09 OR2 0 4 0 1 :9927
- 1 - E 03 OR2 ! 0 2 0 6 :9982
- 8 - E 20 AND2 0 2 0 5 :10042
- 8 - E 07 AND2 0 2 0 6 :10062
- 8 - E 06 OR2 ! 0 2 0 15 :10082
- 8 - F 09 OR2 0 4 0 1 :10085
- 7 - E 05 OR2 s 0 4 0 3 ~10087~1
- 5 - E 05 AND2 s 0 4 0 5 ~10087~2
- 5 - E 11 OR2 ! 0 2 0 5 :10162
- 6 - A 03 OR2 s 4 0 0 25 ~10202~1
- 3 - A 08 OR2 s 4 0 0 26 ~10202~2
- 3 - A 03 OR2 s 4 0 0 25 ~10242~1
- 7 - E 16 OR2 ! 0 2 0 13 :10242
- 8 - E 15 OR2 ! 0 2 0 6 :10262
- 3 - A 02 OR2 s 4 0 0 29 ~10282~1
- 8 - E 22 AND2 0 2 0 6 :10282
- 1 - E 16 OR2 ! 0 2 0 11 :10302
- 4 - A 03 OR2 s 4 0 0 25 ~10322~1
- 2 - D 07 AND2 0 2 0 7 :10322
- 1 - E 24 OR2 ! 0 2 0 6 :10342
- 5 - A 07 OR2 s 4 0 0 36 ~10362~1
- 4 - E 14 OR2 ! 0 2 0 11 :10362
- 5 - E 18 OR2 ! 0 2 0 2 :10382
- 6 - E 24 OR2 ! 0 2 0 4 :10422
- 3 - E 24 OR2 ! 0 2 0 7 :10442
- 6 - E 18 AND2 0 2 0 1 :10462
- 2 - A 02 OR2 s 4 0 0 23 ~10502~1
- 5 - B 21 OR2 ! 0 2 0 4 :10602
- 5 - D 09 OR2 ! 0 2 0 9 :10642
- 4 - A 02 OR2 s 4 0 0 29 ~10682~1
- 1 - B 24 OR2 ! 0 2 0 4 :10682
- 1 - A 02 OR2 s 4 0 0 32 ~10722~1
- 5 - A 03 OR2 s 4 0 0 36 ~10762~1
- 2 - B 10 OR2 ! 0 2 0 7 :10762
- 4 - B 13 OR2 ! 0 2 0 5 :10782
- 3 - B 09 OR2 ! 0 2 0 5 :10802
- 1 - B 03 OR2 ! 0 2 0 9 :10882
- 6 - B 03 OR2 ! 0 2 0 11 :10902
- 8 - B 03 OR2 ! 0 2 0 9 :10922
- 4 - B 07 OR2 ! 0 2 0 9 :10942
- 5 - B 19 OR2 ! 0 2 0 8 :10962
- 3 - B 05 OR2 ! 0 2 0 7 :10982
- 1 - A 08 OR2 s 4 0 0 42 ~11002~1
- 4 - B 05 OR2 ! 0 2 0 8 :11002
- 3 - B 01 AND2 0 2 0 1 :11042
- 1 - B 01 OR2 ! 0 2 0 5 :11062
- 1 - E 04 OR2 ! 0 2 0 16 :11082
- 7 - B 04 OR2 0 4 0 1 :11085
- 5 - B 06 AND2 s 0 2 0 2 ~11087~1
- 2 - B 20 OR2 s 0 3 0 2 ~11087~2
- 3 - B 20 OR2 s 0 3 0 2 ~11087~3
- 8 - B 20 AND2 s 0 4 0 1 ~11087~4
- 1 - E 18 AND2 s 0 3 0 2 ~11087~5
- 5 - B 05 AND2 s 0 4 0 1 ~11087~6
- 1 - B 20 OR2 s 0 3 0 2 ~11087~7
- 8 - B 05 AND2 s 0 4 0 2 ~11087~8
- 5 - B 03 AND2 s 0 3 0 2 ~11087~9
- 2 - E 01 AND2 s 0 4 0 2 ~11087~10
- 1 - B 07 AND2 s 0 2 0 1 ~11087~11
- 4 - E 08 AND2 s 0 3 0 1 ~11087~12
- 3 - B 03 OR2 s 0 4 0 1 ~11087~13
- 2 - B 03 AND2 s 0 4 0 1 ~11087~14
- 5 - B 11 OR2 ! 0 2 0 1 :11142
- 7 - A 07 OR2 s 4 0 0 25 ~11182~1
- 3 - B 19 OR2 ! 0 2 0 7 :11182
- 1 - B 04 OR2 0 4 0 1 :11205
- 7 - C 11 AND2 0 2 0 5 :11242
- 7 - B 18 OR2 ! 0 2 0 8 :11282
- 2 - C 11 OR2 s ! 0 3 0 2 ~11287~1
- 5 - C 11 OR2 s 0 4 0 1 ~11287~2
- 3 - C 19 OR2 ! 0 2 0 2 :11322
- 5 - C 06 OR2 ! 0 2 0 5 :11362
- 3 - C 21 AND2 0 2 0 15 :11382
- 1 - C 07 OR2 0 4 0 1 :11387
- 3 - C 15 OR2 ! 0 2 0 6 :11522
- 1 - C 20 OR2 ! 0 2 0 5 :11542
- 5 - C 23 OR2 ! 0 2 0 10 :11622
- 2 - A 07 OR2 s ! 4 0 0 30 ~11642~1
- 2 - E 14 AND2 0 2 0 6 :11642
- 3 - C 07 OR2 0 4 0 1 :11645
- 6 - C 15 OR2 s 0 4 0 3 ~11647~1
- 4 - C 07 AND2 s 0 2 0 2 ~11647~2
- 4 - C 15 OR2 s 0 3 0 1 ~11647~3
- 1 - C 22 OR2 ! 0 2 0 2 :11742
- 1 - D 08 OR2 ! 0 2 0 5 :11782
- 1 - C 04 AND2 0 2 0 1 :11802
- 4 - A 08 OR2 s 4 0 0 22 ~11822~1
- 4 - C 14 OR2 ! 0 2 0 4 :11822
- 3 - C 03 OR2 ! 0 2 0 10 :11842
- 6 - C 03 OR2 0 4 0 1 :11885
- 5 - C 03 OR2 s 0 4 0 1 ~11887~1
- 8 - C 10 OR2 ! 0 2 0 8 :11942
- 3 - C 10 OR2 ! 0 2 0 10 :12002
- 7 - C 03 OR2 0 4 0 1 :12005
- 1 - C 24 OR2 ! 0 2 0 8 :12082
- 7 - F 16 OR2 0 4 0 1 :12121
- 8 - F 16 OR2 0 4 0 1 :12127
- 6 - F 16 OR2 0 4 0 1 :12133
- 1 - F 24 OR2 0 4 0 1 :12147
- 1 - F 13 OR2 s ! 0 4 0 2 ~12168~1
- 1 - F 15 OR2 0 4 0 1 :12168
- 2 - F 15 OR2 0 4 0 1 :12169
- 3 - F 15 OR2 0 4 0 1 :12175
- 4 - F 15 OR2 0 4 0 1 :12181
- 2 - F 18 OR2 s 0 3 0 2 ~12195~1
- 4 - F 08 OR2 s ! 0 3 0 1 ~12216~1
- 8 - F 08 OR2 s ! 0 3 0 3 ~12216~2
- 5 - F 15 OR2 0 4 0 1 :12216
- 6 - F 15 OR2 0 4 0 1 :12217
- 7 - F 15 OR2 0 4 0 1 :12223
- 4 - F 07 OR2 s 0 3 0 2 ~12243~1
- 2 - E 11 OR2 0 4 0 1 :12243
- 2 - E 09 OR2 s ! 0 3 0 1 ~12264~1
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