📄 adsp-edn-dual-core-extended_cdef.h

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#define bfin_read_DMA1_7_NEXT_DESC_PTR() bfin_readPTR(DMA1_7_NEXT_DESC_PTR)#define bfin_write_DMA1_7_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_7_NEXT_DESC_PTR, val)#define pDMA1_7_START_ADDR             ((void * volatile *)DMA1_7_START_ADDR)#define bfin_read_DMA1_7_START_ADDR()  bfin_readPTR(DMA1_7_START_ADDR)#define bfin_write_DMA1_7_START_ADDR(val) bfin_writePTR(DMA1_7_START_ADDR, val)#define pDMA1_7_X_COUNT                ((uint16_t volatile *)DMA1_7_X_COUNT)#define bfin_read_DMA1_7_X_COUNT()     bfin_read16(DMA1_7_X_COUNT)#define bfin_write_DMA1_7_X_COUNT(val) bfin_write16(DMA1_7_X_COUNT, val)#define pDMA1_7_Y_COUNT                ((uint16_t volatile *)DMA1_7_Y_COUNT)#define bfin_read_DMA1_7_Y_COUNT()     bfin_read16(DMA1_7_Y_COUNT)#define bfin_write_DMA1_7_Y_COUNT(val) bfin_write16(DMA1_7_Y_COUNT, val)#define pDMA1_7_X_MODIFY               ((uint16_t volatile *)DMA1_7_X_MODIFY)#define bfin_read_DMA1_7_X_MODIFY()    bfin_read16(DMA1_7_X_MODIFY)#define bfin_write_DMA1_7_X_MODIFY(val) bfin_write16(DMA1_7_X_MODIFY, val)#define pDMA1_7_Y_MODIFY               ((uint16_t volatile *)DMA1_7_Y_MODIFY)#define bfin_read_DMA1_7_Y_MODIFY()    bfin_read16(DMA1_7_Y_MODIFY)#define bfin_write_DMA1_7_Y_MODIFY(val) bfin_write16(DMA1_7_Y_MODIFY, val)#define pDMA1_7_CURR_DESC_PTR          ((void * volatile *)DMA1_7_CURR_DESC_PTR)#define bfin_read_DMA1_7_CURR_DESC_PTR() bfin_readPTR(DMA1_7_CURR_DESC_PTR)#define bfin_write_DMA1_7_CURR_DESC_PTR(val) bfin_writePTR(DMA1_7_CURR_DESC_PTR, val)#define pDMA1_7_CURR_ADDR              ((void * volatile *)DMA1_7_CURR_ADDR)#define bfin_read_DMA1_7_CURR_ADDR()   bfin_readPTR(DMA1_7_CURR_ADDR)#define bfin_write_DMA1_7_CURR_ADDR(val) bfin_writePTR(DMA1_7_CURR_ADDR, val)#define pDMA1_7_CURR_X_COUNT           ((uint16_t volatile *)DMA1_7_CURR_X_COUNT)#define bfin_read_DMA1_7_CURR_X_COUNT() bfin_read16(DMA1_7_CURR_X_COUNT)#define bfin_write_DMA1_7_CURR_X_COUNT(val) bfin_write16(DMA1_7_CURR_X_COUNT, val)#define pDMA1_7_CURR_Y_COUNT           ((uint16_t volatile *)DMA1_7_CURR_Y_COUNT)#define bfin_read_DMA1_7_CURR_Y_COUNT() bfin_read16(DMA1_7_CURR_Y_COUNT)#define bfin_write_DMA1_7_CURR_Y_COUNT(val) bfin_write16(DMA1_7_CURR_Y_COUNT, val)#define pDMA1_7_IRQ_STATUS             ((uint16_t volatile *)DMA1_7_IRQ_STATUS)#define bfin_read_DMA1_7_IRQ_STATUS()  bfin_read16(DMA1_7_IRQ_STATUS)#define bfin_write_DMA1_7_IRQ_STATUS(val) bfin_write16(DMA1_7_IRQ_STATUS, val)#define pDMA1_7_PERIPHERAL_MAP         ((uint16_t volatile *)DMA1_7_PERIPHERAL_MAP)#define bfin_read_DMA1_7_PERIPHERAL_MAP() bfin_read16(DMA1_7_PERIPHERAL_MAP)#define bfin_write_DMA1_7_PERIPHERAL_MAP(val) bfin_write16(DMA1_7_PERIPHERAL_MAP, val)#define pDMA1_8_CONFIG                 ((uint16_t volatile *)DMA1_8_CONFIG)#define bfin_read_DMA1_8_CONFIG()      bfin_read16(DMA1_8_CONFIG)#define bfin_write_DMA1_8_CONFIG(val)  bfin_write16(DMA1_8_CONFIG, val)#define pDMA1_8_NEXT_DESC_PTR          ((void * volatile *)DMA1_8_NEXT_DESC_PTR)#define bfin_read_DMA1_8_NEXT_DESC_PTR() bfin_readPTR(DMA1_8_NEXT_DESC_PTR)#define bfin_write_DMA1_8_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_8_NEXT_DESC_PTR, val)#define pDMA1_8_START_ADDR             ((void * volatile *)DMA1_8_START_ADDR)#define bfin_read_DMA1_8_START_ADDR()  bfin_readPTR(DMA1_8_START_ADDR)#define bfin_write_DMA1_8_START_ADDR(val) bfin_writePTR(DMA1_8_START_ADDR, val)#define pDMA1_8_X_COUNT                ((uint16_t volatile *)DMA1_8_X_COUNT)#define bfin_read_DMA1_8_X_COUNT()     bfin_read16(DMA1_8_X_COUNT)#define bfin_write_DMA1_8_X_COUNT(val) bfin_write16(DMA1_8_X_COUNT, val)#define pDMA1_8_Y_COUNT                ((uint16_t volatile *)DMA1_8_Y_COUNT)#define bfin_read_DMA1_8_Y_COUNT()     bfin_read16(DMA1_8_Y_COUNT)#define bfin_write_DMA1_8_Y_COUNT(val) bfin_write16(DMA1_8_Y_COUNT, val)#define pDMA1_8_X_MODIFY               ((uint16_t volatile *)DMA1_8_X_MODIFY)#define bfin_read_DMA1_8_X_MODIFY()    bfin_read16(DMA1_8_X_MODIFY)#define bfin_write_DMA1_8_X_MODIFY(val) bfin_write16(DMA1_8_X_MODIFY, val)#define pDMA1_8_Y_MODIFY               ((uint16_t volatile *)DMA1_8_Y_MODIFY)#define bfin_read_DMA1_8_Y_MODIFY()    bfin_read16(DMA1_8_Y_MODIFY)#define bfin_write_DMA1_8_Y_MODIFY(val) bfin_write16(DMA1_8_Y_MODIFY, val)#define pDMA1_8_CURR_DESC_PTR          ((void * volatile *)DMA1_8_CURR_DESC_PTR)#define bfin_read_DMA1_8_CURR_DESC_PTR() bfin_readPTR(DMA1_8_CURR_DESC_PTR)#define bfin_write_DMA1_8_CURR_DESC_PTR(val) bfin_writePTR(DMA1_8_CURR_DESC_PTR, val)#define pDMA1_8_CURR_ADDR              ((void * volatile *)DMA1_8_CURR_ADDR)#define bfin_read_DMA1_8_CURR_ADDR()   bfin_readPTR(DMA1_8_CURR_ADDR)#define bfin_write_DMA1_8_CURR_ADDR(val) bfin_writePTR(DMA1_8_CURR_ADDR, val)#define pDMA1_8_CURR_X_COUNT           ((uint16_t volatile *)DMA1_8_CURR_X_COUNT)#define bfin_read_DMA1_8_CURR_X_COUNT() bfin_read16(DMA1_8_CURR_X_COUNT)#define bfin_write_DMA1_8_CURR_X_COUNT(val) bfin_write16(DMA1_8_CURR_X_COUNT, val)#define pDMA1_8_CURR_Y_COUNT           ((uint16_t volatile *)DMA1_8_CURR_Y_COUNT)#define bfin_read_DMA1_8_CURR_Y_COUNT() bfin_read16(DMA1_8_CURR_Y_COUNT)#define bfin_write_DMA1_8_CURR_Y_COUNT(val) bfin_write16(DMA1_8_CURR_Y_COUNT, val)#define pDMA1_8_IRQ_STATUS             ((uint16_t volatile *)DMA1_8_IRQ_STATUS)#define bfin_read_DMA1_8_IRQ_STATUS()  bfin_read16(DMA1_8_IRQ_STATUS)#define bfin_write_DMA1_8_IRQ_STATUS(val) bfin_write16(DMA1_8_IRQ_STATUS, val)#define pDMA1_8_PERIPHERAL_MAP         ((uint16_t volatile *)DMA1_8_PERIPHERAL_MAP)#define bfin_read_DMA1_8_PERIPHERAL_MAP() bfin_read16(DMA1_8_PERIPHERAL_MAP)#define bfin_write_DMA1_8_PERIPHERAL_MAP(val) bfin_write16(DMA1_8_PERIPHERAL_MAP, val)#define pDMA1_9_CONFIG                 ((uint16_t volatile *)DMA1_9_CONFIG)#define bfin_read_DMA1_9_CONFIG()      bfin_read16(DMA1_9_CONFIG)#define bfin_write_DMA1_9_CONFIG(val)  bfin_write16(DMA1_9_CONFIG, val)#define pDMA1_9_NEXT_DESC_PTR          ((void * volatile *)DMA1_9_NEXT_DESC_PTR)#define bfin_read_DMA1_9_NEXT_DESC_PTR() bfin_readPTR(DMA1_9_NEXT_DESC_PTR)#define bfin_write_DMA1_9_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_9_NEXT_DESC_PTR, val)#define pDMA1_9_START_ADDR             ((void * volatile *)DMA1_9_START_ADDR)#define bfin_read_DMA1_9_START_ADDR()  bfin_readPTR(DMA1_9_START_ADDR)#define bfin_write_DMA1_9_START_ADDR(val) bfin_writePTR(DMA1_9_START_ADDR, val)#define pDMA1_9_X_COUNT                ((uint16_t volatile *)DMA1_9_X_COUNT)#define bfin_read_DMA1_9_X_COUNT()     bfin_read16(DMA1_9_X_COUNT)#define bfin_write_DMA1_9_X_COUNT(val) bfin_write16(DMA1_9_X_COUNT, val)#define pDMA1_9_Y_COUNT                ((uint16_t volatile *)DMA1_9_Y_COUNT)#define bfin_read_DMA1_9_Y_COUNT()     bfin_read16(DMA1_9_Y_COUNT)#define bfin_write_DMA1_9_Y_COUNT(val) bfin_write16(DMA1_9_Y_COUNT, val)#define pDMA1_9_X_MODIFY               ((uint16_t volatile *)DMA1_9_X_MODIFY)#define bfin_read_DMA1_9_X_MODIFY()    bfin_read16(DMA1_9_X_MODIFY)#define bfin_write_DMA1_9_X_MODIFY(val) bfin_write16(DMA1_9_X_MODIFY, val)#define pDMA1_9_Y_MODIFY               ((uint16_t volatile *)DMA1_9_Y_MODIFY)#define bfin_read_DMA1_9_Y_MODIFY()    bfin_read16(DMA1_9_Y_MODIFY)#define bfin_write_DMA1_9_Y_MODIFY(val) bfin_write16(DMA1_9_Y_MODIFY, val)#define pDMA1_9_CURR_DESC_PTR          ((void * volatile *)DMA1_9_CURR_DESC_PTR)#define bfin_read_DMA1_9_CURR_DESC_PTR() bfin_readPTR(DMA1_9_CURR_DESC_PTR)#define bfin_write_DMA1_9_CURR_DESC_PTR(val) bfin_writePTR(DMA1_9_CURR_DESC_PTR, val)#define pDMA1_9_CURR_ADDR              ((void * volatile *)DMA1_9_CURR_ADDR)#define bfin_read_DMA1_9_CURR_ADDR()   bfin_readPTR(DMA1_9_CURR_ADDR)#define bfin_write_DMA1_9_CURR_ADDR(val) bfin_writePTR(DMA1_9_CURR_ADDR, val)#define pDMA1_9_CURR_X_COUNT           ((uint16_t volatile *)DMA1_9_CURR_X_COUNT)#define bfin_read_DMA1_9_CURR_X_COUNT() bfin_read16(DMA1_9_CURR_X_COUNT)#define bfin_write_DMA1_9_CURR_X_COUNT(val) bfin_write16(DMA1_9_CURR_X_COUNT, val)#define pDMA1_9_CURR_Y_COUNT           ((uint16_t volatile *)DMA1_9_CURR_Y_COUNT)#define bfin_read_DMA1_9_CURR_Y_COUNT() bfin_read16(DMA1_9_CURR_Y_COUNT)#define bfin_write_DMA1_9_CURR_Y_COUNT(val) bfin_write16(DMA1_9_CURR_Y_COUNT, val)#define pDMA1_9_IRQ_STATUS             ((uint16_t volatile *)DMA1_9_IRQ_STATUS)#define bfin_read_DMA1_9_IRQ_STATUS()  bfin_read16(DMA1_9_IRQ_STATUS)#define bfin_write_DMA1_9_IRQ_STATUS(val) bfin_write16(DMA1_9_IRQ_STATUS, val)#define pDMA1_9_PERIPHERAL_MAP         ((uint16_t volatile *)DMA1_9_PERIPHERAL_MAP)#define bfin_read_DMA1_9_PERIPHERAL_MAP() bfin_read16(DMA1_9_PERIPHERAL_MAP)#define bfin_write_DMA1_9_PERIPHERAL_MAP(val) bfin_write16(DMA1_9_PERIPHERAL_MAP, val)#define pDMA1_10_CONFIG                ((uint16_t volatile *)DMA1_10_CONFIG)#define bfin_read_DMA1_10_CONFIG()     bfin_read16(DMA1_10_CONFIG)#define bfin_write_DMA1_10_CONFIG(val) bfin_write16(DMA1_10_CONFIG, val)#define pDMA1_10_NEXT_DESC_PTR         ((void * volatile *)DMA1_10_NEXT_DESC_PTR)#define bfin_read_DMA1_10_NEXT_DESC_PTR() bfin_readPTR(DMA1_10_NEXT_DESC_PTR)#define bfin_write_DMA1_10_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_10_NEXT_DESC_PTR, val)#define pDMA1_10_START_ADDR            ((void * volatile *)DMA1_10_START_ADDR)#define bfin_read_DMA1_10_START_ADDR() bfin_readPTR(DMA1_10_START_ADDR)#define bfin_write_DMA1_10_START_ADDR(val) bfin_writePTR(DMA1_10_START_ADDR, val)#define pDMA1_10_X_COUNT               ((uint16_t volatile *)DMA1_10_X_COUNT)#define bfin_read_DMA1_10_X_COUNT()    bfin_read16(DMA1_10_X_COUNT)#define bfin_write_DMA1_10_X_COUNT(val) bfin_write16(DMA1_10_X_COUNT, val)#define pDMA1_10_Y_COUNT               ((uint16_t volatile *)DMA1_10_Y_COUNT)#define bfin_read_DMA1_10_Y_COUNT()    bfin_read16(DMA1_10_Y_COUNT)#define bfin_write_DMA1_10_Y_COUNT(val) bfin_write16(DMA1_10_Y_COUNT, val)#define pDMA1_10_X_MODIFY              ((uint16_t volatile *)DMA1_10_X_MODIFY)#define bfin_read_DMA1_10_X_MODIFY()   bfin_read16(DMA1_10_X_MODIFY)#define bfin_write_DMA1_10_X_MODIFY(val) bfin_write16(DMA1_10_X_MODIFY, val)#define pDMA1_10_Y_MODIFY              ((uint16_t volatile *)DMA1_10_Y_MODIFY)#define bfin_read_DMA1_10_Y_MODIFY()   bfin_read16(DMA1_10_Y_MODIFY)#define bfin_write_DMA1_10_Y_MODIFY(val) bfin_write16(DMA1_10_Y_MODIFY, val)#define pDMA1_10_CURR_DESC_PTR         ((void * volatile *)DMA1_10_CURR_DESC_PTR)#define bfin_read_DMA1_10_CURR_DESC_PTR() bfin_readPTR(DMA1_10_CURR_DESC_PTR)#define bfin_write_DMA1_10_CURR_DESC_PTR(val) bfin_writePTR(DMA1_10_CURR_DESC_PTR, val)#define pDMA1_10_CURR_ADDR             ((void * volatile *)DMA1_10_CURR_ADDR)#define bfin_read_DMA1_10_CURR_ADDR()  bfin_readPTR(DMA1_10_CURR_ADDR)#define bfin_write_DMA1_10_CURR_ADDR(val) bfin_writePTR(DMA1_10_CURR_ADDR, val)#define pDMA1_10_CURR_X_COUNT          ((uint16_t volatile *)DMA1_10_CURR_X_COUNT)#define bfin_read_DMA1_10_CURR_X_COUNT() bfin_read16(DMA1_10_CURR_X_COUNT)#define bfin_write_DMA1_10_CURR_X_COUNT(val) bfin_write16(DMA1_10_CURR_X_COUNT, val)#define pDMA1_10_CURR_Y_COUNT          ((uint16_t volatile *)DMA1_10_CURR_Y_COUNT)#define bfin_read_DMA1_10_CURR_Y_COUNT() bfin_read16(DMA1_10_CURR_Y_COUNT)#define bfin_write_DMA1_10_CURR_Y_COUNT(val) bfin_write16(DMA1_10_CURR_Y_COUNT, val)#define pDMA1_10_IRQ_STATUS            ((uint16_t volatile *)DMA1_10_IRQ_STATUS)#define bfin_read_DMA1_10_IRQ_STATUS() bfin_read16(DMA1_10_IRQ_STATUS)#define bfin_write_DMA1_10_IRQ_STATUS(val) bfin_write16(DMA1_10_IRQ_STATUS, val)#define pDMA1_10_PERIPHERAL_MAP        ((uint16_t volatile *)DMA1_10_PERIPHERAL_MAP)#define bfin_read_DMA1_10_PERIPHERAL_MAP() bfin_read16(DMA1_10_PERIPHERAL_MAP)#define bfin_write_DMA1_10_PERIPHERAL_MAP(val) bfin_write16(DMA1_10_PERIPHERAL_MAP, val)#define pDMA1_11_CONFIG                ((uint16_t volatile *)DMA1_11_CONFIG)#define bfin_read_DMA1_11_CONFIG()     bfin_read16(DMA1_11_CONFIG)#define bfin_write_DMA1_11_CONFIG(val) bfin_write16(DMA1_11_CONFIG, val)#define pDMA1_11_NEXT_DESC_PTR         ((void * volatile *)DMA1_11_NEXT_DESC_PTR)#define bfin_read_DMA1_11_NEXT_DESC_PTR() bfin_readPTR(DMA1_11_NEXT_DESC_PTR)#define bfin_write_DMA1_11_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_11_NEXT_DESC_PTR, val)#define pDMA1_11_START_ADDR            ((void * volatile *)DMA1_11_START_ADDR)#define bfin_read_DMA1_11_START_ADDR() bfin_readPTR(DMA1_11_START_ADDR)#define bfin_write_DMA1_11_START_ADDR(val) bfin_writePTR(DMA1_11_START_ADDR, val)#define pDMA1_11_X_COUNT               ((uint16_t volatile *)DMA1_11_X_COUNT)#define bfin_read_DMA1_11_X_COUNT()    bfin_read16(DMA1_11_X_COUNT)#define bfin_write_DMA1_11_X_COUNT(val) bfin_write16(DMA1_11_X_COUNT, val)#define pDMA1_11_Y_COUNT               ((uint16_t volatile *)DMA1_11_Y_COUNT)#define bfin_read_DMA1_11_Y_COUNT()    bfin_read16(DMA1_11_Y_COUNT)#define bfin_write_DMA1_11_Y_COUNT(val) bfin_write16(DMA1_11_Y_COUNT, val)#define pDMA1_11_X_MODIFY              ((uint16_t volatile *)DMA1_11_X_MODIFY)#define bfin_read_DMA1_11_X_MODIFY()   bfin_read16(DMA1_11_X_MODIFY)#define bfin_write_DMA1_11_X_MODIFY(val) bfin_write16(DMA1_11_X_MODIFY, val)#define pDMA1_11_Y_MODIFY              ((uint16_t volatile *)DMA1_11_Y_MODIFY)#define bfin_read_DMA1_11_Y_MODIFY()   bfin_read16(DMA1_11_Y_MODIFY)#define bfin_write_DMA1_11_Y_MODIFY(val) bfin_write16(DMA1_11_Y_MODIFY, val)#define pDMA1_11_CURR_DESC_PTR         ((void * volatile *)DMA1_11_CURR_DESC_PTR)
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