music.sim.rpt

电子琴

; Total nodes checked                                 ; 30           ;
; Total output ports checked                          ; 29           ;
; Total output ports with complete 1/0-value coverage ; 27           ;
; Total output ports with no 1/0-value coverage       ; 2            ;
; Total output ports with no 1-value coverage         ; 2            ;
; Total output ports with no 0-value coverage         ; 2            ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                      ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; Node Name                                                                             ; Output Port Name                                                                      ; Output Port Type ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; |auto|automusic                                                                       ; |auto|automusic                                                                       ; pin_out          ;
; |auto|inst14                                                                          ; |auto|inst14                                                                          ; out0             ;
; |auto|inst9                                                                           ; |auto|inst9                                                                           ; out0             ;
; |auto|romclock                                                                        ; |auto|romclock                                                                        ; out              ;
; |auto|3ms                                                                             ; |auto|3ms                                                                             ; out              ;
; |auto|1                                                                               ; |auto|1                                                                               ; out              ;
; |auto|inst12                                                                          ; |auto|inst12                                                                          ; out0             ;
; |auto|4                                                                               ; |auto|4                                                                               ; out              ;
; |auto|inst11                                                                          ; |auto|inst11                                                                          ; out0             ;
; |auto|3                                                                               ; |auto|3                                                                               ; out              ;
; |auto|inst10                                                                          ; |auto|inst10                                                                          ; out0             ;
; |auto|2                                                                               ; |auto|2                                                                               ; out              ;
; |auto|5                                                                               ; |auto|5                                                                               ; out              ;
; |auto|74160:inst|9                                                                    ; |auto|74160:inst|9                                                                    ; out              ;
; |auto|74160:inst|13                                                                   ; |auto|74160:inst|13                                                                   ; out0             ;
; |auto|74160:inst|49                                                                   ; |auto|74160:inst|49                                                                   ; out0             ;
; |auto|74160:inst|46                                                                   ; |auto|74160:inst|46                                                                   ; out0             ;
; |auto|74160:inst|8                                                                    ; |auto|74160:inst|8                                                                    ; out              ;
; |auto|74160:inst|12                                                                   ; |auto|74160:inst|12                                                                   ; out0             ;
; |auto|74160:inst|28                                                                   ; |auto|74160:inst|28                                                                   ; out0             ;
; |auto|74160:inst|7                                                                    ; |auto|74160:inst|7                                                                    ; out              ;
; |auto|74160:inst|11                                                                   ; |auto|74160:inst|11                                                                   ; out0             ;
; |auto|74160:inst|50                                                                   ; |auto|74160:inst|50                                                                   ; out0             ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[0] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[0] ; portadataout0    ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[1] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[1] ; portadataout0    ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[2] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[2] ; portadataout0    ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[3] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[3] ; portadataout0    ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                                         ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; Node Name                                                                             ; Output Port Name                                                                      ; Output Port Type ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; |auto|inst13                                                                          ; |auto|inst13                                                                          ; out0             ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[4] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[4] ; portadataout0    ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                                                         ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; Node Name                                                                             ; Output Port Name                                                                      ; Output Port Type ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+
; |auto|inst13                                                                          ; |auto|inst13                                                                          ; out0             ;
; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[4] ; |auto|rom0:inst4|altsyncram:altsyncram_component|altsyncram_lbs:auto_generated|q_a[4] ; portadataout0    ;
+---------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Fri Dec 28 01:26:00 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off music -c music
Warning: Ignored node in vector source file. Can't find corresponding node name "a" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "b" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "c" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "d" in design.
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      93.10 %
Info: Number of transitions in simulation is 7748
Info: Quartus II Simulator was successful. 0 errors, 4 warnings
    Info: Processing ended: Fri Dec 28 01:26:00 2007
    Info: Elapsed time: 00:00:01