sysdot11end.h

PNE 3.3 wlan source code, running at more than vxworks6.x version

#define AR5212_DEVID_0016 (0x0016) /* ar5212 forward compatibility id */
#define AR5212_DEVID_0017 (0x0017) /* ar5212 forward compatibility id */
#define AR5212_DEVID_0018 (0x0018) /* ar5212 forward compatibility id */
#define AR5212_DEVID_0019 (0x0019) /* ar5212 forward compatibility id */

/* AR5213 */
#define AR5213_SREV_1_0 (0x55)
#define AR5213_SREV_REG (0x4020)

/* Device Driver macros that are used to flag various error conditions */
#define DOT11_BUS_MEM_SIZE                (0x10000) /* 64KB */
#define DOT11_BSP_VERSION                 DOT11_BSP_INFO_VER_0
#define DOT11_BSP_FUNC_NOT_SUPPORTED      NULL
#define DOT11_BSP_PTR_PARAM_NOT_SUPPORTED NULL
#define DOT11_BSP_PARAM_NOT_SUPPORTED     0
#define DOT11_BSP_CPU_TO_BUS_DEFAULT      0

/* 
 * Enumerated type used to describe processor used by one of the
 * supported BSPs
 */
typedef enum
    {
    IS_PCPENTIUM3 = 0,
    IS_IDT334,
    IS_IXDP425,
    IS_MALTA4KC,
    IS_MS7751SE,
    IS_INTEGRATOR,
    IS_POWERQUICC_II,
    IS_POWERQUICC_III,
    IS_ICECUBE5200
    } BSP_T;

/*
 * Enumerated type used to describe the number of bus slots that are
 * supported by the BSP
 */
typedef enum
    {
    BUS_SLOTS_1 = 1,
    BUS_SLOTS_2,
    BUS_SLOTS_3,
    BUS_SLOTS_4,
    BUS_SLOTS_5
    } BUS_SLOTS_T;

/*
 * This structure is used to define bus specific parameters as well
 * as the number of instances of any gven device that are found on 
 * the bus
 */
typedef struct dot11_board_id
    {
    UINT32 vendorId; /* Vendor ID */
    UINT32 deviceId; /* Device ID */
    UINT32 instance; /* Card instance */
    } DOT11_BOARD_ID;

/*
 * This structure is used to store low level system resource 
 * information for a given device. This information is passed to 
 * the higher layers of the system software by the END mechanism 
 * where it is utilized by various components during run time
 */
typedef struct dot11_bus_rsrc 
    {
    BOOL used; /* Flag to check if unit is available */
    UINT32 membaseCsr; /* MEM Base Address */
    UINT8 irqLevel; /* Interrupt Request Level */
    UINT8 irqVector; /* Interrupt Request vector */
    UINT32 bus; /* Bus number */
    UINT32 device; /* Device number */
    UINT32 function; /* Function number */
    UINT16 deviceId; /* device ID */
    UINT16 vendorId; /* vendor ID */
    UINT16 subVenId; /* subVendor ID */
    UINT16 subDevId; /* subDev ID */
    UINT8 pciChipSetRev; /* chip rev */
    INT32 magicNum; /* Magic number */
    UINT32 allocatedMemBase; /* Base address of heap allocated memory */
    } DOT11_BUS_RSRC;

/*
 * This structure is used as a binding layer between the system level 
 * device driver and one of the supported BSPs. For any given BSP there 
 * may be subtle differences between the types of physical resources 
 * provided by the lower layer which are required by the dewvice driver. 
 * It is the intention of the below defined structure to capture a superset
 * of these requirements in a generic fashion. By using a dynamic binding 
 * structure as below we can further abstract the device driver from the 
 * required details of the hardware.
 */
typedef struct dot11_bsp_binding
    {
    /*
     * This field defines the BSP type that is being used
     * (i.e. IXPDP425, PCPENTIUM etc...).
     */
    BSP_T type;

    /*
     * The following structure defines functions that are needed
     * to set up the device on the bus. Typically these calls are provided
     * by the BSP layer or standard vxWorks pciLib
     */
    struct bus_s
        {
        /*
         * Probe the bus and extract card header information on 
         * a per device basis. Paramters provided by this call will
         * include the device memory mapping, interrupt vector etc.
         */
        STATUS (*findDevice)();    

        /*
         * Connect a device level interrupt into the master bus
         * interrupt handler
         */
        STATUS (*intConnect)();  

        /*
         * Remove a device level interrupt from the master bus
         * interrupt handler
         */  
        STATUS (*intDisconnect)(); 

        /* Enable source level interrupts for the device */
        STATUS (*intEnable)();     

        /* Disable source level interrupts for the device */
        STATUS (*intDisable)();    

        /*
         * Hardware specific delay mechanism that is provided by
         * the BSP - see sysLib.c for details
         */
        void (*usDelay)(); 

        /*
         * Disable bus configuration access. This function is typically
         * handled by some but not all BSPs - see sysLib.c for details
         */
        void (*errDisable)(); 

        /*
         * Enable bus configuration access. This function is typically
         * handled by some but not all BSPs - see sysLib.c for details
         */
        void (*errEnable)();

        /*
         * Add the device to the configuration list - see sysLib.c
         * for details
         */
        void (*assignDevice)();  

        /*
         * Compensate for inaccurate usec timing on the BSP level
         * usec delay routines
         */
        UINT32 delayFactor; 
        } bus;

    /*
     * The following structure is used to add CPU based configuration
     * to allow access from the CPU to the bus device and the bus device
     * to DMA into system memory etc...
     */  
    struct cpu_s
        {
        /*
         * Convert bus addresses into virtual address - These 
         * translations are typicall handled by the architecture
         * specific cacheLib implementations
         */
        void* (*busToVirt)(); 

        /*
         * Convert bus addresses into virtual address - These 
         * translations are typicall handled by the architecture
         * specific cacheLib implementations
         */
        void* (*virtToBus)();     

        /*
         * Allow the bus device DMA access into system memory. This
         * function is typically provided by the BSP since it has 
         * dependency on the pci host controller that is used
         */
        STATUS (*dmaMappingAdd)(); 

        /*
         * Map a bus device memory region into the CPU mmu table.
         * Currently this is only used by the PCPENTIUM based BSPs
         */
        STATUS (*mmuMappingAdd)(); 

        /* Convert a bus address into a cpu address */
        UINT32 memAddrOffset; 

        /* Interrupt vector used by the bus device */
        UINT32 iVec;

        /*
         * Flag used to select usage of cacheDrv or not. Currently
         * every architecture uses cacheLib with the excecption of 
         * PCPENTIUM based BSPs
         */
        BOOL useCacheDrv;

        /* Compensates for interrupt level translation */
        UINT32 intLvlFactor;

        /* System mmu mapping mask */
        UINT32 mmuMask;

        /* System mmu mapping Config */
        UINT32 mmuConfig;

        /* interrupt level to interrupt vector translation */
        UINT32 lvlToVec;

        /* Bus master aliasing */
        UINT32 memAlias;
        } cpu;
   
    /* The follwing structure provides system level functions */
    struct system_s
        {
        /* Set up the number of slots on the board */
        BUS_SLOTS_T busSlots;        

        /* Provides access to the end device table */
        STATUS (*endDevTblAdd)(); 
        } system;

    } DOT11_BSP_BINDING;

/*
 * This structure is board level binding that contians bindings 
 * to both the upper and lower layers of the device driver
 */
typedef struct dot11_bsp
    {
    DOT11_BSP_FUNC support; /* Support functions */
    DOT11_DEFAULT_CONFIG* wlanConfig; /* WLAN default config */
    DOT11_BSP_BINDING* bsp; /* Low Level BSP functions */
    DOT11_BOARD_ID* cards; /* Supported cards */
    DOT11_BUS_RSRC resource[DOT11_SLOTS]; /* Card resources */
    UINT32 nDevs; /* Number of cards on bus */
    END_OBJ* (*endLoad)(); /* END load mechanism */ 
    END_TBL_ENTRY* endTbl; /* END table referenece */
    } DOT11_BSP;

/* EXTERNAL REFERENCES */
IMPORT END_OBJ * dot11EndLoad(char *, void *);
void sysDot11SupportedBSPShow(void);
IMPORT END_TBL_ENTRY endDevTbl[];
IMPORT STATUS dot11SmeEssInit(DOT11_FW *);
IMPORT STATUS dot11SmeIbssInit(DOT11_FW *);
IMPORT STATUS dot11SmeApInit(DOT11_FW *);
IMPORT STATUS dot11RsnInit(DOT11_FW *);

#ifdef  __cplusplus
}
#endif /* __cplusplus */
#endif /* __INCsysDot11Endh */