sysdot11end.c

PNE 3.3 wlan source code, running at more than vxworks6.x version

        0
    },
#     else
    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        pciIntConnect, 
        /* Use standard pciLib int disconnect routines */
        pciIntDisconnect2, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        sysIntEnablePIC,                
        sysIntDisablePIC,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysDelay,
        /* Bus configuration access is ok by default */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Assign bus resources to the bus controller */
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Set the delay factor to be 0 */
        0
    },
#    endif
    /* This structure is used to add CPU based configuration to allow
    access from the CPU to the bus device and the bus device to DMA 
    into system memory etc... */ 
    {
        /* Dma mapping, mmu mapping and BSP level bus translation is
        not required by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Bus address into a cpu address conversion offset */
        K1BASE,
        /* Nothing special about the interrupt vector or levels */
        DOT11_BSP_PARAM_NOT_SUPPORTED, 
        /* This BSP makes use of the cache driver */
        TRUE,
        /* Used by the BSP level int connect/disconnect routine */
        INT_NUM_IRQ0,
        /* System mmu mapping mask */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping configuration */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* interrupt level to interrupt vector translation */
        0,
        /* Bus master aliasing */
        DOT11_BSP_PARAM_NOT_SUPPORTED
    },
     
    /* This structure provides system level functions */
    {
        /* Number of bus slots on the board */
        BUS_SLOTS_4,  
        /* There is no routine to add devs to the end table dynamically
        in this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED        
    }
#elif defined(__INCwrPpmcIdt334)
    /* Current BSP ID field */
    IS_IDT334,

    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        pciIntConnect, 
        /* Use standard pciLib int disconnect routines */
        pciIntDisconnect2, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        DOT11_BSP_FUNC_NOT_SUPPORTED,                
        DOT11_BSP_FUNC_NOT_SUPPORTED,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysUSecDelay,
        /* Bus access functions are used by this BSP */
        sysPciBusErrDisable, 
        sysPciBusErrEnable,
        /* Assign bus resources to the bus controller */
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Set the delay factor to be 0 */
        0
    },

    /* This structure is used to add CPU based configuration to allow
    access from the CPU to the bus device and the bus device to DMA 
    into system memory etc... */ 
    {
        /* Dma mapping, mmu mapping and BSP level bus translation is
        not required by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Bus address into a cpu address conversion offset */
        DOT11_BSP_CPU_TO_BUS_DEFAULT,
        /* This BSP uses a hardcoded interrupt vector */
        INT_NUM_PCI_A, 
        /* This BSP makes use of the cache driver */
        TRUE,
        /* Used by the BSP level int connect/disconnect routine */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping mask */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping configuration */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* interrupt level to interrupt vector translation */
        0,
        /* Bus master aliasing */
        DOT11_BSP_PARAM_NOT_SUPPORTED
    },
     
    /* This structure provides system level functions */
    {
        /* Number of bus slots on the board */
        BUS_SLOTS_1,  
        /* This BSP has a rotuine to add devs to the end table 
        dynamically */
        sysEndDevTblAdd        
    }
#elif defined(INCpch)
    /* Current BSP ID field */
    IS_PCPENTIUM3,

    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        pciIntConnect, 
        /* Use standard pciLib int disconnect routines */
        pciIntDisconnect2, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        sysIntEnablePIC,                
        sysIntDisablePIC,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysDelay,
        /* Bus access functions are used by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Assign bus resources to the bus controller */
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Set the delay factor to be 0 */
        0
    },

    /* This structure is used to add CPU based configuration to allow
    access from the CPU to the bus device and the bus device to DMA 
    into system memory etc... */ 
    {
        /* Dma mapping, and BSP level bus translation is
        not required by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Requires mmu mapping of PCI space */
        sysMmuMapAdd,
        /* Bus address into a cpu address conversion offset */
        DOT11_BSP_CPU_TO_BUS_DEFAULT,
        /* Nothing special about the interrupt vector */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* This BSP makes no use of the cache driver */
        FALSE,
        /* Used by the BSP level int connect/disconnect routine */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping mask */
        VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
        /* System mmu mapping configuration */
        VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT,
        /* interrupt level to interrupt vector translation */
        INT_NUM_IRQ0,
        /* Bus master aliasing */
        DOT11_BSP_PARAM_NOT_SUPPORTED
    },
     
    /* This structure provides system level functions */
    {
        /* Number of bus slots on the board */
        BUS_SLOTS_5,  
        /* This BSP has a no rotuine to add devs to the end table 
        dynamically */
        DOT11_BSP_FUNC_NOT_SUPPORTED        
    }
#elif defined(INCixpIxp425h)
    /* Current BSP ID field */
    IS_IXDP425,

    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        pciIntConnect, 
        /* Use standard pciLib int disconnect routines */
        pciIntDisconnect, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        intEnable,                
        intDisable,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysMicroDelay,
        /* Bus access functions are used by this BSP */
        (void(*)())pciDeviceExists, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Assign bus resources to the bus controller */
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Set the delay factor to be 0 */
        0
    },

    /* This structure is used to add CPU based configuration to allow
    access from the CPU to the bus device and the bus device to DMA 
    into system memory etc... */ 
    {
        /* Dma mapping, and BSP level bus translation is
        required by this BSP */
        sysPciToPhys, 
        sysPhysToPci, 
        sysPciMappingAdd, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Bus address into a cpu address conversion offset */
        IXP425_PCI_BASE,
        /* Use a hardcoded interrupt vector */
        DOT11_BSP_PARAM_NOT_SUPPORTED, 
        /* This BSP makes use of the cache driver */
        TRUE,
        /* Used by the BSP level int connect/disconnect routine */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping mask */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping configuration */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* interrupt level to interrupt vector translation */
        0,
        /* Bus master aliasing */
        DOT11_BSP_PARAM_NOT_SUPPORTED
    },
     
    /* This structure provides system level functions */
    {
        /* Number of bus slots on the board */
        BUS_SLOTS_4,  
        /* This BSP has a routine to add devs to the end table 
        dynamically */
        DOT11_BSP_FUNC_NOT_SUPPORTED        
    }
#elif defined(INCms7751seh)
    /* Current BSP ID field */
    IS_MS7751SE,

    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        pciIntConnect, 
        /* Use standard pciLib int disconnect routines */
        pciIntDisconnect2, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        sysPicIntEnable,                
        sysPicIntDisable,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysMsDelay,
        /* Bus access functions are used by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Assign bus resources to the bus controller */
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Set the delay factor to be 5 (1024) */
        5
    },

    /* This structure is used to add CPU based configuration to allow
    access from the CPU to the bus device and the bus device to DMA 
    into system memory etc... */ 
    {
        /* Dma mapping, and BSP level bus translation is
        required by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Bus address into a cpu address conversion offset */
        (PCI_MSTR_MEMIO_LOCAL-PCI_MSTR_MEMIO_BUS), 
        /* Use a hardcoded interrupt vector */
        DOT11_BSP_PARAM_NOT_SUPPORTED, 
        /* This BSP makes use of the cache driver */
        TRUE,
        /* Used by the BSP level int connect/disconnect routine */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping mask */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* System mmu mapping configuration */
        DOT11_BSP_PARAM_NOT_SUPPORTED,
        /* interrupt level to interrupt vector traslation */
        0x70,
        /* Bus master aliasing */
        DOT11_BSP_PARAM_NOT_SUPPORTED
    },
     
    /* This structure provides system level functions */
    {
        /* Number of bus slots on the board */
        BUS_SLOTS_2,  
        /* This BSP has a rotuine to add devs to the end table 
        dynamically */
        DOT11_BSP_FUNC_NOT_SUPPORTED        
    }
#elif defined(INCintegratorh)
    /* Current BSP ID field */
    IS_INTEGRATOR,

    /* The following structure defines functions that are needed
    to set up the device on the bus. Typically these calls are provided
    by the BSP layer or standard vxWorks pciLib */
    {
        /* Use standard pciLib device probing routines */
        pciFindDevice, 
        /* Use standard pciLib int connect routines */
        intConnect, 
        /* Use standard pciLib int disconnect routines */
        NULL, 
        /* Use BSP defined int enable/disable routines - see sysLib.c
        for details */
        intEnable,                
        intDisable,  
        /* Use BSP defined hardware based delay routines - see sysLib.c
        for details */
        sysDelay,
        /* Bus access functions are used by this BSP */
        DOT11_BSP_FUNC_NOT_SUPPORTED, 
        DOT11_BSP_FUNC_NOT_SUPPORTED,
        /* Assign bus resources to the bus controller */
        pciAssignResources,