📄 regs.c
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/* * regs.c - architected registers state routines * * This file is an adaptation of the software in the SimpleScalar tool suite * originally written by Todd M. Austin for the Multiscalar Research Project * at the University of Wisconsin-Madison. * * The modifications were made by Naraig Manjikian at Queen's University, * Kingston, Ontario, Canada. * * The remainder of this header comment is unchanged from the original text. * *.......................................................................... * * Copyright (C) 1994, 1995, 1996, 1997 by Todd M. Austin * * This source file is distributed "as is" in the hope that it will be * useful. The tool set comes with no warranty, and no author or * distributor accepts any responsibility for the consequences of its * use. * * Everyone is granted permission to copy, modify and redistribute * this tool set under the following conditions: * * This source code is distributed for non-commercial use only. * Please contact the maintainer for restrictions applying to * commercial use. * * Permission is granted to anyone to make or distribute copies * of this source code, either as received or modified, in any * medium, provided that all copyright notices, permission and * nonwarranty notices are preserved, and that the distributor * grants the recipient permission for further redistribution as * permitted by this document. * * Permission is granted to distribute this file in compiled * or executable form under the same conditions that apply for * source code, provided that either: * * A. it is accompanied by the corresponding machine-readable * source code, * B. it is accompanied by a written offer, with no time limit, * to give anyone a machine-readable copy of the corresponding * source code in return for reimbursement of the cost of * distribution. This written offer must permit verbatim * duplication by anyone, or * C. it is distributed by someone who received only the * executable form, and is accompanied by a copy of the * written offer of source code that they received concurrently. * * In other words, you are welcome to use, share and improve this * source file. You are forbidden to forbid anyone else to use, share * and improve what you give them. * * INTERNET: dburger@cs.wisc.edu * US Mail: 1210 W. Dayton Street, Madison, WI 53706 * * $Id: regs.c,v 1.4 1997/03/11 01:19:28 taustin Exp taustin $ * * $Log: regs.c,v $ * Revision 1.4 1997/03/11 01:19:28 taustin * updated copyright * long/int tweaks made for ALPHA target support * * Revision 1.3 1997/01/06 16:02:36 taustin * comments updated * * Revision 1.1 1996/12/05 18:52:32 taustin * Initial revision * * */#include <stdio.h>#include <stdlib.h>#include <string.h>#include "misc.h"#include "ss.h"#include "loader.h"#include "regs.h"/* (signed) integer register file */SS_WORD_TYPE regs_R[MAX_PROCS][SS_NUM_REGS];/* floating point register file */union regs_FP regs_F[MAX_PROCS];/* (signed) hi register, holds mult/div results */SS_WORD_TYPE regs_HI[MAX_PROCS];/* (signed) lo register, holds mult/div results */SS_WORD_TYPE regs_LO[MAX_PROCS];/* floating point condition codes */int regs_FCC[MAX_PROCS];/* program counter */SS_ADDR_TYPE regs_PC[MAX_PROCS];/* initialize architected register state */voidregs_init(int pid, SS_ADDR_TYPE init_stack_ptr, SS_ADDR_TYPE entry_ptr){ int i; for (i=0; i<SS_NUM_REGS; i++) regs_F[pid].l[i] = regs_R[pid][i] = 0; regs_HI[pid] = 0; regs_LO[pid] = 0; regs_FCC[pid] = 0; regs_PC[pid] = 0; /* set up initial register state (pid determines how to set) */ if (pid == 0) { regs_R[pid][SS_STACK_REGNO] = ld_environ_base; regs_PC[pid] = ld_prog_entry; } else { regs_R[pid][SS_STACK_REGNO] = init_stack_ptr; regs_PC[pid] = entry_ptr; /* get current value of global pointer */ regs_R[pid][SS_GP_REGNO] = regs_R[0][SS_GP_REGNO]; }}/* dump all architected register state values to output stream STREAM */voidregs_dump(FILE *stream, int pid) /* output stream */{ int i; /* stderr is the default output stream */ if (!stream) stream = stderr; /* dump processor register state */ fprintf(stream, "Processor state:\n"); fprintf(stream, " PC: 0x%08x\n", regs_PC[pid]); for (i=0; i<SS_NUM_REGS; i += 2) { fprintf(stream, " R[%2d]: %12d/0x%08x", i, regs_R[pid][i], regs_R[pid][i]); fprintf(stream, " R[%2d]: %12d/0x%08x\n", i+1, regs_R[pid][i+1], regs_R[pid][i+1]); } fprintf(stream, " HI: %10d/0x%08x LO: %10d/0x%08x\n", regs_HI[pid], regs_HI[pid], regs_LO[pid], regs_LO[pid]); for (i=0; i<SS_NUM_REGS; i += 2) { fprintf(stream, " F[%2d]: %12d/0x%08x", i, regs_F[pid].l[i], regs_F[pid].l[i]); fprintf(stream, " F[%2d]: %12d/0x%08x\n", i+1, regs_F[pid].l[i+1], regs_F[pid].l[i+1]); } fprintf(stream, " FCC: 0x%08x\n", regs_FCC[pid]);}
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