hw2.map.qmsg

用NEC编码方式写的红外发送程序,包括三个部分,分频,编码,编码输出

{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st8 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st8\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st7 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st7\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st6 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st6\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st5 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st5\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st4 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st4\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st3 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st3\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st2 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st2\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st1 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st1\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "current_state.st0 bm2.vhd(338) " "Info (10041): Verilog HDL or VHDL info at bm2.vhd(338): inferred latch for \"current_state.st0\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 338 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fenpin fenpin:inst1 " "Info: Elaborating entity \"fenpin\" for hierarchy \"fenpin:inst1\"" {  } { { "hw2.bdf" "inst1" { Schematic "E:/altera/work/hw2/hw2.bdf" { { 136 208 304 232 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "zb:inst2\|c_c High " "Info: Power-up level of register \"zb:inst2\|c_c\" is not specified -- using power-up level of High to minimize register" {  } { { "zb.vhd" "" { Text "E:/altera/work/hw2/zb.vhd" 10 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "zb:inst2\|c_c data_in VCC " "Warning: Reduced register \"zb:inst2\|c_c\" with stuck data_in port to stuck value VCC" {  } { { "zb.vhd" "" { Text "E:/altera/work/hw2/zb.vhd" 10 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_USE_LATCH" "zb:inst2\|zb1 " "Warning: LATCH primitive \"zb:inst2\|zb1\" is permanently enabled" {  } { { "zb.vhd" "" { Text "E:/altera/work/hw2/zb.vhd" 6 -1 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently enabled" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|hw2\|bm2:inst\|next_state 34 " "Info: State machine \"\|hw2\|bm2:inst\|next_state\" contains 34 states" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 12 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|hw2\|bm2:inst\|next_state " "Info: Selected Auto state machine encoding method for state machine \"\|hw2\|bm2:inst\|next_state\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 12 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|hw2\|bm2:inst\|next_state " "Info: Encoding result for state machine \"\|hw2\|bm2:inst\|next_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "34 " "Info: Completed encoding using 34 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st33 " "Info: Encoded state bit \"bm2:inst\|next_state.st33\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st32 " "Info: Encoded state bit \"bm2:inst\|next_state.st32\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st31 " "Info: Encoded state bit \"bm2:inst\|next_state.st31\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st30 " "Info: Encoded state bit \"bm2:inst\|next_state.st30\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st29 " "Info: Encoded state bit \"bm2:inst\|next_state.st29\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st28 " "Info: Encoded state bit \"bm2:inst\|next_state.st28\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st27 " "Info: Encoded state bit \"bm2:inst\|next_state.st27\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st26 " "Info: Encoded state bit \"bm2:inst\|next_state.st26\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st25 " "Info: Encoded state bit \"bm2:inst\|next_state.st25\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st24 " "Info: Encoded state bit \"bm2:inst\|next_state.st24\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st23 " "Info: Encoded state bit \"bm2:inst\|next_state.st23\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st22 " "Info: Encoded state bit \"bm2:inst\|next_state.st22\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st21 " "Info: Encoded state bit \"bm2:inst\|next_state.st21\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st20 " "Info: Encoded state bit \"bm2:inst\|next_state.st20\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st19 " "Info: Encoded state bit \"bm2:inst\|next_state.st19\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st18 " "Info: Encoded state bit \"bm2:inst\|next_state.st18\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st17 " "Info: Encoded state bit \"bm2:inst\|next_state.st17\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st16 " "Info: Encoded state bit \"bm2:inst\|next_state.st16\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st15 " "Info: Encoded state bit \"bm2:inst\|next_state.st15\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st14 " "Info: Encoded state bit \"bm2:inst\|next_state.st14\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st13 " "Info: Encoded state bit \"bm2:inst\|next_state.st13\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st12 " "Info: Encoded state bit \"bm2:inst\|next_state.st12\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st11 " "Info: Encoded state bit \"bm2:inst\|next_state.st11\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st10 " "Info: Encoded state bit \"bm2:inst\|next_state.st10\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st9 " "Info: Encoded state bit \"bm2:inst\|next_state.st9\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st8 " "Info: Encoded state bit \"bm2:inst\|next_state.st8\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st7 " "Info: Encoded state bit \"bm2:inst\|next_state.st7\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st6 " "Info: Encoded state bit \"bm2:inst\|next_state.st6\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st5 " "Info: Encoded state bit \"bm2:inst\|next_state.st5\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st4 " "Info: Encoded state bit \"bm2:inst\|next_state.st4\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st3 " "Info: Encoded state bit \"bm2:inst\|next_state.st3\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st2 " "Info: Encoded state bit \"bm2:inst\|next_state.st2\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st1 " "Info: Encoded state bit \"bm2:inst\|next_state.st1\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "bm2:inst\|next_state.st0 " "Info: Encoded state bit \"bm2:inst\|next_state.st0\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st0 0000000000000000000000000000000000 " "Info: State \"\|hw2\|bm2:inst\|next_state.st0\" uses code string \"0000000000000000000000000000000000\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st1 0000000000000000000000000000000011 " "Info: State \"\|hw2\|bm2:inst\|next_state.st1\" uses code string \"0000000000000000000000000000000011\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st2 0000000000000000000000000000000101 " "Info: State \"\|hw2\|bm2:inst\|next_state.st2\" uses code string \"0000000000000000000000000000000101\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st3 0000000000000000000000000000001001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st3\" uses code string \"0000000000000000000000000000001001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st4 0000000000000000000000000000010001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st4\" uses code string \"0000000000000000000000000000010001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st5 0000000000000000000000000000100001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st5\" uses code string \"0000000000000000000000000000100001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st6 0000000000000000000000000001000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st6\" uses code string \"0000000000000000000000000001000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st7 0000000000000000000000000010000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st7\" uses code string \"0000000000000000000000000010000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st8 0000000000000000000000000100000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st8\" uses code string \"0000000000000000000000000100000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st9 0000000000000000000000001000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st9\" uses code string \"0000000000000000000000001000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st10 0000000000000000000000010000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st10\" uses code string \"0000000000000000000000010000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st11 0000000000000000000000100000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st11\" uses code string \"0000000000000000000000100000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st12 0000000000000000000001000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st12\" uses code string \"0000000000000000000001000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st13 0000000000000000000010000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st13\" uses code string \"0000000000000000000010000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st14 0000000000000000000100000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st14\" uses code string \"0000000000000000000100000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st15 0000000000000000001000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st15\" uses code string \"0000000000000000001000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st16 0000000000000000010000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st16\" uses code string \"0000000000000000010000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st17 0000000000000000100000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st17\" uses code string \"0000000000000000100000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st18 0000000000000001000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st18\" uses code string \"0000000000000001000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st19 0000000000000010000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st19\" uses code string \"0000000000000010000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st20 0000000000000100000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st20\" uses code string \"0000000000000100000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st21 0000000000001000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st21\" uses code string \"0000000000001000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st22 0000000000010000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st22\" uses code string \"0000000000010000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st23 0000000000100000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st23\" uses code string \"0000000000100000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st24 0000000001000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st24\" uses code string \"0000000001000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st25 0000000010000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st25\" uses code string \"0000000010000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st26 0000000100000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st26\" uses code string \"0000000100000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st27 0000001000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st27\" uses code string \"0000001000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st28 0000010000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st28\" uses code string \"0000010000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st29 0000100000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st29\" uses code string \"0000100000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st30 0001000000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st30\" uses code string \"0001000000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st31 0010000000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st31\" uses code string \"0010000000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st32 0100000000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st32\" uses code string \"0100000000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|hw2\|bm2:inst\|next_state.st33 1000000000000000000000000000000001 " "Info: State \"\|hw2\|bm2:inst\|next_state.st33\" uses code string \"1000000000000000000000000000000001\"" {  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "bm2.vhd" "" { Text "E:/altera/work/hw2/bm2.vhd" 12 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "266 " "Info: Implemented 266 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "1 " "Info: Implemented 1 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "263 " "Info: Implemented 263 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 4 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Mar 26 12:57:50 2009 " "Info: Processing ended: Thu Mar 26 12:57:50 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Info: Elapsed time: 00:00:11" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}