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📄 bm2.vhd

📁 用NEC编码方式写的红外发送程序,包括三个部分,分频,编码,编码输出
💻 VHD
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library ieee;                   --38KHz
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity bm2 is
port(clk,key_en:in std_logic;
     clk_out,clk_temp:out std_logic);
end;
architecture one of bm2 is
   type states is (st0,st1,st2,st3,st4,st5,st6,st7,st8,st9,st10,st11,st12,st13,
                   st14,st15,st16,st17,st18,st19,st20,st21,st22,st23,st24,st25,st26,
                   st27,st28,st29,st30,st31,st32,st33);
   signal current_state,next_state:states:=st0;
   signal cnt1:std_logic_vector(6 downto 0);
   signal cnt2:std_logic_vector(6 downto 0);
   signal cnt3:std_logic_vector(8 downto 0);
   signal cnt4:std_logic_vector(8 downto 0);
   constant f1:integer:=21;
   constant f2:integer:=64;
   constant f3:integer:=342;
   constant f4:integer:=171;
  

   begin
   clk_temp<=clk;
   process(clk,current_state)
   begin
      if clk'event and clk='1' then
        case current_state is
        when st0=>
                  if cnt3=f3 then               --9ms
                     cnt3<="000000000";
                      next_state<=st1;
                  else
                     cnt3<=cnt3+1;
                     clk_out<='1';
                  end if;
                  
         when st1=>
                   if cnt4=f4 then              --4.5ms
                     cnt4<="000000000";
                     next_state<=st2;
                  else
                     cnt4<=cnt4+1;
                     clk_out<='0';
                  end if;
                  
         when st2=>
                   if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st3;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                 
         when st3=>
                   if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st4;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st4=>
                   if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st5;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st5=>
                   if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st6;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st6=>
                   if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st7;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st7=>
                   if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st8;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st8=>
                   if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st9;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st9=>
                   if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st10;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st10=>
                    if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st11;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st11=>
                    if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st12;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st12=>
                    if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st13;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st13=>
                    if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st14;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st14=>
                    if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st15;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st15=>
                    if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st16;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                 
         when st16=>
                    if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st17;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st17=>
                    if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st18;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st18=>
                    if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st19;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st19=>
                     if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st20;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st20=>
                    if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st21;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                 
         when st21=>
                    if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st22;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                 
         when st22=>
                      if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st23;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st23=>
                    if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st24;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                 
         when st24=>
                    if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st25;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st25=>
                    if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st26;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st26=>
                    if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st27;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st27=>
                    if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st28;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                 
         when st28=>
                    if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st29;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                  
         when st29=>
                    if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st30;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                 
         when st30=>
                    if cnt1=f1 then             --0 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st31;
                  else
                     cnt1<=cnt1+1;
                     clk_out<='1';
                  end if;
                 
         when st31=>
                     if cnt2=f1 then             --0 0.56ms  0
                     cnt2<="0000000";
                     next_state<=st32;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='0';
                  end if;
                  
         when st32=>
                      if cnt1=f1 then             --1 0.56ms clk_temp
                     cnt1<="0000000";
                     next_state<=st33;
                  else
                     cnt1<=cnt1+1;
                     clk_out<=clk;
                  end if;
                 
         when st33=>
                     if cnt2=f2 then             --1 1.68ms 0
                     cnt2<="0000000";
                     next_state<=st10;
                  else
                     cnt2<=cnt2+1;
                     clk_out<='1';
                  end if;
     end case;
end if;
end process;

process(key_en,next_state)
 begin
    if key_en='1' then
        current_state<=next_state;
    end if;
end process;

end ;

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