hw2.tan.rpt

用NEC编码方式写的红外发送程序,包括三个部分,分频,编码,编码输出

; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
    Info: Processing started: Thu Mar 26 12:58:13 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off hw2 -c hw2 --timing_analysis_only
Warning: Timing Analysis is analyzing one or more combinational loops as latches
    Warning: Node "bm2:inst|comb_2172" is a latch
    Warning: Node "bm2:inst|comb_2124" is a latch
    Warning: Node "bm2:inst|comb_2184" is a latch
    Warning: Node "bm2:inst|comb_2160" is a latch
    Warning: Node "bm2:inst|comb_2136" is a latch
    Warning: Node "bm2:inst|comb_2148" is a latch
    Warning: Node "bm2:inst|comb_2196" is a latch
    Warning: Node "bm2:inst|comb_2088" is a latch
    Warning: Node "bm2:inst|comb_2064" is a latch
    Warning: Node "bm2:inst|comb_2052" is a latch
    Warning: Node "bm2:inst|comb_2076" is a latch
    Warning: Node "bm2:inst|comb_2040" is a latch
    Warning: Node "bm2:inst|comb_2100" is a latch
    Warning: Node "bm2:inst|comb_2028" is a latch
    Warning: Node "bm2:inst|comb_2208" is a latch
    Warning: Node "bm2:inst|comb_2202" is a latch
    Warning: Node "bm2:inst|comb_2112" is a latch
    Warning: Node "bm2:inst|comb_2022" is a latch
    Warning: Node "bm2:inst|comb_2058" is a latch
    Warning: Node "bm2:inst|comb_2118" is a latch
    Warning: Node "bm2:inst|comb_2070" is a latch
    Warning: Node "bm2:inst|comb_2094" is a latch
    Warning: Node "bm2:inst|comb_2046" is a latch
    Warning: Node "bm2:inst|comb_2166" is a latch
    Warning: Node "bm2:inst|comb_2142" is a latch
    Warning: Node "bm2:inst|comb_2190" is a latch
    Warning: Node "bm2:inst|comb_2034" is a latch
    Warning: Node "bm2:inst|comb_2106" is a latch
    Warning: Node "bm2:inst|comb_2082" is a latch
    Warning: Node "bm2:inst|comb_2130" is a latch
    Warning: Node "bm2:inst|comb_2178" is a latch
    Warning: Node "bm2:inst|comb_2154" is a latch
    Warning: Node "bm2:inst|comb_2016" is a latch
    Warning: Node "bm2:inst|comb_2010" is a latch
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "clk15" is an undefined clock
    Info: Assuming node "pin233_en" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin.
Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "fenpin:inst1|clk_temp" as buffer
Info: Clock "clk15" has Internal fmax of 149.84 MHz between source register "bm2:inst|cnt2[3]" and destination register "bm2:inst|next_state.st33" (period= 6.674 ns)
    Info: + Longest register to register delay is 6.413 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X38_Y17_N4; Fanout = 3; REG Node = 'bm2:inst|cnt2[3]'
        Info: 2: + IC(1.196 ns) + CELL(0.292 ns) = 1.488 ns; Loc. = LC_X39_Y17_N2; Fanout = 2; COMB Node = 'bm2:inst|Equal3~104'
        Info: 3: + IC(0.458 ns) + CELL(0.292 ns) = 2.238 ns; Loc. = LC_X39_Y17_N1; Fanout = 12; COMB Node = 'bm2:inst|Equal4~89'
        Info: 4: + IC(1.194 ns) + CELL(0.292 ns) = 3.724 ns; Loc. = LC_X43_Y17_N9; Fanout = 13; COMB Node = 'bm2:inst|Selector31~451'
        Info: 5: + IC(0.454 ns) + CELL(0.590 ns) = 4.768 ns; Loc. = LC_X43_Y17_N5; Fanout = 6; COMB Node = 'bm2:inst|Selector15~443'
        Info: 6: + IC(1.167 ns) + CELL(0.478 ns) = 6.413 ns; Loc. = LC_X40_Y17_N2; Fanout = 2; REG Node = 'bm2:inst|next_state.st33'
        Info: Total cell delay = 1.944 ns ( 30.31 % )
        Info: Total interconnect delay = 4.469 ns ( 69.69 % )
    Info: - Smallest clock skew is 0.000 ns
        Info: + Shortest clock path from clock "clk15" to destination register is 7.745 ns
            Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 6; CLK Node = 'clk15'
            Info: 2: + IC(1.031 ns) + CELL(0.935 ns) = 3.435 ns; Loc. = LC_X8_Y13_N4; Fanout = 70; REG Node = 'fenpin:inst1|clk_temp'
            Info: 3: + IC(3.599 ns) + CELL(0.711 ns) = 7.745 ns; Loc. = LC_X40_Y17_N2; Fanout = 2; REG Node = 'bm2:inst|next_state.st33'
            Info: Total cell delay = 3.115 ns ( 40.22 % )
            Info: Total interconnect delay = 4.630 ns ( 59.78 % )
        Info: - Longest clock path from clock "clk15" to source register is 7.745 ns
            Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 6; CLK Node = 'clk15'
            Info: 2: + IC(1.031 ns) + CELL(0.935 ns) = 3.435 ns; Loc. = LC_X8_Y13_N4; Fanout = 70; REG Node = 'fenpin:inst1|clk_temp'
            Info: 3: + IC(3.599 ns) + CELL(0.711 ns) = 7.745 ns; Loc. = LC_X38_Y17_N4; Fanout = 3; REG Node = 'bm2:inst|cnt2[3]'
            Info: Total cell delay = 3.115 ns ( 40.22 % )
            Info: Total interconnect delay = 4.630 ns ( 59.78 % )
    Info: + Micro clock to output delay of source is 0.224 ns
    Info: + Micro setup delay of destination is 0.037 ns
Info: tco from clock "clk15" to destination pin "pin36_zb" through register "bm2:inst|clk_out" is 14.696 ns
    Info: + Longest clock path from clock "clk15" to source register is 7.745 ns
        Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 6; CLK Node = 'clk15'
        Info: 2: + IC(1.031 ns) + CELL(0.935 ns) = 3.435 ns; Loc. = LC_X8_Y13_N4; Fanout = 70; REG N