prev_cmp_full_adder.tan.qmsg

八位全加器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Nov 30 13:08:22 2008 " "Info: Processing started: Sun Nov 30 13:08:22 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off full_adder -c full_adder --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off full_adder -c full_adder --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "OPERATION S\[3\] 15.665 ns Longest " "Info: Longest tpd from source pin \"OPERATION\" to destination pin \"S\[3\]\" is 15.665 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns OPERATION 1 PIN PIN_80 8 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_80; Fanout = 8; PIN Node = 'OPERATION'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { OPERATION } "NODE_NAME" } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 536 -160 8 552 "OPERATION" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.674 ns) + CELL(0.292 ns) 8.441 ns full_adder1:inst4\|inst5~1 2 COMB LC_X1_Y7_N0 2 " "Info: 2: + IC(6.674 ns) + CELL(0.292 ns) = 8.441 ns; Loc. = LC_X1_Y7_N0; Fanout = 2; COMB Node = 'full_adder1:inst4\|inst5~1'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.966 ns" { OPERATION full_adder1:inst4|inst5~1 } "NODE_NAME" } } { "full_adder1.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder1.bdf" { { 304 384 448 352 "inst5" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.114 ns) 9.006 ns full_adder1:inst3\|inst5~1 3 COMB LC_X1_Y7_N5 2 " "Info: 3: + IC(0.451 ns) + CELL(0.114 ns) = 9.006 ns; Loc. = LC_X1_Y7_N5; Fanout = 2; COMB Node = 'full_adder1:inst3\|inst5~1'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.565 ns" { full_adder1:inst4|inst5~1 full_adder1:inst3|inst5~1 } "NODE_NAME" } } { "full_adder1.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder1.bdf" { { 304 384 448 352 "inst5" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.420 ns) + CELL(0.442 ns) 9.868 ns full_adder1:inst2\|inst5~1 4 COMB LC_X1_Y7_N6 2 " "Info: 4: + IC(0.420 ns) + CELL(0.442 ns) = 9.868 ns; Loc. = LC_X1_Y7_N6; Fanout = 2; COMB Node = 'full_adder1:inst2\|inst5~1'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.862 ns" { full_adder1:inst3|inst5~1 full_adder1:inst2|inst5~1 } "NODE_NAME" } } { "full_adder1.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder1.bdf" { { 304 384 448 352 "inst5" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.439 ns) + CELL(0.590 ns) 10.897 ns full_adder1:inst\|inst3~17 5 COMB LC_X1_Y7_N2 1 " "Info: 5: + IC(0.439 ns) + CELL(0.590 ns) = 10.897 ns; Loc. = LC_X1_Y7_N2; Fanout = 1; COMB Node = 'full_adder1:inst\|inst3~17'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.029 ns" { full_adder1:inst2|inst5~1 full_adder1:inst|inst3~17 } "NODE_NAME" } } { "full_adder1.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder1.bdf" { { 208 312 376 256 "inst3" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.660 ns) + CELL(2.108 ns) 15.665 ns S\[3\] 6 PIN PIN_235 0 " "Info: 6: + IC(2.660 ns) + CELL(2.108 ns) = 15.665 ns; Loc. = PIN_235; Fanout = 0; PIN Node = 'S\[3\]'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "4.768 ns" { full_adder1:inst|inst3~17 S[3] } "NODE_NAME" } } { "full_adder.bdf" "" { Schematic "E:/学习/数电实验/full_adder/full_adder.bdf" { { 440 544 720 456 "S\[3..0\]" "" } { 48 352 480 64 "S\[3\]" "" } { 176 352 480 192 "S\[2\]" "" } { 304 352 480 320 "S\[1\]" "" } { 432 352 480 448 "S\[0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.021 ns ( 32.05 % ) " "Info: Total cell delay = 5.021 ns ( 32.05 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.644 ns ( 67.95 % ) " "Info: Total interconnect delay = 10.644 ns ( 67.95 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "15.665 ns" { OPERATION full_adder1:inst4|inst5~1 full_adder1:inst3|inst5~1 full_adder1:inst2|inst5~1 full_adder1:inst|inst3~17 S[3] } "NODE_NAME" } } { "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "15.665 ns" { OPERATION {} OPERATION~out0 {} full_adder1:inst4|inst5~1 {} full_adder1:inst3|inst5~1 {} full_adder1:inst2|inst5~1 {} full_adder1:inst|inst3~17 {} S[3] {} } { 0.000ns 0.000ns 6.674ns 0.451ns 0.420ns 0.439ns 2.660ns } { 0.000ns 1.475ns 0.292ns 0.114ns 0.442ns 0.590ns 2.108ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "120 " "Info: Peak virtual memory: 120 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Nov 30 13:08:23 2008 " "Info: Processing ended: Sun Nov 30 13:08:23 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}