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📄 startup.lst

📁 uCos-ii 2.86 在C8051F410单片机上移植成功!!! 其中包括:UART驱动
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A51 MACRO ASSEMBLER  STARTUP                                                              03/26/2009 14:21:44 PAGE     1


MACRO ASSEMBLER A51 V8.01
OBJECT MODULE PLACED IN .\out-files\STARTUP.obj
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE keil c51 port\STARTUP.A51 SET(LARGE) DEBUG PRINT(.\list-files\STARTUP.lst)
                       OBJECT(.\out-files\STARTUP.obj) EP

LOC  OBJ            LINE     SOURCE

                       1     $nomod51 
                       2     
  00AA                 3     EMI0CN   DATA 0AAH
                       4     
                       5     ;------------------------------------------------------------------------------
                       6     ;  This file is part of the C51 Compiler package
                       7     ;  Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
                       8     ;------------------------------------------------------------------------------
                       9     ;  STARTUP.A51:  This code is executed after processor reset.
                      10     ;
                      11     ;  To translate this file use A51 with the following invocation:
                      12     ;
                      13     ;     A51 STARTUP.A51
                      14     ;
                      15     ;  To link the modified STARTUP.OBJ file to your application use the following
                      16     ;  BL51 invocation:
                      17     ;
                      18     ;     BL51 <your object file list>, STARTUP.OBJ <controls>
                      19     ;
                      20     ;------------------------------------------------------------------------------
                      21     ;
                      22     ;  User-defined Power-On Initialization of Memory
                      23     ;
                      24     ;  With the following EQU statements the initialization of memory
                      25     ;  at processor reset can be defined:
                      26     ;
                      27     ;               ; the absolute start-address of IDATA memory is always 0
  0100                28     IDATALEN        EQU     100H     ; the length of IDATA memory in bytes.
                      29     ;
  0000                30     XDATASTART      EQU     0H      ; the absolute start-address of XDATA memory
  0800                31     XDATALEN        EQU     800H   ;0EFFFH;the length of XDATA memory in bytes.
                      32     ;
  0000                33     PDATASTART      EQU     0H      ; the absolute start-address of PDATA memory
  0000                34     PDATALEN        EQU     0H      ; the length of PDATA memory in bytes.
                      35     ;
                      36     ;  Notes:  The IDATA space overlaps physically the DATA and BIT areas of the
                      37     ;          8051 CPU. At minimum the memory space occupied from the C51 
                      38     ;          run-time routines must be set to zero.
                      39     ;------------------------------------------------------------------------------
                      40     ;
                      41     ;  Reentrant Stack Initilization
                      42     ;
                      43     ;  The following EQU statements define the stack pointer for reentrant
                      44     ;  functions and initialized it:
                      45     ;
                      46     ;  Stack Space for reentrant functions in the SMALL model.
  0000                47     IBPSTACK        EQU     0       ; set to 1 if small reentrant is used.
  0100                48     IBPSTACKTOP     EQU     0FFH+1  ; set top of stack to highest location+1.
                      49     ;
                      50     ;  Stack Space for reentrant functions in the LARGE model.      
  0001                51     XBPSTACK        EQU     1       ; set to 1 if large reentrant is used.
  0800                52     XBPSTACKTOP     EQU     07ffH+1;0FFFFH+1; set top of stack to highest location+1.
                      53     ;LEON.Z MODIFIED THE ABOVE 2 LINES, 2003.1.20.
                      54     ;  Stack Space for reentrant functions in the COMPACT model.    
  0000                55     PBPSTACK        EQU     0       ; set to 1 if compact reentrant is used.
  1000                56     PBPSTACKTOP     EQU     0FFFH+1; set top of stack to highest location+1.
                      57     ;
A51 MACRO ASSEMBLER  STARTUP                                                              03/26/2009 14:21:44 PAGE     2

                      58     ;------------------------------------------------------------------------------
                      59     ;
                      60     ;  Page Definition for Using the Compact Model with 64 KByte xdata RAM
                      61     ;
                      62     ;  The following EQU statements define the xdata page used for pdata
                      63     ;  variables. The EQU PPAGE must conform with the PPAGE control used
                      64     ;  in the linker invocation.
                      65     ;
  0000                66     PPAGEENABLE     EQU     0       ; set to 1 if pdata object are used.
                      67     ;
  0000                68     PPAGE           EQU     0       ; define PPAGE number.
                      69     ;
  00A0                70     PPAGE_SFR       DATA    0A0H    ; SFR that supplies uppermost address byte
                      71     ;               (most 8051 variants use P2 as uppermost address byte)
                      72     ;
                      73     ;------------------------------------------------------------------------------
                      74     
                      75     ; Standard SFR Symbols 
  00E0                76     ACC     DATA    0E0H
  00F0                77     B       DATA    0F0H
  0081                78     SP      DATA    81H
  0082                79     DPL     DATA    82H
  0083                80     DPH     DATA    83H
                      81     
  00D9                82     PCA0MD  DATA    0D9H 
  00FF                83     VDM0CN  DATA    0FFH 
  00EF                84     RSTSRC  DATA    0EFH
                      85     
                      86                     NAME    ?C_STARTUP
                      87     
                      88     
                      89     ?C_C51STARTUP   SEGMENT   CODE
                      90     ?STACK          SEGMENT   IDATA
                      91     
----                  92                     RSEG    ?STACK
0000                  93                     DS      1
                      94     
                      95                     EXTRN CODE (?C_START)
                      96                     PUBLIC  ?C_STARTUP
                      97     
----                  98                     CSEG    AT      0
0000 020000   F       99     ?C_STARTUP:     LJMP    STARTUP1
                     100     
----                 101                     RSEG    ?C_C51STARTUP
                     102     
0000 53D9BF          103     STARTUP1:                         ANL PCA0MD,#0xBF      ;Disable watchdog
                     104     
0003 43FF80          105                     ORL VDM0CN,#0x80        ;Enable VDD monitor
                     106     
0006 7FC8            107                                                                     MOV R7, #0xC8              
                                  ;Delay 5us
0008 DFFE            108     DELAY5US:       DJNZ R7,DELAY5US
                     109     
000A 43EF02          110                                                                     ORL RSTSRC,#0x02        ;Se
                             lect the VDD monitor as a reset source
                     111     
                     112     IF IDATALEN <> 0
000D 78FF            113                     MOV     R0,#IDATALEN - 1
000F E4              114                     CLR     A
0010 F6              115     IDATALOOP:      MOV     @R0,A
0011 D8FD            116                     DJNZ    R0,IDATALOOP
                     117     ENDIF
                     118     
                     119     IF XDATALEN <> 0
0013 900000          120                     MOV     DPTR,#XDATASTART
0016 7F00            121                     MOV     R7,#LOW (XDATALEN)
A51 MACRO ASSEMBLER  STARTUP                                                              03/26/2009 14:21:44 PAGE     3

                     122       IF (LOW (XDATALEN)) <> 0
                                             MOV     R6,#(HIGH (XDATALEN)) +1
                               ELSE
0018 7E08            125                     MOV     R6,#HIGH (XDATALEN)
                     126       ENDIF
001A E4              127                     CLR     A
001B 75AA01          128                                                                     MOV    EMI0CN,#1
001E F0              129     XDATALOOP:      MOVX    @DPTR,A
001F A3              130                     INC     DPTR
0020 DFFC            131                     DJNZ    R7,XDATALOOP
0022 DEFA            132                     DJNZ    R6,XDATALOOP
                     133     ENDIF
                     134     
                     135     IF PPAGEENABLE <> 0
                                             MOV     PPAGE_SFR,#PPAGE
                             ENDIF
                     138     
                     139     IF PDATALEN <> 0
                                             MOV     R0,#LOW (PDATASTART)
                                             MOV     R7,#LOW (PDATALEN)
                                             CLR     A
                             PDATALOOP:      MOVX    @R0,A
                                             INC     R0
                                             DJNZ    R7,PDATALOOP
                             ENDIF
                     147     
                     148     IF IBPSTACK <> 0
                             EXTRN DATA (?C_IBP)
                             
                                             MOV     ?C_IBP,#LOW IBPSTACKTOP
                             ENDIF
                     153     
                     154     IF XBPSTACK <> 0
                     155     EXTRN DATA (?C_XBP)
                     156     
0024 750008   F      157                     MOV     ?C_XBP,#HIGH XBPSTACKTOP
0027 750000   F      158                     MOV     ?C_XBP+1,#LOW XBPSTACKTOP
                     159     ENDIF
                     160     
                     161     IF PBPSTACK <> 0
                             EXTRN DATA (?C_PBP)
                                             MOV     ?C_PBP,#LOW PBPSTACKTOP
                             ENDIF
                     165     
002A 758100   F      166                     MOV     SP,#?STACK-1
                     167     ; This code is required if you use L51_BANK.A51 with Banking Mode 4
                     168     ; EXTRN CODE (?B_SWITCH0)
                     169     ;               CALL    ?B_SWITCH0      ; init bank mechanism to code bank 0
002D 020000   F      170                     LJMP    ?C_START
                     171     
                     172                     END
A51 MACRO ASSEMBLER  STARTUP                                                              03/26/2009 14:21:44 PAGE     4

SYMBOL TABLE LISTING
------ ----- -------


N A M E             T Y P E  V A L U E   ATTRIBUTES

?C_C51STARTUP. . .  C SEG    0030H       REL=UNIT
?C_START . . . . .  C ADDR   -----       EXT
?C_STARTUP . . . .  C ADDR   0000H   A   
?C_XBP . . . . . .  D ADDR   -----       EXT
?STACK . . . . . .  I SEG    0001H       REL=UNIT
ACC. . . . . . . .  D ADDR   00E0H   A   
B. . . . . . . . .  D ADDR   00F0H   A   
DELAY5US . . . . .  C ADDR   0008H   R   SEG=?C_C51STARTUP
DPH. . . . . . . .  D ADDR   0083H   A   
DPL. . . . . . . .  D ADDR   0082H   A   
EMI0CN . . . . . .  D ADDR   00AAH   A   
IBPSTACK . . . . .  N NUMB   0000H   A   
IBPSTACKTOP. . . .  N NUMB   0100H   A   
IDATALEN . . . . .  N NUMB   0100H   A   
IDATALOOP. . . . .  C ADDR   0010H   R   SEG=?C_C51STARTUP
PBPSTACK . . . . .  N NUMB   0000H   A   
PBPSTACKTOP. . . .  N NUMB   1000H   A   
PCA0MD . . . . . .  D ADDR   00D9H   A   
PDATALEN . . . . .  N NUMB   0000H   A   
PDATASTART . . . .  N NUMB   0000H   A   
PPAGE. . . . . . .  N NUMB   0000H   A   
PPAGEENABLE. . . .  N NUMB   0000H   A   
PPAGE_SFR. . . . .  D ADDR   00A0H   A   
RSTSRC . . . . . .  D ADDR   00EFH   A   
SP . . . . . . . .  D ADDR   0081H   A   
STARTUP1 . . . . .  C ADDR   0000H   R   SEG=?C_C51STARTUP
VDM0CN . . . . . .  D ADDR   00FFH   A   
XBPSTACK . . . . .  N NUMB   0001H   A   
XBPSTACKTOP. . . .  N NUMB   0800H   A   
XDATALEN . . . . .  N NUMB   0800H   A   
XDATALOOP. . . . .  C ADDR   001EH   R   SEG=?C_C51STARTUP
XDATASTART . . . .  N NUMB   0000H   A   


REGISTER BANK(S) USED: 0 

ASSEMBLY COMPLETE.  0 WARNING(S), 0 ERROR(S)

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