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📄 pdc.h

📁 嵌入式系统设计与实例开发源码
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	unsigned long min_size;	unsigned long max_size;	unsigned long pad[32-2];} __attribute__((aligned(8))) ;struct pdc_system_map { /* PDC_SYTEM_MAP/FIND_MODULE */	void * mod_addr;	unsigned long mod_pgs;	unsigned long add_addrs;	unsigned long filler[29];} __attribute__((aligned(8))) ;/* * Device path specifications used by PDC. */struct pdc_module_path {	char  flags;	/* see bit definitions below */	char  bc[6];	/* Bus Converter routing info to a specific */			/* I/O adaptor (< 0 means none, > 63 resvd) */	char  mod;	/* fixed field of specified module */	unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */} __attribute__((aligned(8))) ;#ifndef __LP64__/* Probably needs 64-bit porting -PB */struct pdc_memory_map {	/* PDC_MEMORY_MAP */	unsigned int hpa;	/* mod's register set address */	unsigned int more_pgs;	/* number of additional I/O pgs */} __attribute__((aligned(8))) ;struct pdc_lan_station_id {	/* PDC_LAN_STATION_ID */	unsigned char addr[PDC_LAN_STATION_ID_SIZE];	unsigned char pad0[2];	int pad1[30];};#endifstruct pdc_tod {	unsigned long tod_sec; 	unsigned long tod_usec;	long pad[30];} __attribute__((aligned(8))) ;/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */struct pdc_hpmc_pim_11 { /* PDC_PIM */	__u32 gr[32];	__u32 cr[32];	__u32 sr[8];	__u32 iasq_back;	__u32 iaoq_back;	__u32 check_type;	__u32 cpu_state;	__u32 rsvd1;	__u32 cache_check;	__u32 tlb_check;	__u32 bus_check;	__u32 assists_check;	__u32 rsvd2;	__u32 assist_state;	__u32 responder_addr;	__u32 requestor_addr;	__u32 path_info;	__u64 fr[32];};/* * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine * * Note that PDC_PIM doesn't care whether or not wide mode was enabled * so the results are different on  PA1.1 vs. PA2.0 when in narrow mode. * * Note also that there are unarchitected results available, which * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since * the firmware is probably the best way of printing hversion dependent * data. */struct pdc_hpmc_pim_20 { /* PDC_PIM */	__u64 gr[32];	__u64 cr[32];	__u64 sr[8];	__u64 iasq_back;	__u64 iaoq_back;	__u32 check_type;	__u32 cpu_state;	__u32 cache_check;	__u32 tlb_check;	__u32 bus_check;	__u32 assists_check;	__u32 assist_state;	__u32 path_info;	__u64 responder_addr;	__u64 requestor_addr;	__u64 fr[32];};#endif /* __ASSEMBLY__ *//* flags of the device_path (see below) */#define	PF_AUTOBOOT	0x80#define	PF_AUTOSEARCH	0x40#define	PF_TIMER	0x0F#ifndef __ASSEMBLY__struct device_path {		/* page 1-69 */	unsigned char flags;	/* flags see above! */	unsigned char bc[6];	/* bus converter routing info */	unsigned char mod;	unsigned int  layers[6];/* device-specific layer-info */} __attribute__((aligned(8))) ;struct pz_device {	struct	device_path dp;	/* see above */	/* struct	iomod *hpa; */	unsigned int hpa;	/* HPA base address */	/* char	*spa; */	unsigned int spa;	/* SPA base address */	/* int	(*iodc_io)(struct iomod*, ...); */	unsigned int iodc_io;	/* device entry point */	short	pad;		/* reserved */	unsigned short cl_class;/* see below */} __attribute__((aligned(8))) ;#endif /* __ASSEMBLY__ *//* cl_class * page 3-33 of IO-Firmware ARS * IODC ENTRY_INIT(Search first) RET[1] */#define	CL_NULL		0	/* invalid */#define	CL_RANDOM	1	/* random access (as disk) */#define	CL_SEQU		2	/* sequential access (as tape) */#define	CL_DUPLEX	7	/* full-duplex point-to-point (RS-232, Net) */#define	CL_KEYBD	8	/* half-duplex console (HIL Keyboard) */#define	CL_DISPL	9	/* half-duplex console (display) */#define	CL_FC		10	/* FiberChannel access media */#if 0/* FIXME: DEVCLASS_* duplicates CL_* (above).  Delete DEVCLASS_*? */#define DEVCLASS_RANDOM		1#define DEVCLASS_SEQU		2#define DEVCLASS_DUPLEX		7#define DEVCLASS_KEYBD		8#define DEVCLASS_DISP		9#endif/* IODC ENTRY_INIT() */#define ENTRY_INIT_SRCH_FRST	2#define ENTRY_INIT_SRCH_NEXT	3#define ENTRY_INIT_MOD_DEV	4#define ENTRY_INIT_DEV		5#define ENTRY_INIT_MOD		6#define ENTRY_INIT_MSG		9/* IODC ENTRY_IO() */#define ENTRY_IO_BOOTIN		0#define ENTRY_IO_CIN		2#define ENTRY_IO_COUT		3#define ENTRY_IO_CLOSE		4#define ENTRY_IO_GETMSG		9/* IODC ENTRY_SPA() *//* IODC ENTRY_CONFIG() *//* IODC ENTRY_TEST() *//* IODC ENTRY_TLB() *//* DEFINITION OF THE ZERO-PAGE (PAG0) *//* based on work by Jason Eckhardt (jason@equator.com) */#ifndef __ASSEMBLY__#define	PAGE0	((struct zeropage *)0xc0000000)struct zeropage {	/* [0x000] initialize vectors (VEC) */	unsigned int	vec_special;		/* must be zero */	/* int	(*vec_pow_fail)(void);*/	unsigned int	vec_pow_fail; /* power failure handler */	/* int	(*vec_toc)(void); */	unsigned int	vec_toc;	unsigned int	vec_toclen;	/* int	(*vec_rendz)(void); */	unsigned int vec_rendz;	int	vec_pow_fail_flen;	int	vec_pad[10];				/* [0x040] reserved processor dependent */	int	pad0[112];	/* [0x200] reserved */	int	pad1[84];	/* [0x350] memory configuration (MC) */	int	memc_cont;		/* contiguous mem size (bytes) */	int	memc_phsize;		/* physical memory size */	int	memc_adsize;		/* additional mem size, bytes of SPA space used by PDC */	unsigned int mem_pdc_hi;	/* used for 64-bit */	/* [0x360] various parameters for the boot-CPU */	/* unsigned int *mem_booterr[8]; */	unsigned int mem_booterr[8];	/* ptr to boot errors */	unsigned int mem_free;		/* first location, where OS can be loaded */	/* struct iomod *mem_hpa; */	unsigned int mem_hpa;		/* HPA of the boot-CPU */	/* int (*mem_pdc)(int, ...); */	unsigned int mem_pdc;		/* PDC entry point */	unsigned int mem_10msec;	/* number of clock ticks in 10msec */	/* [0x390] initial memory module (IMM) */	/* struct iomod *imm_hpa; */	unsigned int imm_hpa;		/* HPA of the IMM */	int	imm_soft_boot;		/* 0 = was hard boot, 1 = was soft boot */	unsigned int	imm_spa_size;		/* SPA size of the IMM in bytes */	unsigned int	imm_max_mem;		/* bytes of mem in IMM */	/* [0x3A0] boot console, display device and keyboard */	struct pz_device mem_cons;	/* description of console device */	struct pz_device mem_boot;	/* description of boot device */	struct pz_device mem_kbd;	/* description of keyboard device */	/* [0x430] reserved */	int	pad430[116];	/* [0x600] processor dependent */	__u32	pad600[1];	__u32	proc_sti;		/* pointer to STI ROM */	__u32	pad608[126];};#endif /* __ASSEMBLY__ *//* Page Zero constant offsets used by the HPMC handler */#define BOOT_CONSOLE_HPA_OFFSET  0x3c0#define BOOT_CONSOLE_SPA_OFFSET  0x3c4#define BOOT_CONSOLE_PATH_OFFSET 0x3a8#ifndef __ASSEMBLY__struct pdc_pat_io_num {	unsigned long num;	unsigned long reserved[31];};extern void pdc_console_init(void);extern int  pdc_getc(void);	/* wait for char */extern void pdc_putc(unsigned char);	/* print char *//* wrapper-functions from pdc.c */int pdc_add_valid(void *address);int pdc_hpa_processor(void *address);#if 0int pdc_hpa_modules(void *address);#endifint pdc_iodc_read(void *address, void *hpa, unsigned int index,		  void *iodc_data, unsigned int iodc_data_size);int pdc_system_map_find_mods(void *pdc_mod_info, void *mod_path, int index);int pdc_model_info(struct pdc_model *model);int pdc_model_sysmodel(char  *name);int pdc_model_cpuid(struct pdc_model_cpuid *cpu_id);int pdc_model_versions(struct pdc_model_cpuid *cpu_id, int id);int pdc_cache_info(struct pdc_cache_info *cache);#ifndef __LP64__int pdc_btlb_info( struct pdc_btlb_info *btlb);int pdc_lan_station_id( char *lan_addr, void *net_hpa);#endifint pdc_mem_map_hpa(void *r_addr, void *mod_path);extern int pdc_chassis_disp(unsigned long disp);extern int pdc_chassis_info(void *pdc_result, void *chassis_info, unsigned long len);#ifdef __LP64__int pdc_pat_get_irt_size(void *r_addr, unsigned long cell_num);int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);#else/* No PAT support for 32-bit kernels...sorry */#define pdc_pat_get_irt_size(r_addr, cell_numn)	PDC_RET_NE_PROC#define pdc_pat_get_irt(r_addr, cell_num)	PDC_RET_NE_PROC#endifint pdc_pci_irt_size(void *r_addr, void *hpa);int pdc_pci_irt(void *r_addr, void *hpa, void *tbl);int pdc_tod_read(struct pdc_tod *tod);int pdc_tod_set(unsigned long sec, unsigned long usec);/* on all currently-supported platforms, IODC I/O calls are always * 32-bit calls, and MEM_PDC calls are always the same width as the OS. * This means Cxxx boxes can't run wide kernels right now. -PB * * Note that some PAT boxes may have 64-bit IODC I/O... */#ifdef __LP64__#   define mem_pdc_call(args...) real64_call(0L, ##args)#else#   define mem_pdc_call(args...) real32_call(0L, ##args)#endif/* yes 'int', not 'long' -- IODC I/O is always 32-bit stuff */extern long real64_call(unsigned long function, ...);extern long real32_call(unsigned long function, ...);extern void pdc_init(void);#endif /* __ASSEMBLY__ */#endif /* _PARISC_PDC_H */

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