68hc11.h

USB9602 source code for C 8051

#ifndef __HC11_H
#define __HC11_H        1

/* base address of register block, change this if you relocate the register
 * block. This is from an A8. May need to be changed for other HC11 members
 * or if you relocate the IO base address.
 */

#define _IO_BASE        0x1000
#define PORTA   *(unsigned char  volatile *)(_IO_BASE + 0x00)
#define PIOC    *(unsigned char  volatile *)(_IO_BASE + 0x02)
#define PORTC   *(unsigned char  volatile *)(_IO_BASE + 0x03)
#define PORTB   *(unsigned char  volatile *)(_IO_BASE + 0x04)
#define PORTCL  *(unsigned char  volatile *)(_IO_BASE + 0x05)
#define DDRC    *(unsigned char  volatile *)(_IO_BASE + 0x07)
#define PORTD   *(unsigned char  volatile *)(_IO_BASE + 0x08)
#define DDRD    *(unsigned char  volatile *)(_IO_BASE + 0x09)
#define PORTE   *(unsigned char  volatile *)(_IO_BASE + 0x0A)
#define CFORC   *(unsigned char  volatile *)(_IO_BASE + 0x0B)
#define OC1M    *(unsigned char  volatile *)(_IO_BASE + 0x0C)
#define OC1D    *(unsigned char  volatile *)(_IO_BASE + 0x0D)
#define TCNT    *(unsigned short volatile *)(_IO_BASE + 0x0E)
#define TIC1    *(unsigned short volatile *)(_IO_BASE + 0x10)
#define TIC2    *(unsigned short volatile *)(_IO_BASE + 0x12)
#define TIC3    *(unsigned short volatile *)(_IO_BASE + 0x14)
#define TOC1    *(unsigned short volatile *)(_IO_BASE + 0x16)
#define TOC2    *(unsigned short volatile *)(_IO_BASE + 0x18)
#define TOC3    *(unsigned short volatile *)(_IO_BASE + 0x1A)
#define TOC4    *(unsigned short volatile *)(_IO_BASE + 0x1C)
#define TOC5    *(unsigned short volatile *)(_IO_BASE + 0x1E)
#define TCTL1   *(unsigned char  volatile *)(_IO_BASE + 0x20)
#define TCTL2   *(unsigned char  volatile *)(_IO_BASE + 0x21)
#define TMSK1   *(unsigned char  volatile *)(_IO_BASE + 0x22)
#define TFLG1   *(unsigned char  volatile *)(_IO_BASE + 0x23)
#define TMSK2   *(unsigned char  volatile *)(_IO_BASE + 0x24)
#define TFLG2   *(unsigned char  volatile *)(_IO_BASE + 0x25)
#define PACTL   *(unsigned char  volatile *)(_IO_BASE + 0x26)
#define PACNT   *(unsigned char  volatile *)(_IO_BASE + 0x27)
#define SPCR    *(unsigned char  volatile *)(_IO_BASE + 0x28)
#define SPSR    *(unsigned char  volatile *)(_IO_BASE + 0x29)
#define SPDR    *(unsigned char  volatile *)(_IO_BASE + 0x2A)
#define BAUD    *(unsigned char  volatile *)(_IO_BASE + 0x2B)
#define SCCR1   *(unsigned char  volatile *)(_IO_BASE + 0x2C)
#define SCCR2   *(unsigned char  volatile *)(_IO_BASE + 0x2D)
#define SCSR    *(unsigned char  volatile *)(_IO_BASE + 0x2E)
#define SCDR    *(unsigned char  volatile *)(_IO_BASE + 0x2F)
#define ADCTL   *(unsigned char  volatile *)(_IO_BASE + 0x30)
#define ADR1    *(unsigned char  volatile *)(_IO_BASE + 0x31)
#define ADR2    *(unsigned char  volatile *)(_IO_BASE + 0x32)
#define ADR3    *(unsigned char  volatile *)(_IO_BASE + 0x33)
#define ADR4    *(unsigned char  volatile *)(_IO_BASE + 0x34)
#define OPTION  *(unsigned char  volatile *)(_IO_BASE + 0x39)
#define COPRST  *(unsigned char  volatile *)(_IO_BASE + 0x3A)
#define PPROG   *(unsigned char  volatile *)(_IO_BASE + 0x3B)
#define HPRIO   *(unsigned char  volatile *)(_IO_BASE + 0x3C)
#define INIT    *(unsigned char  volatile *)(_IO_BASE + 0x3D)
#define TEST1   *(unsigned char  volatile *)(_IO_BASE + 0x3E)
#define CONFIG  *(unsigned char  volatile *)(_IO_BASE + 0x3F)

/* base address of EEPROM block */
#define _EE_BASE        0xB600

/* These values are for a 8Mhz clock
 * 0x3? set the SCP1|SCP0 to 0x3
 */
typedef enum {
        BAUD9600 = 0x30, BAUD4800 = 0x31, BAUD2400 = 0x32,
        BAUD1200 = 0x33, BAUD600 = 0x34, BAUD300 = 0x35
        } BaudRate;

/* ADCTL bits */
#define CCF     BIT(7)
#define SCAN    BIT(5)
#define MULT    BIT(4)
#define CD      BIT(3)
#define CC      BIT(2)
#define CB      BIT(1)
#define CA      BIT(0)

/* OPTION bits */
#define ADPU    BIT(7)
#define CSEL    BIT(6)
#define IRQE    BIT(5)
#define DLY     BIT(4)
#define CME     BIT(3)
#define CR1     BIT(1)
#define CR0     BIT(0)

/* PPROG bits */
#define P_BYTE  BIT(4)
#define P_ROW   BIT(3)
#define P_ERASE BIT(2)
#define EELAT   BIT(1)
#define EEPGM   BIT(0)

/* TMSK1, TFLG1 bits */
#define OC1     BIT(7)
#define OC2     BIT(6)
#define OC3     BIT(5)
#define OC4     BIT(4)
#define OC5     BIT(3)
#define IC1     BIT(2)
#define IC2     BIT(1)
#define IC3     BIT(0)

/* TCTL1 bits */
#define OM2     BIT(7)
#define OL2     BIT(6)
#define OM3     BIT(5)
#define OL3     BIT(4)
#define OM4     BIT(3)
#define OL4     BIT(2)
#define OM5     BIT(1)
#define OL5     BIT(0)

/* SCSR bits */
#define TDRE    BIT(7)
#define TC      BIT(6)
#define RDRF    BIT(5)
#define IDLE    BIT(4)
#define OR      BIT(3)
#define NF      BIT(2)
#define FE      BIT(1)

/* SCCR1 bits */
#define R8      BIT(7)
#define T8      BIT(6)
#define M_BIT   BIT(4)
#define WAKE    BIT(3)

/* SCCR2 bits */
#define TIE     BIT(7)
#define TCIE    BIT(6)
#define RIE     BIT(5)
#define ILIE    BIT(4)
#define TE      BIT(3)
#define RE      BIT(2)
#define RWU     BIT(1)
#define SBK     BIT(0)

/* SPCR bits */
#define SPIE    BIT(7)
#define SPE     BIT(6)
#define DWOM    BIT(5)
#define MSTR    BIT(4)
#define CPOL    BIT(3)
#define CPHA    BIT(2)
#define SPR1    BIT(1)
#define SPR0    BIT(0)

/* SPSR bits */
#define SPIF    BIT(7)
#define WCOL    BIT(6)
#define MODF    BIT(4)

#ifdef _EEPROM
/* EEPROM */
#define EEPGM   BIT(0)
#define EELAT   BIT(1)
#endif

/* INTERRUPT VECTOR EQUATES (For Buffalo Monitor)                     */
#define SCI_VECT         0xC4      /* SCI INTERFACE                   */
#define SPI_VECT         0xC7      /* SPI INTERFACE                   */
#define PLS_ACCU         0xCA      /* PULSE ACCUMULATOR INPUT EDGE    */
#define PLS_OVFL         0xCD      /* PULSE ACCUMULATOR OVERFLOW      */
#define TMR_OVFL         0xD0      /* TIMER OVERFLOW                  */
#define TO_CMP_5         0xD3      /* TIMER OUTPUT COMPARE 5          */
#define TO_CMP_4         0xD6      /* TIMER OUTPUT COMPARE 4          */
#define TO_CMP_3         0xD9      /* TIMER OUTPUT COMPARE 3          */
#define TO_CMP_2         0xDC      /* TIMER OUTPUT COMPARE 2          */
#define TO_CMP_1         0xDF      /* TIMER OUTPUT COMPARE 1          */
#define TI_CAP_3         0xE2      /* TIMER INPUT  CAPTURE 3          */
#define TI_CAP_2         0xE5      /* TIMER INPUT  CAPTURE 2          */
#define TI_CAP_1         0xE8      /* TIMER INPUT  CAPTURE 1          */
#define RTI_VECT         0xEB      /* REAL TIME INTERRUPT             */
#define IRQ_VECT         0xEE      /* IRQ                             */
#define XIRQVECT         0xF1      /* XIRQ                            */
#define SWI_VECT         0xF4      /* SOFTWARE INTERRUPT              */
#define ILL_OPCD         0xF7      /* ILLEGAL OPCODE                  */
#define COP_VECT         0xFA      /* COMPUTER OPERATING PROPERLY     */
#define CLK_MONT         0xFD      /* CLOCK MONITOR                   */

#endif