📄 usb_9602.c
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case 1:
bitset(EPC1,STALL);
SETBIT(stalld,BIT1);
break;
case 2:
bitset(EPC2,STALL);
SETBIT(stalld,BIT2);
break;
case 3:
bitset(EPC3,STALL);
SETBIT(stalld,BIT3);
break;
case 4:
bitset(EPC4,STALL);
SETBIT(stalld,BIT4);
break;
case 5:
bitset(EPC5,STALL);
SETBIT(stalld,BIT5);
break;
case 6:
bitset(EPC6,STALL);
SETBIT(stalld,BIT6);
break;
default:
break;
}
break;
default: /*UNDEFINED */
break;
}
}
/**********************************************************************/
/* The SET_CONFIGURATION request is done here */
/**********************************************************************/
void setconfiguration(void)
{
usb_cfg = usb_buf[2]; /*set the configuration # */
if (usb_buf[2]!=0) /*set the configuration */
{
dtapid = 0; /*FIRST PID is DATA0 */
stalld = 0; /*nothing stalled */
FLUSHTX1; /*flush TX1 and disable */
write_usb(EPC1,EP_EN+01); /*enable EP1 at adr 1 */
FLUSHRX1; /*flush RX1 and disable */
write_usb(EPC2,EP_EN+02); /*enable EP2 at adr 2 */
write_usb(RXC1,RX_EN); /*enable RX1 */
FLUSHTX3; /*flush TX1 and disable */
write_usb(EPC5,EP_EN+05); /*enable EP5 at adr 5 */
FLUSHRX3; /*flush RX3 and disable */
write_usb(EPC6,EP_EN+06); /*enable EP6 at adr 6 */
write_usb(RXC3,RX_EN); /*enable RX3 */
}
else /*unconfigure the device */
{
write_usb(EPC1,0); /*disable EP1 */
write_usb(EPC2,0); /*disable EP2 */
write_usb(EPC5,0); /*disable EP5 */
write_usb(EPC6,0); /*disable EP6 */
}
}
/**********************************************************************/
/* This subroutine loads a byte from a descriptor or report into the */
/* endpoint 0 fifo. */
/**********************************************************************/
void mlti_pkt(void)
{
unsigned char pckt_dta;
if(desc_sze>0)
{
if(TSTBIT(status,GETDESC))
switch (desc_typ) /*descriptor **************/
{
case DEVICE:
pckt_dta=DEV_DESC[desc_idx];
break;
case CONFIGURATION:
pckt_dta=CFG_DESC[desc_idx];
break;
case XSTRING:
pckt_dta=STR_DATA[desc_idx];
break;
case HID:
pckt_dta=CFG_DESC[desc_idx];
break;
case HIDREPORT:
pckt_dta=ReportDescriptor[desc_idx];
break;
default: /*UNDEFINED */
pckt_dta=0;
break;
}
else
switch (desc_typ) /*report ******************/
{
default: /*UNDEFINED */
pckt_dta=0;
break;
}
write_usb(TXD0,pckt_dta); /*send data to the FIFO */
desc_sze--; /*decriment size */
desc_idx++; /*increment index */
}
}
/**********************************************************************/
/* The CLEAR_FEATURE request is done here */
/**********************************************************************/
void clrfeature(void)
{
switch (usb_buf[0]&0x03) /*find request target */
{
case 0: /*DEVICE */
break;
case 1: /*INTERFACE */
break;
case 2: /*ENDPOINT */
switch (usb_buf[4]&0x0F) /*find specific endpoint */
{ /* (strip off dir. bit) */
case 0:
bitclr(EPC0,STALL);
CLRBIT(stalld,BIT0);
break;
case 1:
bitclr(EPC1,STALL);
CLRBIT(stalld,BIT1);
break;
case 2:
bitclr(EPC2,STALL);
CLRBIT(stalld,BIT2);
break;
case 3:
bitclr(EPC3,STALL);
CLRBIT(stalld,BIT3);
break;
case 4:
bitclr(EPC4,STALL);
CLRBIT(stalld,BIT4);
break;
case 5:
bitclr(EPC5,STALL);
CLRBIT(stalld,BIT5);
break;
case 6:
bitclr(EPC6,STALL);
CLRBIT(stalld,BIT6);
break;
default:
break;
}
break;
default: /*UNDEFINED */
break;
}
}
/**********************************************************************/
/* The GET_DESCRIPTOR request is done here. */
/**********************************************************************/
void getdescriptor(void)
{
SET_GETDESC; /*enter GETDESC mode */
desc_typ = usb_buf[3]; /*store the type requested*/
/*select descriptor size and starting index */
switch (desc_typ)
{
case DEVICE:
desc_idx = 0;
desc_sze = DEV_DESC_SIZE;
break;
case CONFIGURATION:
desc_idx = 0;
desc_sze = CFG_DESC_SIZE;
break;
case XSTRING:
desc_idx = usb_buf[2];
desc_sze = STR_DATA[desc_idx];
break;
case HID:
/*valid if we have only one int: revisit if this changes */
desc_idx = CFG_LENGTH+INT_LENGTH;
desc_sze = CFG_DESC[(CFG_LENGTH+INT_LENGTH)];
break;
case HIDREPORT:
desc_idx = 0;
desc_sze = RPT_DESC_SIZE;
break;
default: /*UNDEFINED */
desc_idx = 0;
desc_sze = 0;
break;
}
/*adjust size, if the host has asked for less than we want to */
/*send. Note that we only check the low order byte of the */
/*wlength field. If we ever need to send back descriptors */
/*longer than 256 bytes, we'll need to revisit this */
if (usb_buf[7]==0) /*if less than 256 req'd */
if (desc_sze > usb_buf[6]) desc_sze = usb_buf[6];
/*send the first data chunk back */
mlti_pkt(); mlti_pkt(); mlti_pkt(); mlti_pkt();
mlti_pkt(); mlti_pkt(); mlti_pkt(); mlti_pkt();
}
/**********************************************************************/
/* The GET_STATUS request is done here */
/**********************************************************************/
void getstatus(void)
{
switch (usb_buf[0]&0x03) /*find request target */
{
case 0: /*DEVICE */
write_usb(TXD0,0); /*first byte is reserved */
break;
case 1: /*INTERFACE */
write_usb(TXD0,0); /*first byte is reserved */
break;
case 2: /*ENDPOINT */
switch (usb_buf[4]&0x0F) /*find specific endpoint */
{ /* (strip off dir. bit) */
case 0: EPSTATUS(BIT0);
case 1: EPSTATUS(BIT1);
case 2: EPSTATUS(BIT2);
case 3: EPSTATUS(BIT3);
case 4: EPSTATUS(BIT4);
case 5: EPSTATUS(BIT5);
case 6: EPSTATUS(BIT6);
default:
break;
}
break;
default: /*UNDEFINED */
write_usb(TXD0,0); /*first byte is reserved */
break;
}
write_usb(TXD0,0); /*second byte is reserved */
}
/******************************************************************************/
void init_usb(void)
{
// IT1=1;
// EX1=1; /* Enable Int 1 */
CountInt=5;
/*toss out any previous state ***********************************/
status = 0; /* clear status bits */
usb_cfg = 0;
/*give a soft reset, then set ints to push pull, active hi or lo*/
write_usb(MCNTRL,SRST);
write_usb(MCNTRL,VREG_ST+INTR_TYPE);
/*initialize the clock generator ********************************/
/* prior to this point, the clock output will be 4 Mhz. After, */
/* it will be (48 MHz/CLKDIV) */
//write_usb(CCONF,CODIS+CLKDIV-1); /*disable clock output */
write_usb(CCONF,CLKDIV-1); /*set clock freq */
/*set default address, enable EP0 only **************************/
write_usb(FAR,AD_EN+0); write_usb(EPC0, 0x00);
/*set up interrupt masks ****************************************/
write_usb(NAKMSK,NAK_O0+NAK_I3); /*NAK evnts*/
write_usb(TXMSK,TXFIFO0+TXFIFO1+TXFIFO3); /*TX events*/
write_usb(RXMSK,RXFIFO0+RXFIFO1+RXFIFO3); /*RX events*/
write_usb(ALTMSK,NORMAL_ALTMSK); /*ALT evnts*/
write_usb(MAMSK,(INTR_E+RX_EV+NAK+TX_EV+ALT));
PoleCh[++PointCh]=read_usb(MAMSK);
PoleCh[++PointCh]=read_usb(MAEV);
/*enable the receiver and go operational ************************/
FLUSHTX0; /*flush TX0 and disable */
PoleCh[++PointCh]=read_usb(MAMSK);
PoleCh[++PointCh]=read_usb(MAEV);
write_usb(RXC0,RX_EN); /*enable the receiver */
PoleCh[++PointCh]=read_usb(MAMSK);
PoleCh[++PointCh]=read_usb(MAEV);
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