usb_9602.bak

USB9602 source code for C 8051

  rxstat=read_usb(RXS1);              /*get receiver status     */

  if(rxstat & SETUP_R) { }
  else if (rxstat & RX_ERR) { }
  else
   {
          /*check to see if this is a valid command packet **************/
          /*we don't have to worry about the UART receiver stomping on  */
          /*us because it has a lower priority interrupt.  The USB might*/
          /*well stomp the UART's data, but the assumption is that any  */
          /*debug activity on the RS-232 port is stompable              */
    SETBIT(status,USB_CMD);         /*select USB command mode */
    rsnc=read_usb(RXD1);            /*move data from FIFO     */
    rcmd=read_usb(RXD1);
    rdta=read_usb(RXD1);
    radh=read_usb(RXD1);
    radl=read_usb(RXD1);
    rcks=read_usb(RXD1);

    if (rsnc==SYNCBYT)              /*if sync code is valid   */
      if (rcks==(unsigned char)(rsnc+rcmd+rdta+radh+radl))
       {
        FLUSHTX1;                 /*flush TX1 and disable   */
        do_cmd();                 /*do the command          */
        TXEN1_PID_NO_TGL;         /*enable TX, choose PID   */
       }
      CLRBIT(status,USB_CMD);         /*exit USB command mode   */
   }

  FLUSHRX1;                           /*flush RX1 and disable   */
  write_usb(RXC1,RX_EN);              /*re-enable the receiver  */
}

/**********************************************************************/
/* This subroutine handles RX events for FIFO2 (endpoint 4)           */
/**********************************************************************/
void rx_2(void)
{
  rxstat=read_usb(RXS2);              /*get receiver status     */
}

/**********************************************************************/
/* This subroutine handles RX events for FIFO3 (endpoint 6)           */
/**********************************************************************/
void rx_3(void)
{
  rxstat=read_usb(RXS3);              /*get receiver status     */

  if(rxstat & SETUP_R) { }
  else if (rxstat & RX_ERR)
   {
    FLUSHRX3;                       /*flush RX3 and disable   */
   }
  else
   {
    rcount3+=32;                    /*update count            */
   }

  write_usb(RXC3,RX_EN);              /*re-enable the receiver  */
}

/**********************************************************************/
/* This subroutine handles TX events for FIFO0 (endpoint 0)           */
/**********************************************************************/
void tx_0(void)
{
  txstat=read_usb(TXS0);              /*get transmitter status  */

  if(txstat & TX_DONE)                /*if transmit completed   */
   {
    FLUSHTX0;                       /*flush TX0 and disable   */

    if(txstat & ACK_STAT)           /*ACK received: xmit ok   */
     {
              /*if in multi-packet mode, queue next piece if nec.     */
      if(TSTBIT(status,MLTIPKT))
       {
                  /*move the data into the FIFO   */
        mlti_pkt(); mlti_pkt(); mlti_pkt(); mlti_pkt();
        mlti_pkt(); mlti_pkt(); mlti_pkt(); mlti_pkt();
        TXEN0_PID;              /*enable TX, choose PID   */
       }
      else                        /*not in multi-packet mode*/
       {
        if(setaddr)             /*if SET_ADDRESS in progr.*/
         {
          write_usb(FAR,setaddr);  /*load new address  */
          setaddr=0;               /*clear state       */
         }
        write_usb(RXC0,RX_EN);  /*re-enable the receiver  */
       }
     }
    else                            /*no ACK: xmit failed     */
            /*this probably means we issued a stall handshake         */
     {
      CLR_MLTIPKT;                /*exit multi-packet mode  */
      write_usb(RXC0,RX_EN);      /*re-enable the receiver  */
     }
   }

      /*otherwise something must have gone wrong with the previous ****/
      /*transmission, or we got here somehow we shouldn't have ********/
  else                                /*xmit didn't complete??  */
   {
   }

      /*we do this stuff for all tx_0 events **************************/
}

/**********************************************************************/
/* This subroutine handles TX events for FIFO1 (endpoint 1)           */
/**********************************************************************/
void tx_1(void)
{
  txstat=read_usb(TXS1);              /*get transmitter status  */

      /*if a transmission has completed successfully, update the data */
      /*toggle and queue up a dummy packet ****************************/
  if ((txstat & ACK_STAT) && (txstat & TX_DONE))
   {
    TGLBIT(dtapid,TGL1PID);         /*flip the data toggle    */
    FLUSHTX1;                       /*flush the FIFO          */
    write_usb(TXD1,0x0DE);          /*send data to the FIFO   */
    write_usb(TXD1,0x0AD);          /*send data to the FIFO   */
    write_usb(TXD1,0x0BE);          /*send data to the FIFO   */
    write_usb(TXD1,0x0EF);          /*send data to the FIFO   */
    TXEN1_PID_NO_TGL;               /*enable TX, choose PID   */
   }
  else { }
}

/**********************************************************************/
/* This subroutine handles TX events for FIFO2 (endpoint 3)           */
/**********************************************************************/
void tx_2(void)
{
  txstat=read_usb(TXS2);              /*get transmitter status  */
}

/**********************************************************************/
/* This subroutine handles TX events for FIFO3 (endpoint 5)           */
/**********************************************************************/
void tx_3(void)
{
  txstat=read_usb(TXS3);              /*get transmitter status  */

  FLUSHTX3;                           /*flush the FIFO          */

      /*if a transmission has completed successfully, update the data */
      /*toggle and queue up a dummy packet ****************************/
  if ((txstat & ACK_STAT) && (txstat & TX_DONE))
   {
    TGLBIT(dtapid,TGL3PID);         /*flip the data toggle    */
   }
  else { }
}

/**********************************************************************/
/* This subroutine handles OUT NAK events for FIFO0 (endpoint 0)      */
/**********************************************************************/
void onak0(void)
{
      /*important note:  even after servicing a NAK, another NAK      */
      /*interrupt may occur if another 'OUT' or 'IN' packet comes in  */
      /*during our NAK service.                                       */

      /*if we're currently doing something that requires multiple 'IN'*/
      /*transactions, 'OUT' requests will get NAKs because the FIFO is*/
      /*busy with the TX data.  Since the 'OUT' here means a premature*/
      /*end to the previous transfer, just flush the FIFO, disable the*/
      /*transmitter, and re-enable the receiver.                      */
  if (TSTBIT(status,MLTIPKT))           /*multi-pkt status stage? */
   {
    CLR_MLTIPKT;                      /*exit multi-packet mode  */
    FLUSHTX0;                         /*flush TX0 and disable   */
    write_usb(RXC0,RX_EN);            /*re-enable the receiver  */
   }

      /*we do this stuff for all onak0 events **************************/
}

/**********************************************************************/
/* This subroutine handles OUT NAK events for FIFO1 (endpoint 2)      */
/**********************************************************************/
void onak1(void)
{
}

/**********************************************************************/
/* This subroutine handles OUT NAK events for FIFO2 (endpoint 4)      */
/**********************************************************************/
void onak2(void)
{
}

/**********************************************************************/
/* This subroutine handles INP NAK events for FIFO3 (endpoint 5)      */
/**********************************************************************/
void inak3(void)
{
  FLUSHTX3;                           /*flush the FIFO          */
  if(TSTBIT(status,RPTCHNG))          /*if new data to report   */
   {
    queue_rpt(TXD3);                /*queue a report          */
    TXEN3_PID_NO_TGL;               /*enable TX, choose PID   */
   }
}

/**********************************************************************/
/* This is the interrupt service routine for USB operations           */
/**********************************************************************/

void usb_isr(void)   interrupt 2 using 3
{
EX1=0;
PoleCh[++PointCh]=read_usb(MAMSK);
PoleCh[++PointCh]=read_usb(MAEV);

PoleCh[++PointCh]='I';
PoleCh[++PointCh]='n';
PoleCh[++PointCh]='t';
PoleCh[++PointCh]=' ';


  evnt = read_usb(MAEV);            /*check the events        */
  
  if (evnt & RX_EV)
   {
    evnt=read_usb(RXEV);            /*check the RX events     */

PoleCh[++PointCh]='R';
PoleCh[++PointCh]='x';
PoleCh[++PointCh]=' ';


    if      (evnt&RXFIFO0) rx_0();  /*endpoint 0              */
    else if (evnt&RXFIFO1) rx_1();  /*endpoint 2              */
    else if (evnt&RXFIFO2) rx_2();  /*endpoint 4              */
    else if (evnt&RXFIFO3) rx_3();  /*endpoint 6              */
    else                            /*some other RX event     */
     {
     }
   }

  else if (evnt & TX_EV)
   {
    evnt=read_usb(TXEV);            /*check the TX events     */

PoleCh[++PointCh]='T';
PoleCh[++PointCh]='x';
PoleCh[++PointCh]=' ';

    if      (evnt&TXFIFO0) tx_0();  /*endpoint 0              */
    else if (evnt&TXFIFO1) tx_1();  /*endpoint 1              */
    else if (evnt&TXFIFO2) tx_2();  /*endpoint 3              */
    else if (evnt&TXFIFO3) tx_3();  /*endpoint 5              */
    else                            /*some other TX event     */
     {
     }
   }

  else if (evnt & ALT)
   {

PoleCh[++PointCh]='A';
PoleCh[++PointCh]='L';
PoleCh[++PointCh]='T';
PoleCh[++PointCh]=' ';

    usb_alt();   /*alternate event?        */

   }
      /*NAKs can come so fast and furious (especially with OHCI hosts)*/
      /*that they MUST have a lower priority than the other events. If*/
      /*they did not, the other events could get starved out.         */
  else if (evnt & NAK)
   {
    evnt=read_usb(NAKEV);           /*check the NAK events    */

PoleCh[++PointCh]='N';
PoleCh[++PointCh]='A';
PoleCh[++PointCh]='K';
PoleCh[++PointCh]=' ';


    if      (evnt&NAK_O0) onak0();  /*endpoint 0              */
    else if (evnt&NAK_O1) onak1();  /*endpoint 2              */
    else if (evnt&NAK_O2) onak2();  /*endpoint 4              */
    else if (evnt&NAK_I3) inak3();  /*endpoint 5              */
    else                            /*some other NAK event    */
     {
     }
   }

  else                              /*spurious event!         */
   {
   }

      /*the 9602 produces interrupt LEVELS, the COP looks for edges.  */
      /*So we have to fool the 9602 into producing new edges for us   */
      /*when we are ready to look for them.  We do this by temporarily*/
      /*disabling the interrupts, then re-enabling them.              */
  evnt=read_usb(MAMSK);             /*save old mask contents  */
  write_usb(MAMSK,0);               /*disable interrupts      */
  write_usb(MAMSK,evnt);            /*re-enable interrupts    */

PoleCh[++PointCh]=read_usb(MAMSK);
PoleCh[++PointCh]=read_usb(MAEV);
//CountInt--;
//if (CountInt)
EX1=1;
}