test.smp_dump.txt

来自「altera公司的FPGA的一些开发用的VHDL的源代码用于学习」· 文本 代码 · 共 15 行

State Machine - |test|int:inst10|state
Name state.zz state.done2 state.w3 state.w2 state.w1 state.w0 state.r4 state.r3 state.r2 state.r1 state.idle 
state.idle 0 0 0 0 0 0 0 0 0 0 0 
state.r1 0 0 0 0 0 0 0 0 0 1 1 
state.r2 0 0 0 0 0 0 0 0 1 0 1 
state.r3 0 0 0 0 0 0 0 1 0 0 1 
state.r4 0 0 0 0 0 0 1 0 0 0 1 
state.w0 0 0 0 0 0 1 0 0 0 0 1 
state.w1 0 0 0 0 1 0 0 0 0 0 1 
state.w2 0 0 0 1 0 0 0 0 0 0 1 
state.w3 0 0 1 0 0 0 0 0 0 0 1 
state.done2 0 1 0 0 0 0 0 0 0 0 1 
state.zz 1 0 0 0 0 0 0 0 0 0 1