emhwlib_globaltypes.h

来自「SigmDesign SMP8634 media decode chip dev」· C头文件 代码 · 共 1,832 行 · 第 1/4 页

/*****************************************
 Copyright  2001-2003  
 Sigma Designs, Inc. All Rights Reserved
 Proprietary and Confidential
 *****************************************/
/**
  @file   emhwlib_globaltypes.h
  @brief  

  long description

  @author Emmanuel Michon
  @date   2003-05-09
*/

#ifndef __EMHWLIB_GLOBALTYPES_H__
#define __EMHWLIB_GLOBALTYPES_H__

#include "emhwlib_videoformats.h"
#include "emhwlib_displaytypes.h"
#include "../../emhwlib_hal/pll/include/pll_hal_types.h"

struct EMhwlibMacrovisionParam {
	RMuint32 N0;
	RMuint32 N1;
	RMuint32 N2;
	RMuint32 N3;
	RMuint32 N4;
	RMuint32 N5;
	RMuint32 N6;
	RMuint32 N7;
	RMuint32 N8;
	RMuint32 N9;
	RMuint32 N10;
	RMuint32 N11;
	RMuint32 N12;
	RMuint32 N13;
	RMuint32 N14;
	RMuint32 N15;
	RMuint32 N16;
	RMuint32 N17;
	RMuint32 N18;
	RMuint32 N19;
	RMuint32 N20;
	RMuint32 N21;
	RMuint32 N22;
};
	
struct EMhwlibClockGenerator {
	enum PLLGen PLL;
	enum PLLOut PLLOut;
};

struct EMhwlibSubPictureSurface_type {
	RMuint32 Scaler;  // the scaler to be used for displaying the sub picture, or 0 to disable
	RMuint32 Surface;  // the surface ID for the sub picture
};

enum EMhwlibCCType{
	EMhwlibCCType_TopField = 0,
	EMhwlibCCType_BottomField = 1,
	EMhwlibCCType_DTVCCData = 2,
	EMhwlibCCType_DTVCCHeader = 3
};

enum EMhwlibCCSelect{
	EMhwlibCCSelect_CC1 = 1,
	EMhwlibCCSelect_CC2 = 2,
	EMhwlibCCSelect_CC3 = 3,
	EMhwlibCCSelect_CC4 = 4,
};

#define	RUA_DRAM0_ZONEA 2
#define	RUA_DRAM1_ZONEA 3
#define	RUA_DRAM0_ZONEB 4
#define	RUA_DRAM1_ZONEB 5

enum RUADramType { 
	RUA_DRAM_UNPROTECTED = 57,
	RUA_DRAM_CACHED = RUA_DRAM_UNPROTECTED,
	RUA_DRAM_UNCACHED = RUA_DRAM_UNPROTECTED,
	RUA_DRAM_ZONEA,
	RUA_DRAM_PB = RUA_DRAM_ZONEA, // picture buffer zone, alternate name
	RUA_DRAM_ZONEB,
	RUA_DRAM_BB = RUA_DRAM_ZONEB, // bitstream buffer zone, alternate name
};

enum FIFOType {
	FIFO32BitRel,  // 32bit abs gbus address 'start', 32bit 'size' in byte, 32bit 'readptr'and 'writeptr' 0..size-1
	FIFO16BitRel,  // same as 32BitRel, but each ptr as 16BitHi/16BitLo in MPEG-DMem. use semaphores.
	FIFO16BitRelDemo,  // same as 16BitRel, but for guillaume's demo code. different semaphores and wrptr is 4 bytes further.
	FIFO32BitDemux,  // 32 Bit abs demux dmem address 'start', ??? (have to check my docs) to get gbus addr, take Rd/WrPtr * 4 + (base & 0xFFFF0000)
	FIFO32BitEraser  // ??? what is this eraser thingy?
};

enum InputFormat {
	InputFormat_24bpp = 0, 
	InputFormat_24bpp_8565 = 1, 
	InputFormat_24bpp_5676 = 2, 
	InputFormat_32bpp = 3, 
	InputFormat_16bpp_565 = 4, 
	InputFormat_16bpp_1555 = 5, 
	InputFormat_16bpp_4444 = 6, 
	InputFormat_31bpp_7888 = 7
};

enum ProcessorState {
	CPU_RUNNING,
	CPU_STOPPED,
	CPU_RESET
};

enum ClockInputSelect {
	ClockInputSelect_PowerDown = 0, 
	ClockInputSelect_XTAL = 1, 
	ClockInputSelect_VCXO0 = 2, 
	ClockInputSelect_VCXO1 = 3, 
	ClockInputSelect_RCLK0 = 4, 
	ClockInputSelect_RCLK1 = 5, 
	ClockInputSelect_VI0 = 6, 
	ClockInputSelect_VI1 = 7
};

enum MPEG_Profile {
	Profile_FIRST_ = 0, 
	Profile_MPEG2_SD,
	Profile_MPEG2_DVD,
	Profile_MPEG2_HD,
	Profile_MPEG4_SD,
	Profile_MPEG4_SD_Padding,
	Profile_MPEG4_HD,
	Profile_MPEG4_HD_Padding,
	Profile_MPEG2_SD_Packed,
	Profile_MPEG2_DVD_Packed,
	Profile_MPEG2_HD_Packed,
	Profile_MPEG4_SD_Packed,
	Profile_MPEG4_HD_Packed,
	Profile_MPEG2_SD_DeInt,
	Profile_MPEG2_DVD_DeInt,
	Profile_MPEG2_HD_DeInt,
	Profile_MPEG4_SD_DeInt,
	Profile_MPEG4_SD_DeInt_Padding,
	Profile_MPEG4_HD_DeInt,
	Profile_MPEG4_HD_DeInt_Padding,
	Profile_MPEG2_SD_Packed_DeInt,
	Profile_MPEG2_DVD_Packed_DeInt,
	Profile_MPEG2_HD_Packed_DeInt,
	Profile_MPEG4_SD_Packed_DeInt,
	Profile_MPEG4_HD_Packed_DeInt,
	Profile_WMV_SD,
	Profile_WMV_816P,
	Profile_WMV_HD,
	Profile_DIVX3_SD,
	Profile_DIVX3_HD,
	Profile_DIVX3_SD_Packed,
	Profile_DIVX3_HD_Packed,
	Profile_H264_SD,
	Profile_H264_HD,
	Profile_H264_SD_DeInt,
	Profile_H264_HD_DeInt,
	Profile_VC1_SD,
	Profile_VC1_HD,
	Profile_LAST_
};

enum AACInputFormat {
	ADIF_header = 0,
	ADTS_header = 1,
	DSI_header = 2
};

enum TestToneType {
	Ttone_WhiteNoise = 0,
	Ttone_other
};

enum DemuxSourceType {
	SourceType_atsc,
	SourceType_payload,	/* no information about input - used for decryption or encryption */
	SourceType_dvd,
	SourceType_m1s,
	SourceType_m2t,
	SourceType_cipher_only /* replace unused SourceType_dvb */
};

enum DemuxSpiType {
	No_Spi,
	Serial_Spi,
	Paralel_Spi
};

enum DemuxTriggerType {
	Trigger_None,
	Trigger_PCR,
	Trigger_VideoPts,
	Trigger_AudioPts,
	Trigger_VideoOrAudioPts,
	Trigger_PayloadUnitStartIndicator
};

enum DemuxOutputTrigger_type {
	DemuxOutputTrigger_None,
	DemuxOutputTrigger_Pts,
	DemuxOutputTrigger_PayloadUnitStartIndicator /* used only for transport stream */
};

enum TransferTaskCallback {
	TRANSFER_TASK_CALLBACK_NONE,
	TRANSFER_TASK_CALLBACK_GFX,
	TRANSFER_TASK_CALLBACK_DEMUX,
	TRANSFER_TASK_CALLBACK_DEMUX_OUTPUT,
};

enum TransferTaskDirection {
	TRANSFER_TASK_DIRECTION_WRITE,
	TRANSFER_TASK_DIRECTION_READ,
};

/* this enum is used for indexing an array (fifo_ops) */
enum TransferTaskFifoMode {
	TRANSFER_TASK_FIFO_MODE_WRITE_PTS_DMEM_32 = 0,
	TRANSFER_TASK_FIFO_MODE_WRITE_PTS_DMEM_16,
	TRANSFER_TASK_FIFO_MODE_WRITE_MUTEX_PTS_DMEM_16,
	TRANSFER_TASK_FIFO_MODE_WRITE_PTS_ERASER,
	TRANSFER_TASK_FIFO_MODE_READ_PTS_DMEM_32,
	TRANSFER_TASK_FIFO_MODE_READ_PTS_DMEM_16,
	TRANSFER_TASK_FIFO_MODE_READ_MUTEX_PTS_DMEM_16,
	TRANSFER_TASK_FIFO_MODE_READ_PTS_ERASER,
};

#define MAX_AUDIO_PARAM_EXTENSIONS 9
struct AudioSpecificParams {
	RMuint32 DecoderParams;
	RMuint32 DecodeParamExtensions[MAX_AUDIO_PARAM_EXTENSIONS];
};

struct ScalerLUT {
	RMuint32 Size;
	RMuint32 Data[256];
};


struct CursorLUT {
 	RMuint32 Data[16];
};

struct BWArbiterParam{
	RMuint32 MaxBW;
	RMuint32 MinBW;
	RMbool Enable;
};



struct TeleTextBuffer {
	RMuint32 Size;
	RMuint32 Data[0x300];
};

/*
  This is meant to transfer large amounts of data by properties,
  to be used for very special data (like microcode).
  
  Since this structure embeds a pointer, it cannot be used in
  situations where the adressing space changes (user/kernel transition,
  remote network access situations).
*/
struct emhwlib_datablock {
	RMuint8 *data;
	RMuint32 size;
};

#define TIME_STAMP_INFO			0x00000001
#define FIRST_ACCESS_UNIT_POINTER_INFO	0x00000002

/*
  Meant to transfer specific information associated with data to be transferred
*/
struct emhwlib_info {
	RMuint32 ValidFields;		// or-ed flags: TIME_STAMP_INFO, FIRST_ACCESS_UNIT_INFO
	RMuint64 TimeStamp;
	RMuint32 FirstAccessUnitPointer;
};

struct mm_spec {
	RMuint32 start;
	RMuint32 size;
	void *syncCookie;
};

struct DecoderProcessInterrupt_type {
	RMuint32 stream;
	RMuint32 *pEstatus;
};

struct ReadBufferInfo {
	RMuint32 address;
	RMuint32 size;
	void *context;
};

enum RawDataTransferDirection {
	RawDataTransferDirection_Read = 32,
	RawDataTransferDirection_Write,
};

struct SoftIrqTaskEvent {
	RMuint32 TaskAddress;
	RMuint32 EventMask;
};

struct InbandCommand_type {
	RMuint32 Tag;
	RMuint32 Coordinate;
};

enum EMhwlibInbandCommmand {
	EMhwlibInbandCommand_EOS = 0x16
};

typedef RMuint32 RMpalette_1BPP[2];
typedef RMuint32 RMpalette_2BPP[4];
typedef RMuint32 RMpalette_4BPP[16];
typedef RMuint32 RMpalette_8BPP[256];

typedef RMuint32 RMCursorLut[16];
typedef RMuint32 RMCursorPix[512];

typedef RMuint8 RMcss_chlgkey[10];
typedef RMuint8 RMcss_key[5];
typedef RMuint8 RMcss_disckey[2028];
typedef RMuint8 RMcss_titlekey[5];

typedef RMuint8 RMAESKey[16];
typedef RMuint8 RMDESKey[8];
typedef RMuint8 RMRC4Key[32];

typedef RMuint8  RMuint8x6[6];		/* array of 6 RMuint8 - used for C2 key */
typedef RMuint8  RMuint8x8[8];		/* array of 8 RMuint8 - used for DES key */
typedef RMuint8  RMuint8x32[32];	/* array of 32 RMuint8 - used for Demux Encryption */
typedef RMuint8  RMuint8x256[256];	/* array of 256 RMuint8 - used for C2 cipher */
typedef RMuint16 RMuint16x8[8];		/* array of  8 RMuint16 - used for AudioDecoder LpcmAobParameters */
typedef RMuint16 RMuint16x6[6];		/* array of  6 RMuint16 - used for AudioDecoder LpcmVobParameters*/
typedef RMuint32 RMuint32x6[6];		/* array of  6 RMuint32 - used for VideoDecoder InbandParams */
typedef RMint32  RMuint32x64[64];	/* array of 64 RMuint32 - used for AudioDecoder WMAParameters */

typedef RMuint32 RMuint32x4[4];		/* array of  4 RMuint32 */
typedef RMint32  RMint32x5[5];		/* array of  5 RMint32 - used for AudioDecoder WMAParameters */

typedef RMuint32 RMsha1Sum[5];

typedef RMuint32 RMVSyncXtal[6][2]; /* current and last xtal counter value at the time of each vsync [0:CVBS, 1:YUV, 2:MAO, 3:DIG, 4:VID, 5:GFX][0:current, 1:last] */

enum EncryptionType {
	AES_128 = 1,
	AES_256
};

struct RMcipherBuffer {
	RMuint32 FromAddress;
	RMuint32 ToAddress;
	RMuint32 Size;
};

struct DRAMSizeXferFIFO_in_type {
	RMuint32 XferFIFOSize;
	RMuint32 XferFIFOCount;
};

struct DRAMSizeXferFIFO_out_type {
	RMuint32 CachedSize;
	RMuint32 UncachedSize;
};

struct AddXferFIFO_type {
	RMuint32 XferFIFOSize;
	RMuint32 XferFIFOCount;
	RMuint32 CachedAddress;
	RMuint32 CachedSize;
	RMuint32 UncachedAddress;
	RMuint32 UncachedSize;
};

struct ReceiveThreshold_type {
	RMbool partial_read;	/* if TRUE the buffer is completed after every interrupt, even if it is not full */
	RMuint32 size;		/* interrupt is issued after writting "size" bytes */ 
};

/* information about send/receive data fifo:
	- VideoDecoder target 0 = sent bitstream
	- VideoDecoder target 1 = received user_data
	- AudioDecoder target 0 = sent bitstream
	- SpuDecoder target 0 = sent bitstream
	- Demux target 0 = sent bitstream
	- Demux target 1 = received pid filter
	- Demux target 2 = received record data
	- StreamCapture target 0 = received spi data
All the sizes are expressed in bytes.
Writable is the number of bytes that can be written inside the fifo. Writable express the emptiness of the fifo.
Readable is the number of bytes that should be read by decoder. Readable express the fullness of the fifo.
*/
struct DataFIFOInfo {
	RMuint32 StartAddress;
	RMuint32 Size;
	RMuint32 Writable;
	RMuint32 Readable;
};

struct UserDataFIFOInfo {
	RMuint32 ContainerAddress;
	RMuint32 StartAddress;
	RMuint32 Size;
	RMuint32 WrPtr;
	RMuint32 RdPtr;
};

/* information about send/receive the list of buffers queued for send or receive - so called xfer fifo.
Modules and targets same as for DataFIFOInfo.
All the sizes are expressed in entry units. One entry is one buffer.
Writable is the number of entries that can be written inside the fifo. Writable express the emptiness of the fifo.
Readable is the number of entries that should be read by decoder. Readable express the fullness of the fifo.
Erasable is the number of entries that were read by decoder, but not yet freed.
*/
struct XferFIFOInfo_type {
	RMuint32 StartAddress;
	RMuint32 Size;
	RMuint32 Writable;
	RMuint32 Readable;
	RMuint32 Erasable;
};

struct PSFMatchSection_type {
	RMuint8			expand_link_index;	// reserved for extending the lenght of section filter, value between 0...31 or 0xFF if not used
	RMuint8			and_link_index;		// reserved for "logical and" two section filters, value between 0...31 or 0xFF if not used
	RMuint8			mask[12];		// 96 bit mask - 1 means the mask is active
	RMuint8			mode[12];		// 96 bit mask - 1 means positive match, 0 means negative match
	RMuint8			comp[12];		// 96 bit value
};

struct PSFRangeSection_type {
	RMuint8			expand_link_index;	// reserved for extending the lenght of section filter, value between 0...31 or 0xFF if not used
	RMuint8			and_link_index;		// reserved for "logical and" two section filters, value between 0...31 or 0xFF if not used
	RMuint16		min_mask;		// 12 bit mask for the 12 bytes to be compared for min
	RMuint16		max_mask;		// 12 bit mask for the 12 bytes to be compared for max
	RMuint16		range_mask;		// 12 bit mask for the 12 bytes to be compared indicating inrange/outrange comparison
	RMuint8			min_comp[12];
	RMuint8			max_comp[12];
};

typedef RMascii EMhwlibString[256];

enum PictureOrientation{
	FRTop_FCLeft = 1,
	FRTop_FCRight,
	FRBottom_FCRight,
	FRBottom_FCLeft,
	FRLeft_FCTop,
	FRRight_FCTop,