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📄 v32.mdl

📁 matlab 代码,实现了ITU-T V.32建议的 modem 整体仿真实现。
💻 MDL
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      SampleTime	      "-1"
    }
    Block {
      BlockType		      Scope
      Floating		      off
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "0"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      PortCounts	      "[]"
      SFunctionModules	      "''"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      UnitDelay
      X0		      "0"
      SampleTime	      "1"
      StateMustResolveToSignalObject off
      RTWStateStorageClass    "Auto"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "v32"
    Location		    [2, 82, 1014, 723]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "112"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "Bernoulli Binary\nGenerator"
      Ports		      [0, 1]
      Position		      [25, 203, 105, 247]
      FontName		      "Arial"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      on
      P			      "0.5"
      seed		      "0"
      Ts		      "1"
      frameBased	      off
      sampPerFrame	      "1"
      orient		      off
    }
    Block {
      BlockType		      Math
      Name		      "Math\nFunction"
      Ports		      [2, 1]
      Position		      [220, 217, 250, 248]
      Operator		      "mod"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [1]
      Position		      [170, 69, 200, 101]
      Location		      [505, 447, 829, 686]
      Open		      off
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope1"
      Ports		      [1]
      Position		      [290, 54, 320, 86]
      Location		      [499, 201, 823, 440]
      Open		      off
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      SaveName		      "ScopeData1"
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      SubSystem
      Name		      "scramble"
      Ports		      [0, 1]
      Position		      [60, 290, 100, 350]
      TreatAsAtomicUnit	      off
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      System {
	Name			"scramble"
	Location		[1, 165, 1007, 615]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	ZoomFactor		"100"
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay1"
	  Position		  [55, 28, 90, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay10"
	  Position		  [565, 28, 600, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay11"
	  Position		  [630, 28, 665, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay12"
	  Position		  [690, 28, 725, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay13"
	  Position		  [750, 28, 785, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay14"
	  Position		  [810, 28, 845, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay15"
	  Position		  [870, 28, 905, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay16"
	  Position		  [930, 28, 965, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay17"
	  Position		  [210, 168, 245, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay18"
	  Position		  [285, 168, 320, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay19"
	  Position		  [350, 168, 385, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay2"
	  Position		  [110, 28, 145, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay20"
	  Position		  [415, 168, 450, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay21"
	  Position		  [480, 168, 515, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay22"
	  Position		  [545, 168, 580, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay23"
	  Position		  [610, 168, 645, 202]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay3"
	  Position		  [165, 28, 200, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay4"
	  Position		  [220, 28, 255, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay5"
	  Position		  [275, 28, 310, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay6"
	  Position		  [335, 28, 370, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay7"
	  Position		  [390, 28, 425, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay8"
	  Position		  [445, 28, 480, 62]
	}
	Block {
	  BlockType		  UnitDelay
	  Name			  "Unit Delay9"
	  Position		  [505, 28, 540, 62]
	}
	Block {
	  BlockType		  Math
	  Name			  "mod 2\n"
	  Ports			  [2, 1]
	  Position		  [180, 362, 210, 393]
	  Operator		  "mod"
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [690, 178, 720, 192]
	  IconDisplay		  "Port number"
	}
	Line {
	  SrcBlock		  "Unit Delay5"
	  SrcPort		  1
	  Points		  [0, 0; 5, 0]
	  Branch {
	    DstBlock		    "Unit Delay6"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 55; -155, 0]
	    DstBlock		    "mod 2\n"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Unit Delay13"
	  SrcPort		  1
	  DstBlock		  "Unit Delay14"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "mod 2\n"
	  SrcPort		  1
	  Points		  [10, 0; 0, -50; -195, 0; 0, -285]
	  DstBlock		  "Unit Delay1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay23"
	  SrcPort		  1
	  Points		  [0, 0; 20, 0]
	  Branch {
	    DstBlock		    "Out1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 240; -505, 0]
	    DstBlock		    "mod 2\n"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "Unit Delay4"
	  SrcPort		  1
	  DstBlock		  "Unit Delay5"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay19"
	  SrcPort		  1
	  DstBlock		  "Unit Delay20"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay22"
	  SrcPort		  1
	  DstBlock		  "Unit Delay23"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay21"
	  SrcPort		  1
	  DstBlock		  "Unit Delay22"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay20"
	  SrcPort		  1
	  DstBlock		  "Unit Delay21"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay18"
	  SrcPort		  1
	  DstBlock		  "Unit Delay19"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay17"
	  SrcPort		  1
	  DstBlock		  "Unit Delay18"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay16"
	  SrcPort		  1
	  Points		  [10, 0; 0, 90; -800, 0; 0, 50]
	  DstBlock		  "Unit Delay17"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay15"
	  SrcPort		  1
	  DstBlock		  "Unit Delay16"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay14"
	  SrcPort		  1
	  DstBlock		  "Unit Delay15"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay12"
	  SrcPort		  1
	  DstBlock		  "Unit Delay13"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay11"
	  SrcPort		  1
	  DstBlock		  "Unit Delay12"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay10"
	  SrcPort		  1
	  DstBlock		  "Unit Delay11"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay9"
	  SrcPort		  1
	  DstBlock		  "Unit Delay10"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay8"
	  SrcPort		  1
	  DstBlock		  "Unit Delay9"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay7"
	  SrcPort		  1
	  DstBlock		  "Unit Delay8"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay6"
	  SrcPort		  1
	  DstBlock		  "Unit Delay7"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay3"
	  SrcPort		  1
	  DstBlock		  "Unit Delay4"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay2"
	  SrcPort		  1
	  DstBlock		  "Unit Delay3"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unit Delay1"
	  SrcPort		  1
	  DstBlock		  "Unit Delay2"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "Bernoulli Binary\nGenerator"
      SrcPort		      1
      Points		      [35, 0]
      Branch {
	Points			[0, -140]
	DstBlock		"Scope"
	DstPort			1
      }
      Branch {
	DstBlock		"Math\nFunction"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "scramble"
      SrcPort		      1
      Points		      [70, 0; 0, -80]
      DstBlock		      "Math\nFunction"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Math\nFunction"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	Points			[75, 0]
      }
      Branch {
	Points			[0, -165]
	DstBlock		"Scope1"
	DstPort			1
      }
    }
    Annotation {
      Position		      [468, 266]
    }
  }
}

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