📄 maca.h
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#define maca_version (*((volatile uint32_t *)(0x80004000)))
#define maca_reset (*((volatile uint32_t *)(0x80004004)))
#define maca_random (*((volatile uint32_t *)(0x80004008)))
#define maca_control (*((volatile uint32_t *)(0x8000400c)))
#define maca_status (*((volatile uint32_t *)(0x80004010)))
#define maca_frmpnd (*((volatile uint32_t *)(0x80004014)))
#define maca_edvalue (*((volatile uint32_t *)(0x8000401c)))
#define maca_tmren (*((volatile uint32_t *)(0x80004040)))
#define maca_tmrdis (*((volatile uint32_t *)(0x80004044)))
#define maca_clk (*((volatile uint32_t *)(0x80004048)))
#define maca_startclk (*((volatile uint32_t *)(0x8000404c)))
#define maca_cplclk (*((volatile uint32_t *)(0x80004050)))
#define maca_sftclk (*((volatile uint32_t *)(0x80004054)))
#define maca_clkoffset (*((volatile uint32_t *)(0x80004058)))
#define maca_relclk (*((volatile uint32_t *)(0x8000405c)))
#define maca_cpltim (*((volatile uint32_t *)(0x80004060)))
#define maca_slotoffset (*((volatile uint32_t *)(0x80004064)))
#define maca_timestamp (*((volatile uint32_t *)(0x80004068)))
#define maca_dmarx (*((volatile uint32_t *)(0x80004080)))
#define maca_dmatx (*((volatile uint32_t *)(0x80004084)))
#define maca_dmatxpoll (*((volatile uint32_t *)(0x80004088)))
#define maca_txlen (*((volatile uint32_t *)(0x8000408c)))
#define maca_txseqnr (*((volatile uint32_t *)(0x80004090)))
#define maca_setrxlvl (*((volatile uint32_t *)(0x80004094)))
#define maca_getrxlvl (*((volatile uint32_t *)(0x80004098)))
#define maca_irq (*((volatile uint32_t *)(0x800040c0)))
#define maca_clrirq (*((volatile uint32_t *)(0x800040c4)))
#define maca_setirq (*((volatile uint32_t *)(0x800040c8)))
#define maca_maskirq (*((volatile uint32_t *)(0x800040cc)))
#define maca_panid (*((volatile uint32_t *)(0x80004100)))
#define maca_addr16 (*((volatile uint32_t *)(0x80004104)))
#define maca_maca64hi (*((volatile uint32_t *)(0x80004108)))
#define maca_maca64lo (*((volatile uint32_t *)(0x8000410c)))
#define maca_fltrej (*((volatile uint32_t *)(0x80004110)))
#define maca_divider (*((volatile uint32_t *)(0x80004114)))
#define maca_warmup (*((volatile uint32_t *)(0x80004118)))
#define maca_preamble (*((volatile uint32_t *)(0x8000411c)))
#define maca_whiteseed (*((volatile uint32_t *)(0x80004120)))
#define maca_framesync (*((volatile uint32_t *)(0x80004124)))
#define maca_framesync2 (*((volatile uint32_t *)(0x80004128)))
#define maca_txackdelay (*((volatile uint32_t *)(0x80004140)))
#define maca_rxackdelay (*((volatile uint32_t *)(0x80004144)))
#define maca_eofdelay (*((volatile uint32_t *)(0x80004148)))
#define maca_ccadelay (*((volatile uint32_t *)(0x8000414c)))
#define maca_rxend (*((volatile uint32_t *)(0x80004150)))
#define maca_txccadelay (*((volatile uint32_t *)(0x80004154)))
#define maca_key3 (*((volatile uint32_t *)(0x80004158)))
#define maca_key2 (*((volatile uint32_t *)(0x80004158)))
#define maca_key1 (*((volatile uint32_t *)(0x80004158)))
#define maca_key0 (*((volatile uint32_t *)(0x80004158)))
typedef union maca_version_reg_tag
{
struct
{
uint32_t MINOR:8;
uint32_t RESERVED1:8;
uint32_t MAJOR:8;
uint32_t RESERVED2:8;
} Bits;
uint32_t Reg;
} maca_version_reg_t;
#define maca_version_reg_st ((maca_version_reg_t)(maca_version))
typedef union maca_reset_reg_tag
{
struct
{
uint32_t RESERVED:30;
uint32_t CLK_ON:1;
uint32_t RST:1;
} Bits;
uint32_t Reg;
} maca_reset_reg_t;
#define maca_reset_reg_st ((maca_reset_reg_t)(maca_reset))
typedef union maca_ctrl_reg_tag
{
struct
{
uint32_t RESERVED:11;
uint32_t ISM:1;
uint32_t PRE_COUNT:4;
uint32_t RSTO:1;
uint32_t RSV:1;
uint32_t ROLE:1;
uint32_t NOFC:1;
uint32_t PRM:1;
uint32_t rel:1;
uint32_t ASAP:1;
uint32_t BCN:1;
uint32_t AUTO:1;
uint32_t LFSR:1;
uint32_t TM:1;
uint32_t MODE:2;
uint32_t SEQUENCE:3;
} Bits;
uint32_t Reg;
} maca_ctrl_reg_t;
#define maca_control_ism (1<<20)
#define maca_control_zigbee (~maca_control_ism)
#define maca_ctrl_reg_st ((maca_ctrl_reg_t *)(&maca_reset))
#define _set_maca_test_mode(x) (maca_ctrl_reg_st->Bits.TM = x)
#define _set_maca_sequence(x) (maca_ctrl_reg_st->Bits.SEQUENCE = x)
#define _set_maca_asap(x) (maca_ctrl_reg_st->Bits.ASAP = x)
#define MACA_CTRL_ZIGBEE_MODE (0)
#define MACA_CTRL_ISM_MODE (1)
#define MACA_CTRL_PRM_NORMAL_MODE (0)
#define MACA_CTRL_PRM_PROMISCUOUS_MODE (1)
#define MACA_CTRL_BCN_ALL (0)
#define MACA_CTRL_BCN_BEACON (1)
#define MACA_CTRL_TM_NORMAL (0)
#define MACA_CTRL_TM_TEST (1)
#define MACA_CTRL_MODE_NO_CCA (0)
#define MACA_CTRL_MODE_NON_SLOTTED (1)
#define MACA_CTRL_MODE_SLOTTED (2)
typedef union maca_status_reg_tag
{
struct
{
uint32_t RESERVED:16;
uint32_t TO:1;
uint32_t CRC:1;
uint32_t BUSY:1;
uint32_t OVR:1;
uint32_t zigbee:1;
uint32_t :7;
uint32_t COMPLETE_CODE:4;
} Bits;
uint32_t Reg;
} maca_status_reg_t;
typedef enum maca_freq_chann_tag
{
SMAC_CHANN_11 = 0,
SMAC_CHANN_12,
SMAC_CHANN_13,
SMAC_CHANN_14,
SMAC_CHANN_15,
SMAC_CHANN_16,
SMAC_CHANN_17,
SMAC_CHANN_18,
SMAC_CHANN_19,
SMAC_CHANN_20,
SMAC_CHANN_21,
SMAC_CHANN_22,
SMAC_CHANN_23,
SMAC_CHANN_24,
SMAC_CHANN_25,
SMAC_CHANN_26,
MAX_SMAC_CHANNELS
} maca_freq_chann_t;
typedef union maca_maskirq_reg_tag
{
struct
{
uint32_t RESERVED1:16;
uint32_t STRT:1;
uint32_t SYNC:1;
uint32_t CM:1;
uint32_t CRC:1;
uint32_t FLT:1;
uint32_t SFT:1;
uint32_t LVL:1;
uint32_t RESERVED0:4;
uint32_t NOT_USED1:1;
uint32_t NOT_USED0:1;
uint32_t DI:1;
uint32_t POLL:1;
uint32_t ACPL:1;
} Bits;
uint32_t Reg;
} maca_maskirq_reg_t;
#define SMAC_MACA_CNTL_INIT_STATE ( control_prm | control_nofc | control_mode_non_slotted )
#define MACA_WRITE(reg, src) (reg = src)
#define MACA_READ(reg) reg
#endif // _MACA_H_
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