channel.h

freescale atk source code

#define DATA_BUFFER_ERROR	BIT5
#define TRANSACTION_ERROR	BIT3

#define DEVICE_DESC	0x1
#define CONF_DESC	0x2
#define STR_DES0	0x3
#define STR_DES1	0x4
#define STR_DES2	0x5
#define STR_DES3	0x6

#define EP1OUT_ENABLE	BIT7
#define EP2IN_ENABLE	BIT23

#define EP0OUT_COMPLETE BIT0
#define EP1OUT_COMPLETE	BIT1
#define EP0IN_COMPLETE	BIT16
#define EP2IN_COMPLETE	BIT18

#define EP1OUT_PRIME	BIT1
#define EP2IN_PRIME		BIT18
//ES Changed by Eyal Segev to speedup verification
#ifdef RTL_STUB
#define TIMEOUT_VALUE	100
#else
#define TIMEOUT_VALUE	100000
#endif /* RTL_STUB */

// dQH address bit [10:0] MUST be ZERO
// dQH(0-5) region

#define dQHBASE 0xd8000000
//********* need to matched with 0x10024158 ******/

// now nand buffer is used
#define	dQH0_EP0OUT	(dQHBASE + 0x000)   // EP0 OUT
#define	dQH1_EP0IN	(dQHBASE + 0x040)	// EP0 IN
#define	dQH2_EP1OUT	(dQHBASE + 0x080)	// EP1 OUT
#define	dQH5_EP2IN	(dQHBASE + 0x140)	// EP2 IN

// dTD for dQH0_EP0OUT region
// 0x1FFFC180 to 0x1FFFC1C0
#define dTD0_EP0OUT  (dQHBASE + 0x180)
#define dTD1_EP0OUT  (dQHBASE + 0x1A0)	// of no use
	
// dTD for dQH1_EP0IN region
// 0x1FFFC1C0 to 0x1FFFC200
#define dTD0_EP0IN (dQHBASE + 0x1C0)
#define dTD1_EP0IN (dQHBASE + 0x1E0)	// of no use

// dTD for dQH2_EP1OUT region
// 0x1FFFC200 to 0x1FFFC240
#define dTD0_EP1OUT (dQHBASE + 0x200)
#define dTD1_EP1OUT (dQHBASE + 0x220)

// dTD for dQH5_EP1OUT region
// 0x1FFFC240 to 0x1FFFC240
#define dTD0_EP2IN (dQHBASE + 0x240)
#define dTD1_EP2IN (dQHBASE + 0x260)

// Buffer Pointer for EP0 IN 
// 0x1FFFC280 to 0x1FFFC2C0
#define BUFPTR_P0_EP0IN	(dQHBASE + 0x280)

// Buffer Pointer for EP1 OUT (16 bytes should be enough)
// 0x1FFFC2C0 to 0x1FFFC2D0
#define BUFPTR_P0_EP1OUT (dQHBASE + 0x2C0)

// Buffer Pointer for EP2 IN (16 bytes should be enough)
// 0x1FFFC2D0 to 0x1FFFC300
#define BUFPTR_P0_EP2IN	 (dQHBASE + 0x2D0)

//=====================
// Bootstrap specific
//=====================
// Command Packet Format: Header(2)+Address(4)+Format(1)+ByteCount(4)+Data(4) 
#define	ReadHeader	0x0101
#define WriteHeader 0x0202
#define PCHeader 	0x0303
#define WriteFile 	0x0404
#define ErrorHeader	0x0505
#define CSFHeader	0x0606
#define HWConfigHeader	0x0707
#define ExecuteHeader	0x0808
#define ReEnumHeader	0x0909
#define ProductionPart 	0x12343412
#define DevelopmentPart 0x56787856
#define WriteComplete	0x128A8A12
#define ReEnumAck		0x89232389
#define COMMAND 0x10
#define ByteCount_16kBytes	0x4000
#define DONE		1
#define CONTINUE	0
#define RE_ENUM		2
#define COMPLETE	0x88
// max length usb once transfer
#define MAX_USB_DATA_LEN	(16*1024)

typedef struct s_dQH_SETUP{
	u32 dQH_WORD0;	
	u32 dQH_WORD1;	
	u32 dQH_WORD2;	
	u32 dQH_WORD3;	
	u32 dQH_WORD4;	
	u32 dQH_WORD5;	
	u32 dQH_WORD6;	
	u32 dQH_WORD7;	
	u32 dQH_WORD8;	
	u32 dQH_WORD9;	
	u32 dQH_WORD10;	
	u32 dQH_WORD11;	

} s_dQH_SETUP;

typedef struct s_dTD_SETUP{
	u32 dTD_WORD0;	
	u32 dTD_WORD1;	
	u32 dTD_WORD2;	
	u32 dTD_WORD3;	
	u32 dTD_WORD4;	
	u32 dTD_WORD5;	
	u32 dTD_WORD6;	
	u32 dTD_WORD7;	
} s_dTD_SETUP;

typedef struct s_dQH {
	u32 dQHBase;
	u32 NextLinkPtr;
    u32 BuffPtr0; 
    u32 BuffPtr1; 
	u32 BuffPtr2; 
    u32 BuffPtr3; 
	u32 BuffPtr4;
	u16 TotalBytes;
	u16 MPS;
	u16 CurrentOffset;
	u8 ZLT; 
   	u8 ios;
   	u8 Terminate;
   	u8 ioc;
   	u8 Status; 
}s_dQH;

typedef struct s_dTD {
	u32 dTDBase; 
	u32 dTDNextLinkPtr;
	u32 BuffPtr0; 
   	u32 BuffPtr1; 
	u32 BuffPtr2;
   	u32 BuffPtr3;
   	u32 BuffPtr4;
   	u16 TotalBytes;
	u16 CurrentOffset;
   	u8 Terminate;
   	u8 ioc;
   	u8 Status;
}s_dTD;

/*!
 * channel type
 */
typedef enum {
	CHAN_UART,
	CHAN_USB,
} CHANNEL_TYPE;

typedef enum {
	STATE_CLEAN,
	STATE_DIRTY,
	STATE_EMPTY,
}cache_type_t;

typedef struct {
	u16 data[1056]; /* (2048 + 64)/2 */
	cache_type_t sate;
}cache_usb_t;
/*!
 * channel exported functions
 */
extern void atk_channel_init(u8 ch);
extern u32 atk_channel_recv(u8 *buf, u32 count);
extern u32 atk_channel_send(const u8 *buf, u32 count);

#endif /* _CHANNEL_H_ */