mx51_nfc.h

freescale atk source code

/*****************************************************************************
** mx51_nfc.h
**
** Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
**
** This file contains copyrighted material. Use of this file is
** restricted by the provisions of a Freescale Software License
** Agreement, which has either been electronically accepted by
** you or has been expressly executed between the parties.
**
** Description: Explanation for the usage of this file.
**
** Revision History:
** -----------------
*****************************************************************************/

#ifndef __MX51_NFC_H__
#define __MX51_NFC_H__

#include "type.h"
#include "flash_lib.h"
 
#define AIPS2_BASE_ADDR 0x83F00000   /* IP registers */
#define AXI_BASE_ADDR 	0xCFFF0000    /* nfc internal ram address */ 
#define NFC_BASE_ADDR 	(AIPS2_BASE_ADDR + 0x000DB000) 

#define NFC_MAB0_BASE	(AXI_BASE_ADDR+0x000)	/* main area buffer0 */
#define NFC_MAB1_BASE	(AXI_BASE_ADDR+0x200)	/* main area buffer1 */
#define NFC_MAB2_BASE	(AXI_BASE_ADDR+0x400)	/* main area buffer2 */
#define NFC_MAB3_BASE	(AXI_BASE_ADDR+0x600)	/* main area buffer3 */
#define NFC_MAB4_BASE	(AXI_BASE_ADDR+0x800)	/* main area buffer4 */
#define NFC_MAB5_BASE	(AXI_BASE_ADDR+0xA00)	/* main area buffer5 */
#define NFC_MAB6_BASE	(AXI_BASE_ADDR+0xC00)	/* main area buffer6 */
#define NFC_MAB7_BASE	(AXI_BASE_ADDR+0xE00)	/* main area buffer7 */
		
#define NFC_SAB0_BASE	(AXI_BASE_ADDR+0x1000)	/* spare area buffer0 */
#define NFC_SAB1_BASE	(AXI_BASE_ADDR+0x1040)	/* spare area buffer1 */
#define NFC_SAB2_BASE	(AXI_BASE_ADDR+0x1080)	/* spare area buffer2 */
#define NFC_SAB3_BASE	(AXI_BASE_ADDR+0x10C0)	/* spare area buffer3 */
#define NFC_SAB4_BASE	(AXI_BASE_ADDR+0x1100)	/* spare area buffer4 */
#define NFC_SAB5_BASE	(AXI_BASE_ADDR+0x1140)	/* spare area buffer5 */
#define NFC_SAB6_BASE	(AXI_BASE_ADDR+0x1180)	/* spare area buffer6 */
#define NFC_SAB7_BASE	(AXI_BASE_ADDR+0x11C0)	/* spare area buffer7 */
#define NFC_SAB_LEN     64                   
#define NFC_SAB_COUNT  	8 

#define NFC_NAND_CMD		AXI_BASE_ADDR + 0x1E00	
#define NFC_NAND_ADD_0		AXI_BASE_ADDR + 0x1E04
#define NFC_NAND_ADD_1		AXI_BASE_ADDR + 0x1E08			
#define NFC_NAND_ADD_2		AXI_BASE_ADDR + 0x1E0C			
#define NFC_NAND_ADD_3		AXI_BASE_ADDR + 0x1E10			
#define NFC_NAND_ADD_4		AXI_BASE_ADDR + 0x1E14			
#define NFC_NAND_ADD_5		AXI_BASE_ADDR + 0x1E18			
#define NFC_NAND_ADD_6		AXI_BASE_ADDR + 0x1E1C			
#define NFC_NAND_ADD_7		AXI_BASE_ADDR + 0x1E20
#define NFC_NAND_ADD_8		AXI_BASE_ADDR + 0x1E24			
#define NFC_NAND_ADD_9		AXI_BASE_ADDR + 0x1E28			
#define NFC_NAND_ADD_10		AXI_BASE_ADDR + 0x1E2C			
#define NFC_NAND_ADD_11		AXI_BASE_ADDR + 0x1E30			
			

#define NFC_CONFIGURATION1	AXI_BASE_ADDR + 0x1E34
#define NFC_ECC_STATUS_RESULT	AXI_BASE_ADDR + 0x1E38			
#define NFC_STATUS_SUM		AXI_BASE_ADDR + 0x1E3C			
#define NFC_LAUNCH_NFC		AXI_BASE_ADDR + 0x1E40			


#define NFC_WR_PROTECT		NFC_BASE_ADDR + 0x00			
#define NFC_UNLOCK_BLK_ADD0	NFC_BASE_ADDR + 0x04			
#define NFC_UNLOCK_BLK_ADD1	NFC_BASE_ADDR + 0x08			
#define NFC_UNLOCK_BLK_ADD2	NFC_BASE_ADDR + 0x0C			
#define NFC_UNLOCK_BLK_ADD3	NFC_BASE_ADDR + 0x10
#define NFC_UNLOCK_BLK_ADD4	NFC_BASE_ADDR + 0x14			
#define NFC_UNLOCK_BLK_ADD5	NFC_BASE_ADDR + 0x18			
#define NFC_UNLOCK_BLK_ADD6	NFC_BASE_ADDR + 0x1C			
#define NFC_UNLOCK_BLK_ADD7	NFC_BASE_ADDR + 0x20			

			
#define NFC_CONFIGURATION2	NFC_BASE_ADDR + 0x24
#define NFC_CONFIGURATION3	NFC_BASE_ADDR + 0x28			
#define NFC_IPC			NFC_BASE_ADDR + 0x2C			
#define NFC_AXI_ERR_ADDR	NFC_BASE_ADDR +	0x30			
		

/*---------------------------------------------------------------------------*/
/* NFC CONFIGURATION1							     */
/*---------------------------------------------------------------------------*/

#define NFC_CONF1_CS_SHIFT 12
#define NFC_CONF1_CS_SIZE 3
#define NFC_CONF1_CS_MASK 0x00007000
#define GET_NFC_CONF1_CS \
	((raw_read(NFC_CONFIGURATION1) & NFC_CONF1_CS_MASK) >> NFC_CONF1_CS_SHIFT)
#define SET_NFC_CONF1_CS(code) \
	(raw_write((raw_read(NFC_CONFIGURATION1) & ~NFC_CONF1_CS_MASK) | \ 
	(code << NFC_CONF1_RBA_SHIFT), NFC_CONFIGURATION1))


#define NFC_CONF1_RBA_SHIFT 4
#define NFC_CONF1_RBA_SIZE 3
#define NFC_CONF1_RBA_MASK 0x00000070
#define GET_NFC_CONF1_RBA \
	((raw_read(NFC_CONFIGURATION1) & NFC_CONF1_RBA_MASK) >> NFC_CONF1_RBA_SHIFT)
#define SET_NFC_CONF1_RBA(code) \ 
	(raw_write((raw_read(NFC_CONFIGURATION1) & ~NFC_CONF1_RBA_MASK) | \
	(code << NFC_CONF1_RBA_SHIFT), NFC_CONFIGURATION1))


/*---------------------------------------------------------------------------*/
/*	NFC IPC								     */
/*---------------------------------------------------------------------------*/

#define NFC_INT_BUSY   !(raw_read(NFC_IPC) & 0x80000000) 
#define NFC_READY  (raw_read(NFC_IPC) &= ~0x10000000)
#define IP_BUSY   (!( raw_read(NFC_IPC) & 0x00000002 ))
/*---------------------------------------------------------------------------*/
/* NAND Flash Command Set for 8-bit I/O                    		     */
/*---------------------------------------------------------------------------*/
#define NAND_CMD_READ              	0x00
#define NAND_CMD_READ_CONFIRM      	0x30
#define NAND_CMD_PAGE_PROG         	0x80
#define NAND_CMD_PAGE_PROG_CONFIRM 	0x10
#define NAND_CMD_ERASE             	0x60
#define NAND_CMD_ERASE_CONFIRM     	0xD0
#define NAND_CMD_READID            	0x90
#define NAND_CMD_RESET             	0xFF
#define NAND_CMD_READ_STATUS	   	0x70

/*---------------------------------------------------------------------------*/
/* NFC ERROR code for internal                                               */
/*---------------------------------------------------------------------------*/
#define	NFC_NO_ERR			0x00
#define NFC_SB_1BIT_ECC_ERR		0x01
#define NFC_SB_2BIT_ECC_ERR		0x02
#define NFC_PB_1BIT_ECC_ERR		0x04
#define NFC_PB_2BIT_ECC_ERR		0x08
#define NFC_ERASE_ERR			0x10
#define NFC_WRITE_ERR			0x20
#define NFC_READ_ERR			0x40
#define NFC_ILLEGAL_ACCESS		0x80


/* nand status marco */
#define NAND_STATUS_READY          	0x40
#define NAND_STATUS_NOT_PROTECT    	0x80
#define NAND_STATUS_PROG_ERROR     	0x01
/* FMS & bus width */
#define NF_FMS_2KB			0x00000100
#define NF_4KB				0x00000200
#define NF_16BIT			~(0x00000008)
#define NFC_OPS_STAT			(1 << 31)
#define NFC_IPC_CREQ			(1 << 0)
#define NFC_IPC_ACK			(1<<1)
#define NFC_ECC_MODE_4			(1<<6)
#define NFC_ECC_MODE_8			~(1<<6)
#define RBA_RESET			~(7 << 4)
#define SPAS_MASK			0xFF00FFFF
#define RBA_BUFFER0			(0 << 4)
#define RBA_BUFFER0			(0 << 4)
#define RBA_BUFFER1			(1 << 4)
#define RBA_BUFFER2			(2 << 4)
#define RBA_BUFFER3			(3 << 4)

/* command for LAUNCH_NFC */
#define LAUNCH_ADDRESS_INPUT		0x2
#define LAUNCH_COMMAND_INPUT		0x1
#define LAUNCH_READ_ID			0x10 
#define LAUNCH_READ_STATUS		0x1000
#define LAUNCH_AUTO_READ		0x80
#define LAUNCH_AUTO_ERASE		0x200
#define LAUNCH_AUTO_PRO			0x40


#define IS_4BIT_ECC			\
	((raw_read(NFC_CONFIGURATION2) & NFC_ECC_MODE_4)>>6)
	
#define WRITE_NFC_IP_REG(val,reg) \
	do {	 \
		raw_write(NFC_IPC_CREQ, NFC_IPC); \
		while(!((raw_read(NFC_IPC) & NFC_IPC_ACK)>>1));\
		raw_write(val, reg);\
		raw_write(0, NFC_IPC);\
	}while(0)

#define SET_SPAS(v)			\
	raw_write(((raw_read(NFC_CONFIGURATION2) & SPAS_MASK) | ((v)<<16)), \
	NFC_CONFIGURATION2)

#define NFC_SEL_RAM_BUFFER(val) \
	(raw_write((raw_read(NFC_CONFIGURATION1) & ~NFC_CONF1_RBA_MASK) | \
	(val << NFC_CONF1_RBA_SHIFT),NFC_CONFIGURATION1))
		
#define SPAS_64		(32) /* half word */
#define SPAS_128    (64) /* half word */

/*marco to detect the busy status*/
#define NFC_BUSY  (!( *(volatile u32 *)NFC_IPC & 0x80000000 ))

/*marco to define the raw_read/write*/
#define raw_read(addr) *(u32 *)((addr))
#define raw_write(val,addr) *((u32 *)(addr)) = (val)

/* main area for bad block marker*/
#define BAD_BLK_MARKER_OFFS      \
	(NAND_MAIN_BYTESIZE - (((((NAND_SPARE_BYTESIZE /(NAND_MAIN_BYTESIZE >> 9)) >> 1)) << 1) * \
	((NAND_MAIN_BYTESIZE >> 9) -1 )))
#define BAD_BLK_MARKER_MAIN 	(*((volatile u16 *)(NFC_MAB0_BASE + BAD_BLK_MARKER_OFFS)))
/* spare area for swapped main area data */
#define BAD_BLK_MARKER_SP_OFFS     \
	(((NAND_MAIN_BYTESIZE >> 9) - 1) * NFC_SAB_LEN)
#define BAD_BLK_MARKER_SP_0     (*((volatile u16 *)(NFC_SAB0_BASE + BAD_BLK_MARKER_SP_OFFS)))

#define NAND_MAIN_BYTESIZE          (nand->page_size)
extern nand_t* nand;
static u32 back_cmd;

/*!
 * Function to wait for basic NFC operation completion
 */
static u8 nfc_wait(void)
{
	while (1) {
		if (raw_read(NFC_IPC) & NFC_OPS_STAT) {
			WRITE_NFC_IP_REG((raw_read(NFC_IPC) & ~NFC_OPS_STAT), NFC_IPC);
			break;
		}
			
	}
	return 0;
			
}


/*!
 * Function to read status from nand flash register
 */
u32 nand_read_status(void)
{	
	u32 status;

        raw_write(LAUNCH_READ_STATUS,NFC_LAUNCH_NFC); 

	do {
		status = (raw_read(NFC_CONFIGURATION1) & 0x00FF0000) >> 16;
	} while ((status & 0x40) == 0); /*0x40: Busy */

  	return status;
}

/*!
 * Function to wait nand ready
 */
void nand_wait(void)
{
	while(!(NAND_STATUS_READY  & nand_read_status()));
}