📄 lpc213x.h
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/****************************************Copyright (c)**************************************************
** File name: LPC213X.h
** Last modified Date: 2005-12-05
** Last Version: 1.0
** Descriptions: Defines the special registers and firmware programs for
** lpc213x\
**
**------------------------------------------------------------------------------------------------------
** Created by: yuhaiguo
** Created date: 2005-12-05
** Version: 1.0
** Descriptions: The original version
**
**------------------------------------------------------------------------------------------------------
** Modified by:
** Modified date:
** Version:
** Descriptions:
**
********************************************************************************************************/
/* External Interrupts */
/* 外部中断控制寄存器 */
typedef union {
uint8 Reg8;
struct {
uint8 EINT0 :1;
uint8 EINT1 :1;
uint8 EINT2 :1;
uint8 EINT3 :1;
uint8 :4;
} Bits;
} EXTINTSTR;
/*extern volatile EXTINTSTR _EINT @0xE01FC140;*/
#define _EINT (*((volatile EXTINTSTR *) 0xE01FC140))
#define EXTINT _EINT.Reg8
#define EXTINT_EINT0 _EINT.Bits.EINT0
#define EXTINT_EINT1 _EINT.Bits.EINT1
#define EXTINT_EINT2 _EINT.Bits.EINT2
#define EXTINT_EINT3 _EINT.Bits.EINT3
typedef union {
uint16 Reg16;
struct {
uint16 EXTWAKE0 :1;
uint16 EXTWAKE1 :1;
uint16 EXTWAKE2 :1;
uint16 EXTWAKE3 :1;
uint16 :10;
uint16 BODWARK :1;
uint16 RTCWARK :1;
} Bits;
} EXTWAKESTR;
/*extern volatile EXTWAKESTR _EWAK @0xE01FC144;*/
#define _EWAK (*((volatile EXTWAKESTR *) 0xE01FC144))
#define EXTWAKE _EWAK.Reg16
#define EXTWAKE_EXTWAKE0 _EWAK.Bits.EXTWAKE0
#define EXTWAKE_EXTWAKE1 _EWAK.Bits.EXTWAKE1
#define EXTWAKE_EXTWAKE2 _EWAK.Bits.EXTWAKE2
#define EXTWAKE_EXTWAKE3 _EWAK.Bits.EXTWAKE3
#define EXTWAKE_BODWAKE _EWAK.Bits.BODWAKE
#define EXTWAKE_RTCWAKE _EWAK.Bits.RTCTWAKE
typedef union {
uint8 Reg8;
struct {
uint8 EXTMODE0 :1;
uint8 EXTMODE1 :1;
uint8 EXTMODE2 :1;
uint8 EXTMODE3 :1;
uint8 :4;
} Bits;
} EXTMODESTR;
/*extern volatile EXTMODESTR _EMOD @0xE01FC148;*/
#define _EMOD (*((volatile EXTMODESTR *) 0xE01FC148))
#define EXTMODE _EMOD.Reg8
#define EXTMODE_EXTMODE0 _EMOD.Bits.EXTMODE0
#define EXTMODE_EXTMODE1 _EMOD.Bits.EXTMODE1
#define EXTMODE_EXTMODE2 _EMOD.Bits.EXTMODE2
#define EXTMODE_EXTMODE3 _EMOD.Bits.EXTMODE3
typedef union {
uint8 Reg8;
struct {
uint8 EXTPOLAR0 :1;
uint8 EXTPOLAR1 :1;
uint8 EXTPOLAR2 :1;
uint8 EXTPOLAR3 :1;
uint8 :4;
} Bits;
} EXTPOLARSTR;
/*extern volatile EXTPOLARSTR _EPOL @0xE01FC148;*/
#define _EPOL (*((volatile EXTPOLARSTR *) 0xE01FC148))
#define EXTPOLAR _EPOL.Reg8
#define EXTPOLAR_EXTPOLAR0 _EPOL.Bits.EXTPOLAR0
#define EXTPOLAR_EXTPOLAR1 _EPOL.Bits.EXTPOLAR1
#define EXTPOLAR_EXTPOLAR2 _EPOL.Bits.EXTPOLAR2
#define EXTPOLAR_EXTPOLAR3 _EPOL.Bits.EXTPOLAR3
/* SMemory mapping control. */
/* 内存remap控制寄存器 */
typedef union {
uint8 Reg8;
struct {
uint8 MAP :2;
uint8 :6;
} Bits;
} MEMMAPSTR;
/*extern volatile MEMMAPSTR _MMAP @0xE01FC040;*/
#define _MMAP (*((volatile MEMMAPSTR *) 0xE01FC040))
#define MEMMAP _MMAP.Reg8
#define MEMMAP_MAP _MMAP.Bits.MAP
/* Phase Locked Loop (PLL) */
/* PLL控制寄存器 */
typedef union {
uint8 Reg8;
struct {
uint8 PLLE :1;
uint8 PLLC :1;
uint8 :6;
} Bits;
} PLLCONSTR;
/*extern volatile PLLCONSTR _PLCN @0xE01FC080;*/
#define _PLCN (*((volatile PLLCONSTR *) 0xE01FC080))
#define PLLCON _PLCN.Reg8
#define PLLCON_PLLE _PLCN.Bits.PLLE
#define PLLCON_PLLC _PLCN.Bits.PLLC
typedef union {
uint8 Reg8;
struct {
uint8 MSEL :5;
uint8 PSEL :2;
uint8 :1;
} Bits;
} PLLCFGSTR;
/*extern volatile PLLCFGSTR PLCF @0xE01FC084;*/
#define _PLCF (*((volatile PLLCFGSTR *) 0xE01FC084))
#define PLLCFG _PLCF.Reg8
#define PLLCFG_MSEL _PLCF.Bits.MSEL
#define PLLCFG_PSEL _PLCF.Bits.PSEL
typedef union {
uint16 Reg16;
struct {
uint16 MSEL :5;
uint16 PSEL :2;
uint16 :1;
uint16 PLLE :1;
uint16 PLLC :1;
uint16 PLOCK :1;
uint16 :1;
} Bits;
} PLLSTATSTR;
/*extern volatile PLLSTATSTR _PLST @0xE01FC088;*/
#define _PLST (*((volatile PLLSTATSTR *) 0xE01FC088))
#define PLLSTAT _PLST.Reg16
#define PLLSTAT_MSEL _PLST.Bits.MSEL
#define PLLSTAT_PSEL _PLST.Bits.PSEL
#define PLLSTAT_PLLE _PLST.Bits.PLLE
#define PLLSTAT_PLLC _PLST.Bits.PLLC
#define PLLSTAT_PLOCK _PLST.Bits.PLOCK
/*extern volatile uint8 PLLFEED @0xE01FC08C;*/
#define PLLFEED (*((volatile uint8 *) 0xE01FC08C))
/* Power Control */
/* 功率控制寄存器 */
typedef union {
uint8 Reg8;
struct {
uint8 IDL :1;
uint8 PD :1;
uint8 PDBOD :1;
} Bits;
} PCONSTR;
/*extern volatile PCONSTR _PCON @0xE01FC0C0;*/
#define _PCON (*((volatile PCONSTR *) 0xE01FC0C0))
#define PCON _PCON.Reg8
#define PCON_IDL _PCON.Bits.IDL
#define PCON_PD _PCON.Bits.PD
#define PCON_PDBOD _PCON.Bits.PDBOD
typedef union {
uint32 Reg32;
struct {
uint32 :1;
uint32 PCTIM0 :1;
uint32 PCTIM1 :1;
uint32 PCURT0 :1;
uint32 PCURT1 :1;
uint32 PCPWM0 :1;
uint32 :1;
uint32 PCI2C0 :1;
uint32 PCSPI0 :1;
uint32 PCRTC :1;
uint32 PCSPI1 :1;
uint32 :1;
uint32 PCAD0 :1;
uint32 :6;
uint32 PCI2C1 :1;
uint32 :12;
} Bits;
} PCONPSTR;
/*extern volatile PCONPSTR _PCNP @0xE01FC0C4;*/
#define _PCNP (*((volatile PCONPSTR *) 0xE01FC0C4))
#define PCONP _PCNP.Reg32
#define PCONP_PCTIM0 _PCNP.Bits.PCTIM0
#define PCONP_PCTIM1 _PCNP.Bits.PCTIM1
#define PCONP_PCURT0 _PCNP.Bits.PCURT0
#define PCONP_PCURT1 _PCNP.Bits.PCURT1
#define PCONP_PCURT0 _PCNP.Bits.PCURT0
#define PCONP_PCPWM0 _PCNP.Bits.PCPWM0
#define PCONP_PCI2C0 _PCNP.Bits.PCI2C0
#define PCONP_PCSPI0 _PCNP.Bits.PCSPI0
#define PCONP_PCRTC _PCNP.Bits.PCRTC
#define PCONP_PCSPI1 _PCNP.Bits.PCSPI1
#define PCONP_PCAD0 _PCNP.Bits.PCAD0
#define PCONP_PCI2C1 _PCNP.Bits.PCI2C1
/* Reset */
typedef union {
uint8 Reg8;
struct {
uint8 POR :1;
uint8 EXTR :1;
uint8 WDTR :1;
uint8 BODR :1;
} Bits;
} PSIRSTR;
/*extern volatile PCONSTR _PCON @0xE01FC0C0;*/
#define _PSIR (*((volatile PSIRSTR *) 0xE01FC180))
#define PSIR _PSIR.Reg8
#define PSIR_IPOR _PSIR.Bits.POR
#define PSIR_EXTR _PSIR.Bits.EXTR
#define PSIR_WDTR _PSIR.Bits.WDTR
#define PSIR_BODR _PSIR.Bits.BODR
/* Code Security / Debugging */
#define CSPR (*((volatile unsigned char *) 0xE01FC184))
/* VPB Divider */
/* VLSI外设总线（VPB）分频寄存器 */
typedef union {
uint8 Reg8;
struct {
uint8 DIV :2;
uint8 :6;
} Bits;
} VPBDIVSTR;
/*extern volatile VPBDIVSTR _VDIV @0xE01FC100;*/
#define _VDIV (*((volatile VPBDIVSTR *) 0xE01FC100))
#define VPBDIV _VDIV.Reg8
#define PPBDIV_DIV _VDIV.Bits.DIV
/* Memory Accelerator Module (MAM) */
/* 存储器加速模块 */
typedef union {
uint8 Reg8;
struct {
uint8 CON :2;
uint8 :6;
} Bits;
} MAMCRSTR;
/*extern volatile MAMCRSTR _MACR @0xE01FC000;*/
#define _MACR (*((volatile MAMCRSTR *) 0xE01FC000))
#define MAMCR _MACR.Reg8
#define MAMCR_CON _MACR.Bits.CON
typedef union {
uint8 Reg8;
struct {
uint8 TIM :3;
uint8 :5;
} Bits;
} MAMTIMSTR;
/*extern volatile MAMTIMSTR _MTIM @0xE01FC004;*/
#define _MTIM (*((volatile MAMTIMSTR *) 0xE01FC004))
#define MAMTIM _MTIM.Reg8
#define MAMTIM_TIM _MTIM.Bits.TIM
/* Vectored Interrupt Controller (VIC) */
/* 向量中断控制器(VIC)的特殊寄存器 */
typedef union {
uint32 Reg32;
struct {
uint32 WDT :1;
uint32 :1;
uint32 ARMC0 :1;
uint32 ARMC1 :1;
uint32 TIMER0 :1;
uint32 TIMER1 :1;
uint32 UART0 :1;
uint32 UART1 :1;
uint32 PWM0 :1;
uint32 I2C0 :1;
uint32 SPI0 :1;
uint32 SSP :1;
uint32 PLL :1;
uint32 RTC :1;
uint32 EINT0 :1;
uint32 EINT1 :1;
uint32 EINT2 :1;
uint32 EINT3 :1;
uint32 AD0 :1;
uint32 I2C1 :1;
uint32 BOD :1;
uint32 AD1 :1;
uint32 :10;
} Bits;
} VICSTR;
/*extern volatile VICSTR _RIQST @0xFFFFF000;*/
#define _RIQST (*((volatile VICSTR *) 0xFFFFF000))
#define VICRIQStatus _RIQST.Reg32
#define VICRIQStatus_WDT _RIQST.Bits.WDT
#define VICRIQStatus_ARMC0 _RIQST.Bits.ARMC0
#define VICRIQStatus_ARMC1 _RIQST.Bits.ARMC1
#define VICRIQStatus_TIME0 _RIQST.Bits.TIME0
#define VICRIQStatus_TIME1 _RIQST.Bits.TIME1
#define VICRIQStatus_UART0 _RIQST.Bits.UART0
#define VICRIQStatus_UART1 _RIQST.Bits.UART1
#define VICRIQStatus_PWM0 _RIQST.Bits.PWM0
#define VICRIQStatus_I2C0 _RIQST.Bits.I2C0
#define VICRIQStatus_SPI0 _RIQST.Bits.SPI0
#define VICRIQStatus_SSP _RIQST.Bits.SSP
#define VICRIQStatus_PLL _RIQST.Bits.PLL
#define VICRIQStatus_RTC _RIQST.Bits.RTC
#define VICRIQStatus_EINT0 _RIQST.Bits.EINT0
#define VICRIQStatus_EINT1 _RIQST.Bits.EINT1
#define VICRIQStatus_EINT2 _RIQST.Bits.EINT2
#define VICRIQStatus_EINT3 _RIQST.Bits.EINT3
#define VICRIQStatus_AD0 _RIQST.Bits.AD0
#define VICRIQStatus_I2C1 _RIQST.Bits.I2C1
#define VICRIQStatus_BOD _RIQST.Bits.BOD
#define VICRIQStatus_AD1 _RIQST.Bits.AD1
/*extern volatile VICSTR _FIQST @0xFFFFF004;*/
#define _FIQST (*((volatile VICSTR *) 0xFFFFF004))
#define VICFIQStatus _FIQST.Reg32
#define VICFIQStatus_WDT _FIQST.Bits.WDT
#define VICFIQStatus_ARMC0 _FIQST.Bits.ARMC0
#define VICFIQStatus_ARMC1 _FIQST.Bits.ARMC1
#define VICFIQStatus_TIME0 _FIQST.Bits.TIME0
#define VICFIQStatus_TIME1 _FIQST.Bits.TIME1
#define VICFIQStatus_UART0 _FIQST.Bits.UART0
#define VICFIQStatus_UART1 _FIQST.Bits.UART1
#define VICFIQStatus_PWM0 _FIQST.Bits.PWM0
#define VICFIQStatus_I2C0 _FIQST.Bits.I2C0
#define VICFIQStatus_SPI0 _FIQST.Bits.SPI0
#define VICFIQStatus_SSP _FIQST.Bits.SSP
#define VICFIQStatus_PLL _FIQST.Bits.PLL
#define VICFIQStatus_RTC _FIQST.Bits.RTC
#define VICFIQStatus_EINT0 _FIQST.Bits.EINT0
#define VICFIQStatus_EINT1 _FIQST.Bits.EINT1
#define VICFIQStatus_EINT2 _FIQST.Bits.EINT2
#define VICFIQStatus_EINT3 _FIQST.Bits.EINT3
#define VICFIQStatus_AD0 _FIQST.Bits.AD0
#define VICFIQStatus_I2C1 _FIQST.Bits.I2C1
#define VICFIQStatus_BOD _FIQST.Bits.BOD
#define VICFIQStatus_AD1 _FIQST.Bits.AD1
/*extern volatile VICSTR _RAWIN @0xFFFFF008; */
#define _RAWIN (*((volatile VICSTR *) 0xFFFFF008))
#define VICRawIntr_RAWIN.Reg32
#define VICRawIntr_WDT _RAWIN.Bits.WDT
#define VICRawIntr_ARMC0 _RAWIN.Bits.ARMC0
#define VICRawIntr_ARMC1 _RAWIN.Bits.ARMC1
#define VICRawIntr_TIME0 _RAWIN.Bits.TIME0
#define VICRawIntr_TIME1 _RAWIN.Bits.TIME1
#define VICRawIntr_UART0 _RAWIN.Bits.UART0
#define VICRawIntr_UART1 _RAWIN.Bits.UART1
#define VICRawIntr_PWM0 _RAWIN.Bits.PWM0
#define VICRawIntr_I2C0 _RAWIN.Bits.I2C0
#define VICRawIntr_SPI0 _RAWIN.Bits.SPI0
#define VICRawIntr_SSP _RAWIN.Bits.SSP
#define VICRawIntr_PLL _RAWIN.Bits.PLL
#define VICRawIntr_RTC _RAWIN.Bits.RTC
#define VICRawIntr_EINT0 _RAWIN.Bits.EINT0
#define VICRawIntr_EINT1 _RAWIN.Bits.EINT1
#define VICRawIntr_EINT2 _RAWIN.Bits.EINT2
#define VICRawIntr_EINT3 _RAWIN.Bits.EINT3
#define VICRawIntr_AD0 _RAWIN.Bits.AD0
#define VICRawIntr_I2C1 _RAWIN.Bits.I2C1
#define VICRawIntr_BOD _RAWIN.Bits.BOD
#define VICRawIntr_AD1 _RAWIN.Bits.AD1
/*extern volatile VICSTR _INTSL @0xFFFFF00C;*/
#define _INTSL (*((volatile VICSTR *) 0xFFFFF00C))
#define VICIntSelect _INTSL.Reg32
#define VICIntSelect_WDT _INTSL.Bits.WDT
#define VICIntSelect_ARMC0 _INTSL.Bits.ARMC0
#define VICIntSelect_ARMC1 _INTSL.Bits.ARMC1
#define VICIntSelect_TIME0 _INTSL.Bits.TIME0
#define VICIntSelect_TIME1 _INTSL.Bits.TIME1
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