📄 m6490def.inc
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.equ SEG328 = 4 ;
.equ SEG329 = 5 ;
.equ SEG330 = 6 ;
.equ SEG331 = 7 ;
; LCDDR17 - LCD Data Register 17
.equ SEG316 = 0 ;
.equ SEG317 = 1 ;
.equ SEG318 = 2 ;
.equ SEG319 = 3 ;
.equ SEG320 = 4 ;
.equ SEG321 = 5 ;
.equ SEG322 = 6 ;
.equ SEG323 = 7 ;
; LCDDR16 - LCD Data Register 16
.equ SEG308 = 0 ;
.equ SEG309 = 1 ;
.equ SEG310 = 2 ;
.equ SEG311 = 3 ;
.equ SEG312 = 4 ;
.equ SEG313 = 5 ;
.equ SEG314 = 6 ;
.equ SEG315 = 7 ;
; LCDDR15 - LCD Data Register 15
.equ SEG300 = 0 ;
.equ SEG301 = 1 ;
.equ SEG302 = 2 ;
.equ SEG303 = 3 ;
.equ SEG304 = 4 ;
.equ SEG305 = 5 ;
.equ SEG306 = 6 ;
.equ SEG307 = 7 ;
; LCDDR14 - LCD Data Register 14
.equ SEG232 = 0 ;
.equ SEG233 = 1 ;
.equ SEG234 = 2 ;
.equ SEG235 = 3 ;
.equ SEG236 = 4 ;
.equ SEG237 = 5 ;
.equ SEG238 = 6 ;
.equ SEG239 = 7 ;
; LCDDR13 - LCD Data Register 13
.equ SEG224 = 0 ;
.equ SEG225 = 1 ;
.equ SEG226 = 2 ;
.equ SEG227 = 3 ;
.equ SEG228 = 4 ;
.equ SEG229 = 5 ;
.equ SEG230 = 6 ;
.equ SEG231 = 7 ;
; LCDDR12 - LCD Data Register 12
.equ SEG216 = 0 ;
.equ SEG217 = 1 ;
.equ SEG218 = 2 ;
.equ SEG219 = 3 ;
.equ SEG220 = 4 ;
.equ SEG221 = 5 ;
.equ SEG222 = 6 ;
.equ SEG223 = 7 ;
; LCDDR11 - LCD Data Register 11
.equ SEG208 = 0 ;
.equ SEG209 = 1 ;
.equ SEG210 = 2 ;
.equ SEG211 = 3 ;
.equ SEG212 = 4 ;
.equ SEG213 = 5 ;
.equ SEG214 = 6 ;
.equ SEG215 = 7 ;
; LCDDR10 - LCD Data Register 10
.equ SEG200 = 0 ;
.equ SEG201 = 1 ;
.equ SEG202 = 2 ;
.equ SEG203 = 3 ;
.equ SEG204 = 4 ;
.equ SEG205 = 5 ;
.equ SEG206 = 6 ;
.equ SEG207 = 7 ;
; LCDDR9 - LCD Data Register 9
.equ SEG132 = 0 ;
.equ SEG133 = 1 ;
.equ SEG134 = 2 ;
.equ SEG135 = 3 ;
.equ SEG136 = 4 ;
.equ SEG137 = 5 ;
.equ SEG138 = 6 ;
.equ SEG139 = 7 ;
; LCDDR8 - LCD Data Register 8
.equ SEG124 = 0 ;
.equ SEG125 = 1 ;
.equ SEG126 = 2 ;
.equ SEG127 = 3 ;
.equ SEG128 = 4 ;
.equ SEG129 = 5 ;
.equ SEG130 = 6 ;
.equ SEG131 = 7 ;
; LCDDR7 - LCD Data Register 7
.equ SEG116 = 0 ;
.equ SEG117 = 1 ;
.equ SEG118 = 2 ;
.equ SEG119 = 3 ;
.equ SEG120 = 4 ;
.equ SEG121 = 5 ;
.equ SEG122 = 6 ;
.equ SEG123 = 7 ;
; LCDDR6 - LCD Data Register 6
.equ SEG108 = 0 ;
.equ SEG109 = 1 ;
.equ SEG110 = 2 ;
.equ SEG111 = 3 ;
.equ SEG112 = 4 ;
.equ SEG113 = 5 ;
.equ SEG114 = 6 ;
.equ SEG115 = 7 ;
; LCDDR5 - LCD Data Register 5
.equ SEG100 = 0 ;
.equ SEG101 = 1 ;
.equ SEG102 = 2 ;
.equ SEG103 = 3 ;
.equ SEG104 = 4 ;
.equ SEG105 = 5 ;
.equ SEG106 = 6 ;
.equ SEG107 = 7 ;
; LCDDR4 - LCD Data Register 4
.equ SEG032 = 0 ;
.equ SEG033 = 1 ;
.equ SEG034 = 2 ;
.equ SEG035 = 3 ;
.equ SEG036 = 4 ;
.equ SEG037 = 5 ;
.equ SEG038 = 6 ;
.equ SEG039 = 7 ;
; LCDDR3 - LCD Data Register 3
.equ SEG024 = 0 ;
.equ SEG025 = 1 ;
.equ SEG026 = 2 ;
.equ SEG027 = 3 ;
.equ SEG028 = 4 ;
.equ SEG029 = 5 ;
.equ SEG030 = 6 ;
.equ SEG031 = 7 ;
; LCDDR2 - LCD Data Register 2
.equ SEG016 = 0 ;
.equ SEG017 = 1 ;
.equ SEG018 = 2 ;
.equ SEG019 = 3 ;
.equ SEG020 = 4 ;
.equ SEG021 = 5 ;
.equ SEG022 = 6 ;
.equ SEG023 = 7 ;
; LCDDR1 - LCD Data Register 1
.equ SEG008 = 0 ;
.equ SEG009 = 1 ;
.equ SEG010 = 2 ;
.equ SEG011 = 3 ;
.equ SEG012 = 4 ;
.equ SEG013 = 5 ;
.equ SEG014 = 6 ;
.equ SEG015 = 7 ;
; LCDDR0 - LCD Data Register 0
.equ SEG000 = 0 ;
.equ SEG001 = 1 ;
.equ SEG002 = 2 ;
.equ SEG003 = 3 ;
.equ SEG004 = 4 ;
.equ SEG005 = 5 ;
.equ SEG006 = 6 ;
.equ SEG007 = 7 ;
; ***** EXTERNAL_INTERRUPT ***********
; EICRA - External Interrupt Control Register A
.equ ISC00 = 0 ; External Interrupt Sense Control 0 Bit 0
.equ ISC01 = 1 ; External Interrupt Sense Control 0 Bit 1
; EIMSK - External Interrupt Mask Register
.equ INT0 = 0 ; External Interrupt Request 0 Enable
.equ PCIE0 = 4 ; Pin Change Interrupt Enable 0
.equ PCIE1 = 5 ; Pin Change Interrupt Enable 1
.equ PCIE2 = 6 ; Pin Change Interrupt Enable 2
.equ PCIE3 = 7 ; Pin Change Interrupt Enable 3
; EIFR - External Interrupt Flag Register
.equ INTF0 = 0 ; External Interrupt Flag 0
.equ PCIF0 = 4 ; Pin Change Interrupt Flag 0
.equ PCIF1 = 5 ; Pin Change Interrupt Flag 1
.equ PCIF2 = 6 ; Pin Change Interrupt Flag 2
.equ PCIF3 = 7 ; Pin Change Interrupt Flag 3
; PCMSK3 - Pin Change Mask Register 3
.equ PCINT24 = 0 ; Pin Change Enable Mask 24
.equ PCINT25 = 1 ; Pin Change Enable Mask 25
.equ PCINT26 = 2 ; Pin Change Enable Mask 26
.equ PCINT27 = 3 ; Pin Change Enable Mask 27
.equ PCINT28 = 4 ; Pin Change Enable Mask 28
.equ PCINT29 = 5 ; Pin Change Enable Mask 29
.equ PCINT30 = 6 ; Pin Change Enable Mask 30
; PCMSK2 - Pin Change Mask Register 2
.equ PCINT16 = 0 ; Pin Change Enable Mask 16
.equ PCINT17 = 1 ; Pin Change Enable Mask 17
.equ PCINT18 = 2 ; Pin Change Enable Mask 18
.equ PCINT19 = 3 ; Pin Change Enable Mask 19
.equ PCINT20 = 4 ; Pin Change Enable Mask 20
.equ PCINT21 = 5 ; Pin Change Enable Mask 21
.equ PCINT22 = 6 ; Pin Change Enable Mask 22
.equ PCINT23 = 7 ; Pin Change Enable Mask 23
; PCMSK1 - Pin Change Mask Register 1
.equ PCINT8 = 0 ; Pin Change Enable Mask 8
.equ PCINT9 = 1 ; Pin Change Enable Mask 9
.equ PCINT10 = 2 ; Pin Change Enable Mask 10
.equ PCINT11 = 3 ; Pin Change Enable Mask 11
.equ PCINT12 = 4 ; Pin Change Enable Mask 12
.equ PCINT13 = 5 ; Pin Change Enable Mask 13
.equ PCINT14 = 6 ; Pin Change Enable Mask 14
.equ PCINT15 = 7 ; Pin Change Enable Mask 15
; PCMSK0 - Pin Change Mask Register 0
.equ PCINT0 = 0 ; Pin Change Enable Mask 0
.equ PCINT1 = 1 ; Pin Change Enable Mask 1
.equ PCINT2 = 2 ; Pin Change Enable Mask 2
.equ PCINT3 = 3 ; Pin Change Enable Mask 3
.equ PCINT4 = 4 ; Pin Change Enable Mask 4
.equ PCINT5 = 5 ; Pin Change Enable Mask 5
.equ PCINT6 = 6 ; Pin Change Enable Mask 6
.equ PCINT7 = 7 ; Pin Change Enable Mask 7
; ***** LOCKSBITS ********************************************************
.equ LB1 = 0 ; Lock bit
.equ LB2 = 1 ; Lock bit
.equ BLB01 = 2 ; Boot Lock bit
.equ BLB02 = 3 ; Boot Lock bit
.equ BLB11 = 4 ; Boot lock bit
.equ BLB12 = 5 ; Boot lock bit
; ***** FUSES ************************************************************
; LOW fuse bits
.equ CKSEL0 = 0 ; Select Clock Source
.equ CKSEL1 = 1 ; Select Clock Source
.equ CKSEL2 = 2 ; Select Clock Source
.equ CKSEL3 = 3 ; Select Clock Source
.equ SUT0 = 4 ; Select start-up time
.equ SUT1 = 5 ; Select start-up time
.equ CKOUT = 6 ; Oscillator options
.equ CKDIV8 = 7 ; Divide clock by 8
; HIGH fuse bits
.equ BOOTRST = 0 ; Select Reset Vector
.equ BOOTSZ0 = 1 ; Select Boot Size
.equ BOOTSZ1 = 2 ; Select Boot Size
.equ EESAVE = 3 ; EEPROM memory is preserved through chip erase
.equ WDTON = 4 ; Watchdog timer always on
.equ SPIEN = 5 ; Enable Serial programming and Data Downloading
.equ JTAGEN = 6 ; Enable JTAG
.equ OCDEN = 7 ; Enable OCD
; EXTENDED fuse bits
.equ RESERVED = 0 ; Reserved fuse bit, do not program
.equ BODLEVEL0 = 1 ; Brown-out Detector trigger level
.equ BODLEVEL1 = 2 ; Brown-out Detector trigger level
; ***** CPU REGISTER DEFINITIONS *****************************************
.def XH = r27
.def XL = r26
.def YH = r29
.def YL = r28
.def ZH = r31
.def ZL = r30
; ***** DATA MEMORY DECLARATIONS *****************************************
.equ FLASHEND = 0x7fff ; Note: Word address
.equ IOEND = 0x00ff
.equ SRAM_START = 0x0100
.equ SRAM_SIZE = 4096
.equ RAMEND = 0x10ff
.equ XRAMEND = 0x0000
.equ E2END = 0x07ff
.equ EEPROMEND = 0x07ff
.equ EEADRBITS = 11
#pragma AVRPART MEMORY PROG_FLASH 65536
#pragma AVRPART MEMORY EEPROM 2048
#pragma AVRPART MEMORY INT_SRAM SIZE 4096
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
; ***** BOOTLOADER DECLARATIONS ******************************************
.equ NRWW_START_ADDR = 0x7000
.equ NRWW_STOP_ADDR = 0x7fff
.equ RWW_START_ADDR = 0x0
.equ RWW_STOP_ADDR = 0x6fff
.equ PAGESIZE = 128
.equ FIRSTBOOTSTART = 0x7e00
.equ SECONDBOOTSTART = 0x7c00
.equ THIRDBOOTSTART = 0x7800
.equ FOURTHBOOTSTART = 0x7000
.equ SMALLBOOTSTART = FIRSTBOOTSTART
.equ LARGEBOOTSTART = FOURTHBOOTSTART
; ***** INTERRUPT VECTORS ************************************************
.equ INT0addr = 0x0002 ; External Interrupt Request 0
.equ PCI0addr = 0x0004 ; Pin Change Interrupt Request 0
.equ PCI1addr = 0x0006 ; Pin Change Interrupt Request 1
.equ OC2addr = 0x0008 ; Timer/Counter2 Compare Match
.equ OVF2addr = 0x000a ; Timer/Counter2 Overflow
.equ ICP1addr = 0x000c ; Timer/Counter1 Capture Event
.equ OC1Aaddr = 0x000e ; Timer/Counter1 Compare Match A
.equ OC1Baddr = 0x0010 ; Timer/Counter Compare Match B
.equ OVF1addr = 0x0012 ; Timer/Counter1 Overflow
.equ OC0addr = 0x0014 ; Timer/Counter0 Compare Match
.equ OVF0addr = 0x0016 ; Timer/Counter0 Overflow
.equ SPIaddr = 0x0018 ; SPI Serial Transfer Complete
.equ URXCaddr = 0x001a ; USART, Rx Complete
.equ URXC0addr = 0x001a ; For compatibility
.equ UDREaddr = 0x001c ; USART Data register Empty
.equ UDRE0addr = 0x001c ; For compatibility
.equ UTXC0addr = 0x001e ; USART0, Tx Complete
.equ UTXCaddr = 0x001e ; For compatibility
.equ USI_STARTaddr = 0x0020 ; USI Start Condition
.equ USI_OVFaddr = 0x0022 ; USI Overflow
.equ ACIaddr = 0x0024 ; Analog Comparator
.equ ADCCaddr = 0x0026 ; ADC Conversion Complete
.equ ERDYaddr = 0x0028 ; EEPROM Ready
.equ SPMRaddr = 0x002a ; Store Program Memory Read
.equ LCDSFaddr = 0x002c ; LCD Start of Frame
.equ PCI2addr = 0x002e ; Pin Change Interrupt Request 2
.equ PCI3addr = 0x0030 ; Pin Change Interrupt Request 3
.equ INT_VECTORS_SIZE = 50 ; size in words
#endif /* _M6490DEF_INC_ */
; ***** END OF FILE ******************************************************
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