m3290def.inc

AVR Assembler 2 compiler

.equ	SEG337	= 5	; 
.equ	SEG338	= 6	; 
.equ	SEG339	= 7	; 

; LCDDR18 - LCD Data Register 18
.equ	SEG324	= 0	; 
.equ	SEG325	= 1	; 
.equ	SEG326	= 2	; 
.equ	SEG327	= 3	; 
.equ	SEG328	= 4	; 
.equ	SEG329	= 5	; 
.equ	SEG330	= 6	; 
.equ	SEG331	= 7	; 

; LCDDR17 - LCD Data Register 17
.equ	SEG316	= 0	; 
.equ	SEG317	= 1	; 
.equ	SEG318	= 2	; 
.equ	SEG319	= 3	; 
.equ	SEG320	= 4	; 
.equ	SEG321	= 5	; 
.equ	SEG322	= 6	; 
.equ	SEG323	= 7	; 

; LCDDR16 - LCD Data Register 16
.equ	SEG308	= 0	; 
.equ	SEG309	= 1	; 
.equ	SEG310	= 2	; 
.equ	SEG311	= 3	; 
.equ	SEG312	= 4	; 
.equ	SEG313	= 5	; 
.equ	SEG314	= 6	; 
.equ	SEG315	= 7	; 

; LCDDR15 - LCD Data Register 15
.equ	SEG300	= 0	; 
.equ	SEG301	= 1	; 
.equ	SEG302	= 2	; 
.equ	SEG303	= 3	; 
.equ	SEG304	= 4	; 
.equ	SEG305	= 5	; 
.equ	SEG306	= 6	; 
.equ	SEG307	= 7	; 

; LCDDR14 - LCD Data Register 14
.equ	SEG232	= 0	; 
.equ	SEG233	= 1	; 
.equ	SEG234	= 2	; 
.equ	SEG235	= 3	; 
.equ	SEG236	= 4	; 
.equ	SEG237	= 5	; 
.equ	SEG238	= 6	; 
.equ	SEG239	= 7	; 

; LCDDR13 - LCD Data Register 13
.equ	SEG224	= 0	; 
.equ	SEG225	= 1	; 
.equ	SEG226	= 2	; 
.equ	SEG227	= 3	; 
.equ	SEG228	= 4	; 
.equ	SEG229	= 5	; 
.equ	SEG230	= 6	; 
.equ	SEG231	= 7	; 

; LCDDR12 - LCD Data Register 12
.equ	SEG216	= 0	; 
.equ	SEG217	= 1	; 
.equ	SEG218	= 2	; 
.equ	SEG219	= 3	; 
.equ	SEG220	= 4	; 
.equ	SEG221	= 5	; 
.equ	SEG222	= 6	; 
.equ	SEG223	= 7	; 

; LCDDR11 - LCD Data Register 11
.equ	SEG208	= 0	; 
.equ	SEG209	= 1	; 
.equ	SEG210	= 2	; 
.equ	SEG211	= 3	; 
.equ	SEG212	= 4	; 
.equ	SEG213	= 5	; 
.equ	SEG214	= 6	; 
.equ	SEG215	= 7	; 

; LCDDR10 - LCD Data Register 10
.equ	SEG200	= 0	; 
.equ	SEG201	= 1	; 
.equ	SEG202	= 2	; 
.equ	SEG203	= 3	; 
.equ	SEG204	= 4	; 
.equ	SEG205	= 5	; 
.equ	SEG206	= 6	; 
.equ	SEG207	= 7	; 

; LCDDR9 - LCD Data Register 9
.equ	SEG132	= 0	; 
.equ	SEG133	= 1	; 
.equ	SEG134	= 2	; 
.equ	SEG135	= 3	; 
.equ	SEG136	= 4	; 
.equ	SEG137	= 5	; 
.equ	SEG138	= 6	; 
.equ	SEG139	= 7	; 

; LCDDR8 - LCD Data Register 8
.equ	SEG124	= 0	; 
.equ	SEG125	= 1	; 
.equ	SEG126	= 2	; 
.equ	SEG127	= 3	; 
.equ	SEG128	= 4	; 
.equ	SEG129	= 5	; 
.equ	SEG130	= 6	; 
.equ	SEG131	= 7	; 

; LCDDR7 - LCD Data Register 7
.equ	SEG116	= 0	; 
.equ	SEG117	= 1	; 
.equ	SEG118	= 2	; 
.equ	SEG119	= 3	; 
.equ	SEG120	= 4	; 
.equ	SEG121	= 5	; 
.equ	SEG122	= 6	; 
.equ	SEG123	= 7	; 

; LCDDR6 - LCD Data Register 6
.equ	SEG108	= 0	; 
.equ	SEG109	= 1	; 
.equ	SEG110	= 2	; 
.equ	SEG111	= 3	; 
.equ	SEG112	= 4	; 
.equ	SEG113	= 5	; 
.equ	SEG114	= 6	; 
.equ	SEG115	= 7	; 

; LCDDR5 - LCD Data Register 5
.equ	SEG100	= 0	; 
.equ	SEG101	= 1	; 
.equ	SEG102	= 2	; 
.equ	SEG103	= 3	; 
.equ	SEG104	= 4	; 
.equ	SEG105	= 5	; 
.equ	SEG106	= 6	; 
.equ	SEG107	= 7	; 

; LCDDR4 - LCD Data Register 4
.equ	SEG032	= 0	; 
.equ	SEG033	= 1	; 
.equ	SEG034	= 2	; 
.equ	SEG035	= 3	; 
.equ	SEG036	= 4	; 
.equ	SEG037	= 5	; 
.equ	SEG038	= 6	; 
.equ	SEG039	= 7	; 

; LCDDR3 - LCD Data Register 3
.equ	SEG024	= 0	; 
.equ	SEG025	= 1	; 
.equ	SEG026	= 2	; 
.equ	SEG027	= 3	; 
.equ	SEG028	= 4	; 
.equ	SEG029	= 5	; 
.equ	SEG030	= 6	; 
.equ	SEG031	= 7	; 

; LCDDR2 - LCD Data Register 2
.equ	SEG016	= 0	; 
.equ	SEG017	= 1	; 
.equ	SEG018	= 2	; 
.equ	SEG019	= 3	; 
.equ	SEG020	= 4	; 
.equ	SEG021	= 5	; 
.equ	SEG022	= 6	; 
.equ	SEG023	= 7	; 

; LCDDR1 - LCD Data Register 1
.equ	SEG008	= 0	; 
.equ	SEG009	= 1	; 
.equ	SEG010	= 2	; 
.equ	SEG011	= 3	; 
.equ	SEG012	= 4	; 
.equ	SEG013	= 5	; 
.equ	SEG014	= 6	; 
.equ	SEG015	= 7	; 

; LCDDR0 - LCD Data Register 0
.equ	SEG000	= 0	; 
.equ	SEG001	= 1	; 
.equ	SEG002	= 2	; 
.equ	SEG003	= 3	; 
.equ	SEG004	= 4	; 
.equ	SEG005	= 5	; 
.equ	SEG006	= 6	; 
.equ	SEG007	= 7	; 


; ***** EXTERNAL_INTERRUPT ***********
; EICRA - External Interrupt Control Register A
.equ	ISC00	= 0	; External Interrupt Sense Control 0 Bit 0
.equ	ISC01	= 1	; External Interrupt Sense Control 0 Bit 1

; EIMSK - External Interrupt Mask Register
.equ	INT0	= 0	; External Interrupt Request 0 Enable
.equ	PCIE0	= 4	; Pin Change Interrupt Enable 0
.equ	PCIE1	= 5	; Pin Change Interrupt Enable 1
.equ	PCIE2	= 6	; Pin Change Interrupt Enable 2
.equ	PCIE3	= 7	; Pin Change Interrupt Enable 3

; EIFR - External Interrupt Flag Register
.equ	INTF0	= 0	; External Interrupt Flag 0
.equ	PCIF0	= 4	; Pin Change Interrupt Flag 0
.equ	PCIF1	= 5	; Pin Change Interrupt Flag 1
.equ	PCIF2	= 6	; Pin Change Interrupt Flag 2
.equ	PCIF3	= 7	; Pin Change Interrupt Flag 3

; PCMSK3 - Pin Change Mask Register 3
.equ	PCINT24	= 0	; Pin Change Enable Mask 24
.equ	PCINT25	= 1	; Pin Change Enable Mask 25
.equ	PCINT26	= 2	; Pin Change Enable Mask 26
.equ	PCINT27	= 3	; Pin Change Enable Mask 27
.equ	PCINT28	= 4	; Pin Change Enable Mask 28
.equ	PCINT29	= 5	; Pin Change Enable Mask 29
.equ	PCINT30	= 6	; Pin Change Enable Mask 30

; PCMSK2 - Pin Change Mask Register 2
.equ	PCINT16	= 0	; Pin Change Enable Mask 16
.equ	PCINT17	= 1	; Pin Change Enable Mask 17
.equ	PCINT18	= 2	; Pin Change Enable Mask 18
.equ	PCINT19	= 3	; Pin Change Enable Mask 19
.equ	PCINT20	= 4	; Pin Change Enable Mask 20
.equ	PCINT21	= 5	; Pin Change Enable Mask 21
.equ	PCINT22	= 6	; Pin Change Enable Mask 22
.equ	PCINT23	= 7	; Pin Change Enable Mask 23

; PCMSK1 - Pin Change Mask Register 1
.equ	PCINT8	= 0	; Pin Change Enable Mask 8
.equ	PCINT9	= 1	; Pin Change Enable Mask 9
.equ	PCINT10	= 2	; Pin Change Enable Mask 10
.equ	PCINT11	= 3	; Pin Change Enable Mask 11
.equ	PCINT12	= 4	; Pin Change Enable Mask 12
.equ	PCINT13	= 5	; Pin Change Enable Mask 13
.equ	PCINT14	= 6	; Pin Change Enable Mask 14
.equ	PCINT15	= 7	; Pin Change Enable Mask 15

; PCMSK0 - Pin Change Mask Register 0
.equ	PCINT0	= 0	; Pin Change Enable Mask 0
.equ	PCINT1	= 1	; Pin Change Enable Mask 1
.equ	PCINT2	= 2	; Pin Change Enable Mask 2
.equ	PCINT3	= 3	; Pin Change Enable Mask 3
.equ	PCINT4	= 4	; Pin Change Enable Mask 4
.equ	PCINT5	= 5	; Pin Change Enable Mask 5
.equ	PCINT6	= 6	; Pin Change Enable Mask 6
.equ	PCINT7	= 7	; Pin Change Enable Mask 7


; ***** CPU **************************
; SREG - Status Register
.equ	SREG_C	= 0	; Carry Flag
.equ	SREG_Z	= 1	; Zero Flag
.equ	SREG_N	= 2	; Negative Flag
.equ	SREG_V	= 3	; Two's Complement Overflow Flag
.equ	SREG_S	= 4	; Sign Bit
.equ	SREG_H	= 5	; Half Carry Flag
.equ	SREG_T	= 6	; Bit Copy Storage
.equ	SREG_I	= 7	; Global Interrupt Enable

; MCUCR - MCU Control Register
.equ	IVCE	= 0	; Interrupt Vector Change Enable
.equ	IVSEL	= 1	; Interrupt Vector Select
.equ	PUD	= 4	; Pull-up disable

; MCUSR - MCU Status Register
.equ	PORF	= 0	; Power-on reset flag
.equ	EXTRF	= 1	; External Reset Flag
.equ	BORF	= 2	; Brown-out Reset Flag
.equ	WDRF	= 3	; Watchdog Reset Flag
;.equ	JTRF	= 4	; JTAG Reset Flag

; OSCCAL - Oscillator Calibration Value
.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
.equ	CAL7	= 7	; Oscillator Calibration Value Bit7

; CLKPR - Clock Prescale Register
.equ	CLKPS0	= 0	; Clock Prescaler Select Bit 0
.equ	CLKPS1	= 1	; Clock Prescaler Select Bit 1
.equ	CLKPS2	= 2	; Clock Prescaler Select Bit 2
.equ	CLKPS3	= 3	; Clock Prescaler Select Bit 3
.equ	CLKPCE	= 7	; Clock Prescaler Change Enable

; PRR - Power Reduction Register
.equ	PRADC	= 0	; Power Reduction ADC
.equ	PRUSART0	= 1	; Power Reduction USART
.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
.equ	PRLCD	= 4	; Power Reduction LCD

; SMCR - Sleep Mode Control Register
.equ	SE	= 0	; Sleep Enable
.equ	SM0	= 1	; Sleep Mode Select bit 0
.equ	SM1	= 2	; Sleep Mode Select bit 1
.equ	SM2	= 3	; Sleep Mode Select bit 2

; GPIOR2 - General Purpose IO Register 2
.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7

; GPIOR1 - General Purpose IO Register 1
.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7

; GPIOR0 - General Purpose IO Register 0
.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7


; ***** USI **************************
; USIDR - USI Data Register
.equ	USIDR0	= 0	; USI Data Register bit 0
.equ	USIDR1	= 1	; USI Data Register bit 1
.equ	USIDR2	= 2	; USI Data Register bit 2
.equ	USIDR3	= 3	; USI Data Register bit 3
.equ	USIDR4	= 4	; USI Data Register bit 4
.equ	USIDR5	= 5	; USI Data Register bit 5
.equ	USIDR6	= 6	; USI Data Register bit 6
.equ	USIDR7	= 7	; USI Data Register bit 7

; USISR - USI Status Register
.equ	USICNT0	= 0	; USI Counter Value Bit 0
.equ	USICNT1	= 1	; USI Counter Value Bit 1
.equ	USICNT2	= 2	; USI Counter Value Bit 2
.equ	USICNT3	= 3	; USI Counter Value Bit 3
.equ	USIDC	= 4	; Data Output Collision
.equ	USIPF	= 5	; Stop Condition Flag
.equ	USIOIF	= 6	; Counter Overflow Interrupt Flag
.equ	USISIF	= 7	; Start Condition Interrupt Flag

; USICR - USI Control Register
.equ	USITC	= 0	; Toggle Clock Port Pin