📄 usb162def.inc
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.equ GPIOR04 = 4 ; General Purpose IO Register 0 bit 4
.equ GPIOR05 = 5 ; General Purpose IO Register 0 bit 5
.equ GPIOR06 = 6 ; General Purpose IO Register 0 bit 6
.equ GPIOR07 = 7 ; General Purpose IO Register 0 bit 7
; PRR1 - Power Reduction Register1
.equ PRUSART1 = 0 ; Power Reduction USART1
.equ PRUSB = 7 ; Power Reduction USB
; PRR0 - Power Reduction Register0
.equ PRSPI = 2 ; Power Reduction Serial Peripheral Interface
.equ PRTIM1 = 3 ; Power Reduction Timer/Counter1
.equ PRTIM0 = 5 ; Power Reduction Timer/Counter0
; CKSTA -
.equ EXTON = 0 ;
.equ RCON = 1 ;
; CKSEL1 -
.equ EXCKSEL0 = 0 ;
.equ EXCKSEL1 = 1 ;
.equ EXCKSEL2 = 2 ;
.equ EXCKSEL3 = 3 ;
.equ RCCKSEL0 = 4 ;
.equ RCCKSEL1 = 5 ;
.equ RCCKSEL2 = 6 ;
.equ RCCKSEL3 = 7 ;
; CKSEL0 -
.equ CLKS = 0 ;
.equ EXTE = 2 ;
.equ RCE = 3 ;
.equ EXSUT0 = 4 ;
.equ EXSUT1 = 5 ;
.equ RCSUT0 = 6 ;
.equ RCSUT1 = 7 ;
; DWDR - debugWire communication register
.equ DWDR0 = 0 ;
.equ DWDR1 = 1 ;
.equ DWDR2 = 2 ;
.equ DWDR3 = 3 ;
.equ DWDR4 = 4 ;
.equ DWDR5 = 5 ;
.equ DWDR6 = 6 ;
.equ DWDR7 = 7 ;
; ***** EXTERNAL_INTERRUPT ***********
; EICRA - External Interrupt Control Register A
.equ ISC00 = 0 ; External Interrupt Sense Control Bit
.equ ISC01 = 1 ; External Interrupt Sense Control Bit
.equ ISC10 = 2 ; External Interrupt Sense Control Bit
.equ ISC11 = 3 ; External Interrupt Sense Control Bit
.equ ISC20 = 4 ; External Interrupt Sense Control Bit
.equ ISC21 = 5 ; External Interrupt Sense Control Bit
.equ ISC30 = 6 ; External Interrupt Sense Control Bit
.equ ISC31 = 7 ; External Interrupt Sense Control Bit
; EICRB - External Interrupt Control Register B
.equ ISC40 = 0 ; External Interrupt 7-4 Sense Control Bit
.equ ISC41 = 1 ; External Interrupt 7-4 Sense Control Bit
.equ ISC50 = 2 ; External Interrupt 7-4 Sense Control Bit
.equ ISC51 = 3 ; External Interrupt 7-4 Sense Control Bit
.equ ISC60 = 4 ; External Interrupt 7-4 Sense Control Bit
.equ ISC61 = 5 ; External Interrupt 7-4 Sense Control Bit
.equ ISC70 = 6 ; External Interrupt 7-4 Sense Control Bit
.equ ISC71 = 7 ; External Interrupt 7-4 Sense Control Bit
; EIMSK - External Interrupt Mask Register
.equ INT0 = 0 ; External Interrupt Request 0 Enable
.equ INT1 = 1 ; External Interrupt Request 1 Enable
.equ INT2 = 2 ; External Interrupt Request 2 Enable
.equ INT3 = 3 ; External Interrupt Request 3 Enable
.equ INT4 = 4 ; External Interrupt Request 4 Enable
.equ INT5 = 5 ; External Interrupt Request 5 Enable
.equ INT6 = 6 ; External Interrupt Request 6 Enable
.equ INT7 = 7 ; External Interrupt Request 7 Enable
; EIFR - External Interrupt Flag Register
.equ INTF0 = 0 ; External Interrupt Flag 0
.equ INTF1 = 1 ; External Interrupt Flag 1
.equ INTF2 = 2 ; External Interrupt Flag 2
.equ INTF3 = 3 ; External Interrupt Flag 3
.equ INTF4 = 4 ; External Interrupt Flag 4
.equ INTF5 = 5 ; External Interrupt Flag 5
.equ INTF6 = 6 ; External Interrupt Flag 6
.equ INTF7 = 7 ; External Interrupt Flag 7
; PCICR - Pin Change Interrupt Control Register
.equ PCIE0 = 0 ; Pin Change Interrupt Enable 0
.equ PCIE1 = 1 ; Pin Change Interrupt Enable 1
; PCIFR - Pin Change Interrupt Flag Register
.equ PCIF0 = 0 ; Pin Change Interrupt Flag 0
.equ PCIF1 = 1 ; Pin Change Interrupt Flag 1
; PCMSK0 - Pin Change Mask Register 0
.equ PCINT0 = 0 ; Pin Change Enable Mask 0
.equ PCINT1 = 1 ; Pin Change Enable Mask 1
.equ PCINT2 = 2 ; Pin Change Enable Mask 2
.equ PCINT3 = 3 ; Pin Change Enable Mask 3
.equ PCINT4 = 4 ; Pin Change Enable Mask 4
.equ PCINT5 = 5 ; Pin Change Enable Mask 5
.equ PCINT6 = 6 ; Pin Change Enable Mask 6
.equ PCINT7 = 7 ; Pin Change Enable Mask 7
; PCMSK1 - Pin Change Mask Register 1
.equ PCINT8 = 0 ;
.equ PCINT9 = 1 ;
.equ PCINT10 = 2 ;
.equ PCINT11 = 3 ;
.equ PCINT12 = 4 ;
; ***** USART1 ***********************
; UDR1 - USART I/O Data Register
.equ UDR1_0 = 0 ; USART I/O Data Register bit 0
.equ UDR1_1 = 1 ; USART I/O Data Register bit 1
.equ UDR1_2 = 2 ; USART I/O Data Register bit 2
.equ UDR1_3 = 3 ; USART I/O Data Register bit 3
.equ UDR1_4 = 4 ; USART I/O Data Register bit 4
.equ UDR1_5 = 5 ; USART I/O Data Register bit 5
.equ UDR1_6 = 6 ; USART I/O Data Register bit 6
.equ UDR1_7 = 7 ; USART I/O Data Register bit 7
; UCSR1A - USART Control and Status Register A
.equ MPCM1 = 0 ; Multi-processor Communication Mode
.equ U2X1 = 1 ; Double the USART transmission speed
.equ UPE1 = 2 ; Parity Error
.equ DOR1 = 3 ; Data overRun
.equ FE1 = 4 ; Framing Error
.equ UDRE1 = 5 ; USART Data Register Empty
.equ TXC1 = 6 ; USART Transmitt Complete
.equ RXC1 = 7 ; USART Receive Complete
; UCSR1B - USART Control and Status Register B
.equ TXB81 = 0 ; Transmit Data Bit 8
.equ RXB81 = 1 ; Receive Data Bit 8
.equ UCSZ12 = 2 ; Character Size
.equ TXEN1 = 3 ; Transmitter Enable
.equ RXEN1 = 4 ; Receiver Enable
.equ UDRIE1 = 5 ; USART Data register Empty Interrupt Enable
.equ TXCIE1 = 6 ; TX Complete Interrupt Enable
.equ RXCIE1 = 7 ; RX Complete Interrupt Enable
; UCSR1C - USART Control and Status Register C
.equ UCPOL1 = 0 ; Clock Polarity
.equ UCSZ10 = 1 ; Character Size
.equ UCSZ11 = 2 ; Character Size
.equ USBS1 = 3 ; Stop Bit Select
.equ UPM10 = 4 ; Parity Mode Bit 0
.equ UPM11 = 5 ; Parity Mode Bit 1
.equ UMSEL10 = 6 ; USART Mode Select
.equ UMSEL11 = 7 ; USART Mode Select
; UCSR1D - USART Control and Status Register D
.equ RTSEN = 0 ; RTS Enable
.equ CTSEN = 1 ; CTS Enable
; UBRR1H - USART Baud Rate Register High Byte
.equ UBRR8 = 0 ; USART Baud Rate Register bit 8
.equ UBRR9 = 1 ; USART Baud Rate Register bit 9
.equ UBRR10 = 2 ; USART Baud Rate Register bit 10
.equ UBRR11 = 3 ; USART Baud Rate Register bit 11
; UBRR1L - USART Baud Rate Register Low Byte
.equ UBRR0 = 0 ; USART Baud Rate Register bit 0
.equ UBRR1 = 1 ; USART Baud Rate Register bit 1
.equ UBRR2 = 2 ; USART Baud Rate Register bit 2
.equ UBRR3 = 3 ; USART Baud Rate Register bit 3
.equ UBRR4 = 4 ; USART Baud Rate Register bit 4
.equ UBRR5 = 5 ; USART Baud Rate Register bit 5
.equ UBRR6 = 6 ; USART Baud Rate Register bit 6
.equ UBRR7 = 7 ; USART Baud Rate Register bit 7
; ***** WATCHDOG *********************
; WDTCSR - Watchdog Timer Control Register
.equ WDP0 = 0 ; Watch Dog Timer Prescaler bit 0
.equ WDP1 = 1 ; Watch Dog Timer Prescaler bit 1
.equ WDP2 = 2 ; Watch Dog Timer Prescaler bit 2
.equ WDE = 3 ; Watch Dog Enable
.equ WDCE = 4 ; Watchdog Change Enable
.equ WDP3 = 5 ; Watchdog Timer Prescaler Bit 3
.equ WDIE = 6 ; Watchdog Timeout Interrupt Enable
.equ WDIF = 7 ; Watchdog Timeout Interrupt Flag
; WDTCKD - Watchdog Timer Clock Divider
.equ WCLKD0 = 0 ; Watchdog Timer Clock Divider 0
.equ WCLKD1 = 1 ; Watchdog Timer Clock Divider 1
.equ WDEWIE = 2 ; Watchdog Early Warning Interrupt Enable
.equ WDEWIF = 3 ; Watchdog Early Warning Interrupt Flag
; ***** ANALOG_COMPARATOR ************
; ACSR - Analog Comparator Control And Status Register
.equ ACIS0 = 0 ; Analog Comparator Interrupt Mode Select bit 0
.equ ACIS1 = 1 ; Analog Comparator Interrupt Mode Select bit 1
.equ ACIC = 2 ; Analog Comparator Input Capture Enable
.equ ACIE = 3 ; Analog Comparator Interrupt Enable
.equ ACI = 4 ; Analog Comparator Interrupt Flag
.equ ACO = 5 ; Analog Compare Output
.equ ACBG = 6 ; Analog Comparator Bandgap Select
.equ ACD = 7 ; Analog Comparator Disable
; DIDR1 -
.equ AIN0D = 0 ; AIN0 Digital Input Disable
.equ AIN1D = 1 ; AIN1 Digital Input Disable
; ***** PORTC ************************
; PORTC - Port C Data Register
.equ PORTC0 = 0 ; Port C Data Register bit 0
.equ PC0 = 0 ; For compatibility
.equ PORTC1 = 1 ; Port C Data Register bit 1
.equ PC1 = 1 ; For compatibility
.equ PORTC2 = 2 ; Port C Data Register bit 2
.equ PC2 = 2 ; For compatibility
.equ PORTC4 = 4 ; Port C Data Register bit 4
.equ PC4 = 4 ; For compatibility
.equ PORTC5 = 5 ; Port C Data Register bit 5
.equ PC5 = 5 ; For compatibility
.equ PORTC6 = 6 ; Port C Data Register bit 6
.equ PC6 = 6 ; For compatibility
.equ PORTC7 = 7 ; Port C Data Register bit 7
.equ PC7 = 7 ; For compatibility
; DDRC - Port C Data Direction Register
.equ DDC0 = 0 ; Port C Data Direction Register bit 0
.equ DDC1 = 1 ; Port C Data Direction Register bit 1
.equ DDC2 = 2 ; Port C Data Direction Register bit 2
.equ DDC4 = 4 ; Port C Data Direction Register bit 4
.equ DDC5 = 5 ; Port C Data Direction Register bit 5
.equ DDC6 = 6 ; Port C Data Direction Register bit 6
.equ DDC7 = 7 ; Port C Data Direction Register bit 7
; PINC - Port C Input Pins
.equ PINC0 = 0 ; Port C Input Pins bit 0
.equ PINC1 = 1 ; Port C Input Pins bit 1
.equ PINC2 = 2 ; Port C Input Pins bit 2
.equ PINC4 = 4 ; Port C Input Pins bit 4
.equ PINC5 = 5 ; Port C Input Pins bit 5
.equ PINC6 = 6 ; Port C Input Pins bit 6
.equ PINC7 = 7 ; Port C Input Pins bit 7
; ***** LOCKSBITS ********************************************************
.equ LB1 = 0 ; Lock bit
.equ LB2 = 1 ; Lock bit
.equ BLB01 = 2 ; Boot Lock bit
.equ BLB02 = 3 ; Boot Lock bit
.equ BLB11 = 4 ; Boot lock bit
.equ BLB12 = 5 ; Boot lock bit
; ***** FUSES ************************************************************
; LOW fuse bits
;.equ CKSEL0 = 0 ; Select Clock Source
;.equ CKSEL1 = 1 ; Select Clock Source
.equ CKSEL2 = 2 ; Select Clock Source
.equ CKSEL3 = 3 ; Select Clock Source
.equ SUT0 = 4 ; Select start-up time
.equ SUT1 = 5 ; Select start-up time
.equ CKOUT = 6 ; Oscillator options
.equ CKDIV8 = 7 ; Divide clock by 8
; HIGH fuse bits
.equ BOOTRST = 0 ; Select Reset Vector
.equ BOOTSZ0 = 1 ; Select Boot Size
.equ BOOTSZ1 = 2 ; Select Boot Size
.equ EESAVE = 3 ; EEPROM memory is preserved through chip erase
.equ WDTON = 4 ; Watchdog timer always on
.equ SPIEN = 5 ; Enable Serial programming and Data Downloading
.equ RSTDISBL = 6 ; External Reset Disable
.equ DWEN = 7 ; dwbugWIRE Enable
; EXTENDED fuse bits
.equ BODLEVEL0 = 0 ; Brown-out Detector trigger level
.equ BODLEVEL1 = 1 ; Brown-out Detector trigger level
.equ BODLEVEL2 = 2 ; Brown-out Detector trigger level
.equ HWBE = 3 ; Hardware Boot Enable
; ***** CPU REGISTER DEFINITIONS *****************************************
.def XH = r27
.def XL = r26
.def YH = r29
.def YL = r28
.def ZH = r31
.def ZL = r30
; ***** DATA MEMORY DECLARATIONS *****************************************
.equ FLASHEND = 0x1fff ; Note: Word address
.equ IOEND = 0x00ff
.equ SRAM_START = 0x0100
.equ SRAM_SIZE = 512
.equ RAMEND = 0x02ff
.equ XRAMEND = 0x0000
.equ E2END = 0x01ff
.equ EEPROMEND = 0x01ff
.equ EEADRBITS = 9
#pragma AVRPART MEMORY PROG_FLASH 16384
#pragma AVRPART MEMORY EEPROM 512
#pragma AVRPART MEMORY INT_SRAM SIZE 512
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100
; ***** BOOTLOADER DECLARATIONS ******************************************
.equ NRWW_START_ADDR = 0x1800
.equ NRWW_STOP_ADDR = 0x1fff
.equ RWW_START_ADDR = 0x0
.equ RWW_STOP_ADDR = 0x17ff
.equ PAGESIZE = 64
.equ FIRSTBOOTSTART = 0x1f00
.equ SECONDBOOTSTART = 0x1e00
.equ THIRDBOOTSTART = 0x1c00
.equ FOURTHBOOTSTART = 0x1800
.equ SMALLBOOTSTART = FIRSTBOOTSTART
.equ LARGEBOOTSTART = FOURTHBOOTSTART
; ***** INTERRUPT VECTORS ************************************************
.equ INT0addr = 0x0002 ; External Interrupt Request 0
.equ INT1addr = 0x0004 ; External Interrupt Request 1
.equ INT2addr = 0x0006 ; External Interrupt Request 2
.equ INT3addr = 0x0008 ; External Interrupt Request 3
.equ INT4addr = 0x000a ; External Interrupt Request 4
.equ INT5addr = 0x000c ; External Interrupt Request 5
.equ INT6addr = 0x000e ; External Interrupt Request 6
.equ INT7addr = 0x0010 ; External Interrupt Request 7
.equ PCI0addr = 0x0012 ; Pin Change Interrupt Request 0
.equ PCI1addr = 0x0014 ; Pin Change Interrupt Request 1
.equ USB_GENaddr = 0x0016 ; USB General Interrupt Request
.equ USB_COMaddr = 0x0018 ; USB Endpoint/Pipe Interrupt Communication Request
.equ WDTaddr = 0x001a ; Watchdog Time-out Interrupt
.equ ICP1addr = 0x001c ; Timer/Counter2 Capture Event
.equ OC1Aaddr = 0x001e ; Timer/Counter2 Compare Match B
.equ OC1Baddr = 0x0020 ; Timer/Counter2 Compare Match B
.equ OC1Caddr = 0x0022 ; Timer/Counter2 Compare Match C
.equ OVF1addr = 0x0024 ; Timer/Counter1 Overflow
.equ OC0Aaddr = 0x0026 ; Timer/Counter0 Compare Match A
.equ OC0Baddr = 0x0028 ; Timer/Counter0 Compare Match B
.equ OVF0addr = 0x002a ; Timer/Counter0 Overflow
.equ SPIaddr = 0x002c ; SPI Serial Transfer Complete
.equ URXC1addr = 0x002e ; USART1, Rx Complete
.equ UDRE1addr = 0x0030 ; USART1 Data register Empty
.equ UTXC1addr = 0x0032 ; USART1, Tx Complete
.equ ACIaddr = 0x0034 ; Analog Comparator
.equ ERDYaddr = 0x0036 ; EEPROM Ready
.equ SPMRaddr = 0x0038 ; Store Program Memory Read
.equ INT_VECTORS_SIZE = 58 ; size in words
#endif /* _USB162DEF_INC_ */
; ***** END OF FILE ******************************************************
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