m640def.inc

AVR Assembler 2 compiler

.equ	EEAR2	= 2	; EEPROM Read/Write Access Bit 2
.equ	EEAR3	= 3	; EEPROM Read/Write Access Bit 3
.equ	EEAR4	= 4	; EEPROM Read/Write Access Bit 4
.equ	EEAR5	= 5	; EEPROM Read/Write Access Bit 5
.equ	EEAR6	= 6	; EEPROM Read/Write Access Bit 6
.equ	EEAR7	= 7	; EEPROM Read/Write Access Bit 7

; EEDR - EEPROM Data Register
.equ	EEDR0	= 0	; EEPROM Data Register bit 0
.equ	EEDR1	= 1	; EEPROM Data Register bit 1
.equ	EEDR2	= 2	; EEPROM Data Register bit 2
.equ	EEDR3	= 3	; EEPROM Data Register bit 3
.equ	EEDR4	= 4	; EEPROM Data Register bit 4
.equ	EEDR5	= 5	; EEPROM Data Register bit 5
.equ	EEDR6	= 6	; EEPROM Data Register bit 6
.equ	EEDR7	= 7	; EEPROM Data Register bit 7

; EECR - EEPROM Control Register
.equ	EERE	= 0	; EEPROM Read Enable
.equ	EEPE	= 1	; EEPROM Write Enable
.equ	EEMPE	= 2	; EEPROM Master Write Enable
.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable
.equ	EEPM0	= 4	; EEPROM Programming Mode Bit 0
.equ	EEPM1	= 5	; EEPROM Programming Mode Bit 1


; ***** TIMER_COUNTER_5 **************
; TIMSK5 - Timer/Counter5 Interrupt Mask Register
.equ	TOIE5	= 0	; Timer/Counter5 Overflow Interrupt Enable
.equ	OCIE5A	= 1	; Timer/Counter5 Output Compare A Match Interrupt Enable
.equ	OCIE5B	= 2	; Timer/Counter5 Output Compare B Match Interrupt Enable
.equ	OCIE5C	= 3	; Timer/Counter5 Output Compare C Match Interrupt Enable
.equ	ICIE5	= 5	; Timer/Counter5 Input Capture Interrupt Enable

; TIFR5 - Timer/Counter5 Interrupt Flag register
.equ	TOV5	= 0	; Timer/Counter5 Overflow Flag
.equ	OCF5A	= 1	; Output Compare Flag 5A
.equ	OCF5B	= 2	; Output Compare Flag 5B
.equ	OCF5C	= 3	; Output Compare Flag 5C
.equ	ICF5	= 5	; Input Capture Flag 5

; TCCR5A - Timer/Counter5 Control Register A
.equ	WGM50	= 0	; Waveform Generation Mode
.equ	WGM51	= 1	; Waveform Generation Mode
.equ	COM5C0	= 2	; Compare Output Mode 5C, bit 0
.equ	COM5C1	= 3	; Compare Output Mode 5C, bit 1
.equ	COM5B0	= 4	; Compare Output Mode 5B, bit 0
.equ	COM5B1	= 5	; Compare Output Mode 5B, bit 1
.equ	COM5A0	= 6	; Compare Output Mode 5A, bit 0
.equ	COM5A1	= 7	; Compare Output Mode 1A, bit 1

; TCCR5B - Timer/Counter5 Control Register B
.equ	CS50	= 0	; Prescaler source of Timer/Counter 5
.equ	CS51	= 1	; Prescaler source of Timer/Counter 5
.equ	CS52	= 2	; Prescaler source of Timer/Counter 5
.equ	WGM52	= 3	; Waveform Generation Mode
.equ	WGM53	= 4	; Waveform Generation Mode
.equ	ICES5	= 6	; Input Capture 5 Edge Select
.equ	ICNC5	= 7	; Input Capture 5 Noise Canceler

; TCCR5C - Timer/Counter 5 Control Register C
.equ	FOC5C	= 5	; Force Output Compare 5C
.equ	FOC5B	= 6	; Force Output Compare 5B
.equ	FOC5A	= 7	; Force Output Compare 5A

; ICR5H - Timer/Counter5 Input Capture Register High Byte
.equ	ICR5H0	= 0	; Timer/Counter5 Input Capture Register High Byte bit 0
.equ	ICR5H1	= 1	; Timer/Counter5 Input Capture Register High Byte bit 1
.equ	ICR5H2	= 2	; Timer/Counter5 Input Capture Register High Byte bit 2
.equ	ICR5H3	= 3	; Timer/Counter5 Input Capture Register High Byte bit 3
.equ	ICR5H4	= 4	; Timer/Counter5 Input Capture Register High Byte bit 4
.equ	ICR5H5	= 5	; Timer/Counter5 Input Capture Register High Byte bit 5
.equ	ICR5H6	= 6	; Timer/Counter5 Input Capture Register High Byte bit 6
.equ	ICR5H7	= 7	; Timer/Counter5 Input Capture Register High Byte bit 7

; ICR5L - Timer/Counter5 Input Capture Register Low Byte
.equ	ICR5L0	= 0	; Timer/Counter5 Input Capture Register Low Byte bit 0
.equ	ICR5L1	= 1	; Timer/Counter5 Input Capture Register Low Byte bit 1
.equ	ICR5L2	= 2	; Timer/Counter5 Input Capture Register Low Byte bit 2
.equ	ICR5L3	= 3	; Timer/Counter5 Input Capture Register Low Byte bit 3
.equ	ICR5L4	= 4	; Timer/Counter5 Input Capture Register Low Byte bit 4
.equ	ICR5L5	= 5	; Timer/Counter5 Input Capture Register Low Byte bit 5
.equ	ICR5L6	= 6	; Timer/Counter5 Input Capture Register Low Byte bit 6
.equ	ICR5L7	= 7	; Timer/Counter5 Input Capture Register Low Byte bit 7


; ***** TIMER_COUNTER_4 **************
; TIMSK4 - Timer/Counter4 Interrupt Mask Register
.equ	TOIE4	= 0	; Timer/Counter4 Overflow Interrupt Enable
.equ	OCIE4A	= 1	; Timer/Counter4 Output Compare A Match Interrupt Enable
.equ	OCIE4B	= 2	; Timer/Counter4 Output Compare B Match Interrupt Enable
.equ	OCIE4C	= 3	; Timer/Counter4 Output Compare C Match Interrupt Enable
.equ	ICIE4	= 5	; Timer/Counter4 Input Capture Interrupt Enable

; TIFR4 - Timer/Counter4 Interrupt Flag register
.equ	TOV4	= 0	; Timer/Counter4 Overflow Flag
.equ	OCF4A	= 1	; Output Compare Flag 4A
.equ	OCF4B	= 2	; Output Compare Flag 4B
.equ	OCF4C	= 3	; Output Compare Flag 4C
.equ	ICF4	= 5	; Input Capture Flag 4

; TCCR4A - Timer/Counter4 Control Register A
.equ	WGM40	= 0	; Waveform Generation Mode
.equ	WGM41	= 1	; Waveform Generation Mode
.equ	COM4C0	= 2	; Compare Output Mode 4C, bit 0
.equ	COM4C1	= 3	; Compare Output Mode 4C, bit 1
.equ	COM4B0	= 4	; Compare Output Mode 4B, bit 0
.equ	COM4B1	= 5	; Compare Output Mode 4B, bit 1
.equ	COM4A0	= 6	; Compare Output Mode 4A, bit 0
.equ	COM4A1	= 7	; Compare Output Mode 1A, bit 1

; TCCR4B - Timer/Counter4 Control Register B
.equ	CS40	= 0	; Prescaler source of Timer/Counter 4
.equ	CS41	= 1	; Prescaler source of Timer/Counter 4
.equ	CS42	= 2	; Prescaler source of Timer/Counter 4
.equ	WGM42	= 3	; Waveform Generation Mode
.equ	WGM43	= 4	; Waveform Generation Mode
.equ	ICES4	= 6	; Input Capture 4 Edge Select
.equ	ICNC4	= 7	; Input Capture 4 Noise Canceler

; TCCR4C - Timer/Counter 4 Control Register C
.equ	FOC4C	= 5	; Force Output Compare 4C
.equ	FOC4B	= 6	; Force Output Compare 4B
.equ	FOC4A	= 7	; Force Output Compare 4A


; ***** TIMER_COUNTER_3 **************
; TIMSK3 - Timer/Counter3 Interrupt Mask Register
.equ	TOIE3	= 0	; Timer/Counter3 Overflow Interrupt Enable
.equ	OCIE3A	= 1	; Timer/Counter3 Output Compare A Match Interrupt Enable
.equ	OCIE3B	= 2	; Timer/Counter3 Output Compare B Match Interrupt Enable
.equ	OCIE3C	= 3	; Timer/Counter3 Output Compare C Match Interrupt Enable
.equ	ICIE3	= 5	; Timer/Counter3 Input Capture Interrupt Enable

; TIFR3 - Timer/Counter3 Interrupt Flag register
.equ	TOV3	= 0	; Timer/Counter3 Overflow Flag
.equ	OCF3A	= 1	; Output Compare Flag 3A
.equ	OCF3B	= 2	; Output Compare Flag 3B
.equ	OCF3C	= 3	; Output Compare Flag 3C
.equ	ICF3	= 5	; Input Capture Flag 3

; TCCR3A - Timer/Counter3 Control Register A
.equ	WGM30	= 0	; Waveform Generation Mode
.equ	WGM31	= 1	; Waveform Generation Mode
.equ	COM3C0	= 2	; Compare Output Mode 3C, bit 0
.equ	COM3C1	= 3	; Compare Output Mode 3C, bit 1
.equ	COM3B0	= 4	; Compare Output Mode 3B, bit 0
.equ	COM3B1	= 5	; Compare Output Mode 3B, bit 1
.equ	COM3A0	= 6	; Compare Output Mode 3A, bit 0
.equ	COM3A1	= 7	; Compare Output Mode 1A, bit 1

; TCCR3B - Timer/Counter3 Control Register B
.equ	CS30	= 0	; Prescaler source of Timer/Counter 3
.equ	CS31	= 1	; Prescaler source of Timer/Counter 3
.equ	CS32	= 2	; Prescaler source of Timer/Counter 3
.equ	WGM32	= 3	; Waveform Generation Mode
.equ	WGM33	= 4	; Waveform Generation Mode
.equ	ICES3	= 6	; Input Capture 3 Edge Select
.equ	ICNC3	= 7	; Input Capture 3 Noise Canceler

; TCCR3C - Timer/Counter 3 Control Register C
.equ	FOC3C	= 5	; Force Output Compare 3C
.equ	FOC3B	= 6	; Force Output Compare 3B
.equ	FOC3A	= 7	; Force Output Compare 3A


; ***** TIMER_COUNTER_1 **************
; TIMSK1 - Timer/Counter1 Interrupt Mask Register
.equ	TOIE1	= 0	; Timer/Counter1 Overflow Interrupt Enable
.equ	OCIE1A	= 1	; Timer/Counter1 Output Compare A Match Interrupt Enable
.equ	OCIE1B	= 2	; Timer/Counter1 Output Compare B Match Interrupt Enable
.equ	OCIE1C	= 3	; Timer/Counter1 Output Compare C Match Interrupt Enable
.equ	ICIE1	= 5	; Timer/Counter1 Input Capture Interrupt Enable

; TIFR1 - Timer/Counter1 Interrupt Flag register
.equ	TOV1	= 0	; Timer/Counter1 Overflow Flag
.equ	OCF1A	= 1	; Output Compare Flag 1A
.equ	OCF1B	= 2	; Output Compare Flag 1B
.equ	OCF1C	= 3	; Output Compare Flag 1C
.equ	ICF1	= 5	; Input Capture Flag 1

; TCCR1A - Timer/Counter1 Control Register A
.equ	WGM10	= 0	; Waveform Generation Mode
.equ	WGM11	= 1	; Waveform Generation Mode
.equ	COM1C0	= 2	; Compare Output Mode 1C, bit 0
.equ	COM1C1	= 3	; Compare Output Mode 1C, bit 1
.equ	COM1B0	= 4	; Compare Output Mode 1B, bit 0
.equ	COM1B1	= 5	; Compare Output Mode 1B, bit 1
.equ	COM1A0	= 6	; Compare Output Mode 1A, bit 0
.equ	COM1A1	= 7	; Compare Output Mode 1A, bit 1

; TCCR1B - Timer/Counter1 Control Register B
.equ	CS10	= 0	; Prescaler source of Timer/Counter 1
.equ	CS11	= 1	; Prescaler source of Timer/Counter 1
.equ	CS12	= 2	; Prescaler source of Timer/Counter 1
.equ	WGM12	= 3	; Waveform Generation Mode
.equ	WGM13	= 4	; Waveform Generation Mode
.equ	ICES1	= 6	; Input Capture 1 Edge Select
.equ	ICNC1	= 7	; Input Capture 1 Noise Canceler

; TCCR1C - Timer/Counter 1 Control Register C
.equ	FOC1C	= 5	; Force Output Compare 1C
.equ	FOC1B	= 6	; Force Output Compare 1B
.equ	FOC1A	= 7	; Force Output Compare 1A


; ***** JTAG *************************
; OCDR - On-Chip Debug Related Register in I/O Memory
.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
.equ	IDRD	= OCDR7	; For compatibility

; MCUCR - MCU Control Register
.equ	JTD	= 7	; JTAG Interface Disable

; MCUSR - MCU Status Register
.equ	JTRF	= 4	; JTAG Reset Flag


; ***** EXTERNAL_INTERRUPT ***********
; EICRA - External Interrupt Control Register A
.equ	ISC00	= 0	; External Interrupt Sense Control Bit
.equ	ISC01	= 1	; External Interrupt Sense Control Bit
.equ	ISC10	= 2	; External Interrupt Sense Control Bit
.equ	ISC11	= 3	; External Interrupt Sense Control Bit
.equ	ISC20	= 4	; External Interrupt Sense Control Bit
.equ	ISC21	= 5	; External Interrupt Sense Control Bit
.equ	ISC30	= 6	; External Interrupt Sense Control Bit
.equ	ISC31	= 7	; External Interrupt Sense Control Bit

; EICRB - External Interrupt Control Register B
.equ	ISC40	= 0	; External Interrupt 7-4 Sense Control Bit
.equ	ISC41	= 1	; External Interrupt 7-4 Sense Control Bit
.equ	ISC50	= 2	; External Interrupt 7-4 Sense Control Bit
.equ	ISC51	= 3	; External Interrupt 7-4 Sense Control Bit
.equ	ISC60	= 4	; External Interrupt 7-4 Sense Control Bit
.equ	ISC61	= 5	; External Interrupt 7-4 Sense Control Bit
.equ	ISC70	= 6	; External Interrupt 7-4 Sense Control Bit
.equ	ISC71	= 7	; External Interrupt 7-4 Sense Control Bit

; EIMSK - External Interrupt Mask Register
.equ	INT0	= 0	; External Interrupt Request 0 Enable
.equ	INT1	= 1	; External Interrupt Request 1 Enable
.equ	INT2	= 2	; External Interrupt Request 2 Enable
.equ	INT3	= 3	; External Interrupt Request 3 Enable
.equ	INT4	= 4	; External Interrupt Request 4 Enable
.equ	INT5	= 5	; External Interrupt Request 5 Enable
.equ	INT6	= 6	; External Interrupt Request 6 Enable
.equ	INT7	= 7	; External Interrupt Request 7 Enable

; EIFR - External Interrupt Flag Register
.equ	INTF0	= 0	; External Interrupt Flag 0
.equ	INTF1	= 1	; External Interrupt Flag 1
.equ	INTF2	= 2	; External Interrupt Flag 2
.equ	INTF3	= 3	; External Interrupt Flag 3
.equ	INTF4	= 4	; External Interrupt Flag 4
.equ	INTF5	= 5	; External Interrupt Flag 5
.equ	INTF6	= 6	; External Interrupt Flag 6
.equ	INTF7	= 7	; External Interrupt Flag 7

; PCICR - Pin Change Interrupt Control Register
.equ	PCIE0	= 0	; Pin Change Interrupt Enable 0
.equ	PCIE1	= 1	; Pin Change Interrupt Enable 1
.equ	PCIE2	= 2	; Pin Change Interrupt Enable 2

; PCIFR - Pin Change Interrupt Flag Register
.equ	PCIF0	= 0	; Pin Change Interrupt Flag 0
.equ	PCIF1	= 1	; Pin Change Interrupt Flag 1
.equ	PCIF2	= 2	; Pin Change Interrupt Flag 2

; PCMSK2 - Pin Change Mask Register 2
.equ	PCINT16	= 0	; Pin Change Enable Mask 16
.equ	PCINT17	= 1	; Pin Change Enable Mask 17
.equ	PCINT18	= 2	; Pin Change Enable Mask 18
.equ	PCINT19	= 3	; Pin Change Enable Mask 19
.equ	PCINT20	= 4	; Pin Change Enable Mask 20
.equ	PCINT21	= 5	; Pin Change Enable Mask 21
.equ	PCINT22	= 6	; Pin Change Enable Mask 22
.equ	PCINT23	= 7	; Pin Change Enable Mask 23

; PCMSK1 - Pin Change Mask Register 1
.equ	PCINT8	= 0	; Pin Change Enable Mask 8
.equ	PCINT9	= 1	; Pin Change Enable Mask 9
.equ	PCINT10	= 2	; Pin Change Enable Mask 10
.equ	PCINT11	= 3	; Pin Change Enable Mask 11
.equ	PCINT12	= 4	; Pin Change Enable Mask 12
.equ	PCINT13	= 5	; Pin Change Enable Mask 13
.equ	PCINT14	= 6	; Pin Change Enable Mask 14
.equ	PCINT15	= 7	; Pin Change Enable Mask 15

; PCMSK0 - Pin Change Mask Register 0
.equ	PCINT0	= 0	; Pin Change Enable Mask 0
.equ	PCINT1	= 1	; Pin Change Enable Mask 1
.equ	PCINT2	= 2	; Pin Change Enable Mask 2
.equ	PCINT3	= 3	; Pin Change Enable Mask 3
.equ	PCINT4	= 4	; Pin Change Enable Mask 4
.equ	PCINT5	= 5	; Pin Change Enable Mask 5
.equ	PCINT6	= 6	; Pin Change Enable Mask 6
.equ	PCINT7	= 7	; Pin Change Enable Mask 7


; ***** CPU **************************
; SREG - Status Register
.equ	SREG_C	= 0	; Carry Flag
.equ	SREG_Z	= 1	; Zero Flag
.equ	SREG_N	= 2	; Negative Flag
.equ	SREG_V	= 3	; Two's Complement Overflow Flag
.equ	SREG_S	= 4	; Sign Bit
.equ	SREG_H	= 5	; Half Carry Flag
.equ	SREG_T	= 6	; Bit Copy Storage
.equ	SREG_I	= 7	; Global Interrupt Enable

; MCUCR - MCU Control Register
.equ	IVCE	= 0	; Interrupt Vector Change Enable
.equ	IVSEL	= 1	; Interrupt Vector Select
.equ	PUD	= 4	; Pull-up disable
;.equ	JTD	= 7	; JTAG Interface Disable

; MCUSR - MCU Status Register
.equ	PORF	= 0	; Power-on reset flag
.equ	EXTRF	= 1	; External Reset Flag
.equ	BORF	= 2	; Brown-out Reset Flag
.equ	WDRF	= 3	; Watchdog Reset Flag
;.equ	JTRF	= 4	; JTAG Reset Flag

; XMCRA - External Memory Control Register A
.equ	SRW00	= 0	; Wait state select bit lower page
.equ	SRW01	= 1	; Wait state select bit lower page
.equ	SRW10	= 2	; Wait state select bit upper page
.equ	SRW11	= 3	; Wait state select bit upper page
.equ	SRL0	= 4	; Wait state page limit
.equ	SRL1	= 5	; Wait state page limit
.equ	SRL2	= 6	; Wait state page limit
.equ	SRE	= 7	; External SRAM Enable

; XMCRB - External Memory Control Register B
.equ	XMM0	= 0	; External Memory High Mask
.equ	XMM1	= 1	; External Memory High Mask
.equ	XMM2	= 2	; External Memory High Mask
.equ	XMBK	= 7	; External Memory Bus Keeper Enable

; OSCCAL - Oscillator Calibration Value
.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
.equ	CAL7	= 7	; Oscillator Calibration Value Bit7