tn461def.inc

AVR Assembler 2 compiler

.equ	CS00	= 0	; Clock Select
.equ	CS01	= 1	; Clock Select
.equ	CS02	= 2	; Clock Select
.equ	PSR0	= 3	; Timer/Counter 0 Prescaler Reset
.equ	TSM	= 4	; Timer/Counter Synchronization Mode

; TCNT0H - Timer/Counter0 High
.equ	TCNT0_0	= 0	; 
.equ	TCNT0_1	= 1	; 
.equ	TCNT0_2	= 2	; 
.equ	TCNT0_3	= 3	; 
.equ	TCNT0_4	= 4	; 
.equ	TCNT0_5	= 5	; 
.equ	TCNT0_6	= 6	; 
.equ	TCNT0_7	= 7	; 

; TCNT0L - Timer/Counter0 Low
;.equ	TCNT0_0	= 0	; 
;.equ	TCNT0_1	= 1	; 
;.equ	TCNT0_2	= 2	; 
;.equ	TCNT0_3	= 3	; 
;.equ	TCNT0_4	= 4	; 
;.equ	TCNT0_5	= 5	; 
;.equ	TCNT0_6	= 6	; 
;.equ	TCNT0_7	= 7	; 

; OCR0A - Timer/Counter0 Output Compare Register
.equ	OCR0_0	= 0	; 
.equ	OCR0_1	= 1	; 
.equ	OCR0_2	= 2	; 
.equ	OCR0_3	= 3	; 
.equ	OCR0_4	= 4	; 
.equ	OCR0_5	= 5	; 
.equ	OCR0_6	= 6	; 
.equ	OCR0_7	= 7	; 

; OCR0B - Timer/Counter0 Output Compare Register
;.equ	OCR0_0	= 0	; 
;.equ	OCR0_1	= 1	; 
;.equ	OCR0_2	= 2	; 
;.equ	OCR0_3	= 3	; 
;.equ	OCR0_4	= 4	; 
;.equ	OCR0_5	= 5	; 
;.equ	OCR0_6	= 6	; 
;.equ	OCR0_7	= 7	; 


; ***** TIMER_COUNTER_1 **************
; TCCR1A - Timer/Counter Control Register A
.equ	PWM1B	= 0	; Pulse Width Modulator Enable
.equ	PWM1A	= 1	; Pulse Width Modulator Enable
.equ	FOC1B	= 2	; Force Output Compare Match 1B
.equ	FOC1A	= 3	; Force Output Compare Match 1A
.equ	COM1B0	= 4	; Compare Output Mode, Bit 0
.equ	COM1B1	= 5	; Compare Output Mode, Bit 1
.equ	COM1A0	= 6	; Compare Output Mode, Bit 1
.equ	COM1A1	= 7	; Compare Output Mode, Bit 0

; TCCR1B - Timer/Counter Control Register B
.equ	CS10	= 0	; Clock Select Bits
.equ	CS11	= 1	; Clock Select Bits
.equ	CS12	= 2	; Clock Select Bits
.equ	CS13	= 3	; Clock Select Bits
.equ	DTPS10	= 4	; Dead Time Prescaler
.equ	DTPS11	= 5	; Dead Time Prescaler
.equ	PSR1	= 6	; Timer/Counter 1 Prescaler reset

; TCCR1C - Timer/Counter Control Register C
.equ	PWM1D	= 0	; Pulse Width Modulator D Enable
.equ	FOC1D	= 1	; Force Output Compare Match 1D
.equ	COM1D0	= 2	; Comparator D output mode
.equ	COM1D1	= 3	; Comparator D output mode
.equ	COM1B0S	= 4	; COM1B0 Shadow Bit
.equ	COM1B1S	= 5	; COM1B1 Shadow Bit
.equ	COM1A0S	= 6	; COM1A0 Shadow Bit
.equ	COM1A1S	= 7	; COM1A1 Shadow Bit

; TCCR1D - Timer/Counter Control Register D
.equ	WGM10	= 0	; Waveform Generation Mode Bit
.equ	WGM11	= 1	; Waveform Generation Mode Bit
.equ	FPF1	= 2	; Fault Protection Interrupt Flag
.equ	FPAC1	= 3	; Fault Protection Analog Comparator Enable
.equ	FPES1	= 4	; Fault Protection Edge Select
.equ	FPNC1	= 5	; Fault Protection Noise Canceler
.equ	FPEN1	= 6	; Fault Protection Mode Enable
.equ	FPIE1	= 7	; Fault Protection Interrupt Enable

; TCCR1E - Timer/Counter1 Control Register E
.equ	OC1OE0	= 0	; Ouput Compare Override Enable Bit 0
.equ	OC1OE1	= 1	; Ouput Compare Override Enable Bit 1
.equ	OC1OE2	= 2	; Ouput Compare Override Enable Bit 2
.equ	OC1OE3	= 3	; Ouput Compare Override Enable Bit 3
.equ	OC1OE4	= 4	; Ouput Compare Override Enable Bit 4
.equ	OC1OE5	= 5	; Ouput Compare Override Enable Bit 5

; TCNT1 - Timer/Counter Register
.equ	TC1H_0	= 0	; Timer/Counter Register Bit 0
.equ	TC1H_1	= 1	; Timer/Counter Register Bit 1
.equ	TC1H_2	= 2	; Timer/Counter Register Bit 2
.equ	TC1H_3	= 3	; Timer/Counter Register Bit 3
.equ	TC1H_4	= 4	; Timer/Counter Register Bit 4
.equ	TC1H_5	= 5	; Timer/Counter Register Bit 5
.equ	TC1H_6	= 6	; Timer/Counter Register Bit 6
.equ	TC1H_7	= 7	; Timer/Counter Register Bit 7

; TC1H - Timer/Counter 1 Register High
.equ	TC18	= 0	; Timer/Counter Register Bit 0
.equ	TC19	= 1	; Timer/Counter Register Bit 1

; OCR1A - Output Compare Register
.equ	OCR1A0	= 0	; Output Compare Register A Bit 0
.equ	OCR1A1	= 1	; Output Compare Register A Bit 1
.equ	OCR1A2	= 2	; Output Compare Register A Bit 2
.equ	OCR1A3	= 3	; Output Compare Register A Bit 3
.equ	OCR1A4	= 4	; Output Compare Register A Bit 4
.equ	OCR1A5	= 5	; Output Compare Register A Bit 5
.equ	OCR1A6	= 6	; Output Compare Register A Bit 6
.equ	OCR1A7	= 7	; Output Compare Register A Bit 7

; OCR1B - Output Compare Register
.equ	OCR1B0	= 0	; Output Compare Register B Bit 0
.equ	OCR1B1	= 1	; Output Compare Register B Bit 1
.equ	OCR1B2	= 2	; Output Compare Register B Bit 2
.equ	OCR1B3	= 3	; Output Compare Register B Bit 3
.equ	OCR1B4	= 4	; Output Compare Register B Bit 4
.equ	OCR1B5	= 5	; Output Compare Register B Bit 5
.equ	OCR1B6	= 6	; Output Compare Register B Bit 6
.equ	OCR1B7	= 7	; Output Compare Register B Bit 7

; OCR1C - Output compare register
.equ	OCR1C0	= 0	; 
.equ	OCR1C1	= 1	; 
.equ	OCR1C2	= 2	; 
.equ	OCR1C3	= 3	; 
.equ	OCR1C4	= 4	; 
.equ	OCR1C5	= 5	; 
.equ	OCR1C6	= 6	; 
.equ	OCR1C7	= 7	; 

; OCR1D - Output compare register
.equ	OCR1D0	= 0	; 
.equ	OCR1D1	= 1	; 
.equ	OCR1D2	= 2	; 
.equ	OCR1D3	= 3	; 
.equ	OCR1D4	= 4	; 
.equ	OCR1D5	= 5	; 
.equ	OCR1D6	= 6	; 
;.equ	OCR1C7	= 7	; 

; TIMSK - Timer/Counter Interrupt Mask Register
.equ	TOIE1	= 2	; Timer/Counter1 Overflow Interrupt Enable
.equ	OCIE1B	= 5	; OCIE1A: Timer/Counter1 Output Compare B Interrupt Enable
.equ	OCIE1A	= 6	; OCIE1A: Timer/Counter1 Output Compare Interrupt Enable
.equ	OCIE1D	= 7	; OCIE1D: Timer/Counter1 Output Compare Interrupt Enable

; TIFR - Timer/Counter Interrupt Flag Register
.equ	TOV1	= 2	; Timer/Counter1 Overflow Flag
.equ	OCF1B	= 5	; Timer/Counter1 Output Compare Flag 1B
.equ	OCF1A	= 6	; Timer/Counter1 Output Compare Flag 1A
.equ	OCF1D	= 7	; Timer/Counter1 Output Compare Flag 1D

; DT1 - Timer/Counter 1 Dead Time Value
.equ	DT1L0	= 0	; 
.equ	DT1L1	= 1	; 
.equ	DT1L2	= 2	; 
.equ	DT1L3	= 3	; 
.equ	DT1H0	= 4	; 
.equ	DT1H1	= 5	; 
.equ	DT1H2	= 6	; 
.equ	DT1H3	= 7	; 


; ***** BOOT_LOAD ********************
; SPMCSR - Store Program Memory Control Register
.equ	SPMEN	= 0	; Store Program Memory Enable
.equ	PGERS	= 1	; Page Erase
.equ	PGWRT	= 2	; Page Write
.equ	RFLB	= 3	; Read fuse and lock bits
.equ	CTPB	= 4	; Clear temporary page buffer


; ***** CPU **************************
; SREG - Status Register
.equ	SREG_C	= 0	; Carry Flag
.equ	SREG_Z	= 1	; Zero Flag
.equ	SREG_N	= 2	; Negative Flag
.equ	SREG_V	= 3	; Two's Complement Overflow Flag
.equ	SREG_S	= 4	; Sign Bit
.equ	SREG_H	= 5	; Half Carry Flag
.equ	SREG_T	= 6	; Bit Copy Storage
.equ	SREG_I	= 7	; Global Interrupt Enable

; MCUCR - MCU Control Register
.equ	ISC00	= 0	; Interrupt Sense Control 0 bit 0
.equ	ISC01	= 1	; Interrupt Sense Control 0 bit 1
.equ	SM0	= 3	; Sleep Mode Select Bit 0
.equ	SM1	= 4	; Sleep Mode Select Bit 1
.equ	SE	= 5	; Sleep Enable
.equ	PUD	= 6	; Pull-up Disable

; MCUSR - MCU Status register
.equ	PORF	= 0	; Power-On Reset Flag
.equ	EXTRF	= 1	; External Reset Flag
.equ	BORF	= 2	; Brown-out Reset Flag
.equ	WDRF	= 3	; Watchdog Reset Flag

; PRR - Power Reduction Register
.equ	PRADC	= 0	; Power Reduction ADC
.equ	PRUSI	= 1	; Power Reduction USI
.equ	PRTIM0	= 2	; Power Reduction Timer/Counter0
.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1

; OSCCAL - Oscillator Calibration Register
.equ	CAL0	= 0	; Oscillatro Calibration Value Bit 0
.equ	CAL1	= 1	; Oscillatro Calibration Value Bit 1
.equ	CAL2	= 2	; Oscillatro Calibration Value Bit 2
.equ	CAL3	= 3	; Oscillatro Calibration Value Bit 3
.equ	CAL4	= 4	; Oscillatro Calibration Value Bit 4
.equ	CAL5	= 5	; Oscillatro Calibration Value Bit 5
.equ	CAL6	= 6	; Oscillatro Calibration Value Bit 6
.equ	CAL7	= 7	; Oscillatro Calibration Value Bit 7

; PLLCSR - PLL Control and status register
.equ	PLOCK	= 0	; PLL Lock detector
.equ	PLLE	= 1	; PLL Enable
.equ	PCKE	= 2	; PCK Enable
.equ	LSM	= 7	; Low speed mode

; CLKPR - Clock Prescale Register
.equ	CLKPS0	= 0	; Clock Prescaler Select Bit 0
.equ	CLKPS1	= 1	; Clock Prescaler Select Bit 1
.equ	CLKPS2	= 2	; Clock Prescaler Select Bit 2
.equ	CLKPS3	= 3	; Clock Prescaler Select Bit 3
.equ	CLKPCE	= 7	; Clock Prescaler Change Enable

; DWDR - debugWire data register
.equ	DWDR0	= 0	; 
.equ	DWDR1	= 1	; 
.equ	DWDR2	= 2	; 
.equ	DWDR3	= 3	; 
.equ	DWDR4	= 4	; 
.equ	DWDR5	= 5	; 
.equ	DWDR6	= 6	; 
.equ	DWDR7	= 7	; 

; GPIOR2 - General Purpose IO register 2
.equ	GPIOR20	= 0	; 
.equ	GPIOR21	= 1	; 
.equ	GPIOR22	= 2	; 
.equ	GPIOR23	= 3	; 
.equ	GPIOR24	= 4	; 
.equ	GPIOR25	= 5	; 
.equ	GPIOR26	= 6	; 
.equ	GPIOR27	= 7	; 

; GPIOR1 - General Purpose register 1
.equ	GPIOR10	= 0	; 
.equ	GPIOR11	= 1	; 
.equ	GPIOR12	= 2	; 
.equ	GPIOR13	= 3	; 
.equ	GPIOR14	= 4	; 
.equ	GPIOR15	= 5	; 
.equ	GPIOR16	= 6	; 
.equ	GPIOR17	= 7	; 

; GPIOR0 - General purpose register 0
.equ	GPIOR00	= 0	; 
.equ	GPIOR01	= 1	; 
.equ	GPIOR02	= 2	; 
.equ	GPIOR03	= 3	; 
.equ	GPIOR04	= 4	; 
.equ	GPIOR05	= 5	; 
.equ	GPIOR06	= 6	; 
.equ	GPIOR07	= 7	; 


; ***** EXTERNAL_INTERRUPT ***********
; MCUCR - MCU Control Register
;.equ	ISC00	= 0	; Interrupt Sense Control 0 Bit 0
;.equ	ISC01	= 1	; Interrupt Sense Control 0 Bit 1

; GIMSK - General Interrupt Mask Register
.equ	GICR	= GIMSK	; For compatibility
.equ	PCIE0	= 4	; Pin Change Interrupt Enable 0
.equ	PCIE1	= 5	; Pin Change Interrupt Enable 1
.equ	INT0	= 6	; External Interrupt Request 0 Enable
.equ	INT1	= 7	; External Interrupt Request 1 Enable

; GIFR - General Interrupt Flag register
.equ	PCIF	= 5	; Pin Change Interrupt Flag
.equ	INTF0	= 6	; External Interrupt Flag 0
.equ	INTF1	= 7	; External Interrupt Flag 1

; PCMSK0 - Pin Change Enable Mask 0
.equ	PCINT0	= 0	; Pin Change Enable Mask Bit 0
.equ	PCINT1	= 1	; Pin Change Enable Mask Bit 1
.equ	PCINT2	= 2	; Pin Change Enable Mask Bit 2
.equ	PCINT3	= 3	; Pin Change Enable Mask Bit 3
.equ	PCINT4	= 4	; Pin Change Enable Mask Bit 4
.equ	PCINT5	= 5	; Pin Change Enable Mask Bit 5
.equ	PCINT6	= 6	; Pin Change Enable Mask Bit 6
.equ	PCINT7	= 7	; Pin Change Enable Mask Bit 7

; PCMSK1 - Pin Change Enable Mask 1
.equ	PCINT8	= 0	; Pin Change Enable Mask Bit 8
.equ	PCINT9	= 1	; Pin Change Enable Mask Bit 9
.equ	PCINT10	= 2	; Pin Change Enable Mask Bit 10
.equ	PCINT11	= 3	; Pin Change Enable Mask Bit 11
.equ	PCINT12	= 4	; Pin Change Enable Mask Bit 12
.equ	PCINT13	= 5	; Pin Change Enable Mask Bit 13
.equ	PCINT14	= 6	; Pin Change Enable Mask Bit 14
.equ	PCINT15	= 7	; Pin Change Enable Mask Bit 15



; ***** LOCKSBITS ********************************************************
.equ	LB1	= 0	; Lockbit
.equ	LB2	= 1	; Lockbit


; ***** FUSES ************************************************************
; LOW fuse bits
.equ	CKSEL0	= 0	; Select Clock source
.equ	CKSEL1	= 1	; Select Clock source
.equ	CKSEL2	= 2	; Select Clock source
.equ	CKSEL3	= 3	; Select Clock source
.equ	SUT0	= 4	; Select start-up time
.equ	SUT1	= 5	; Select start-up time
.equ	CKOUT	= 6	; Clock Output Enable
.equ	CKDIV8	= 7	; Divide clock by 8

; HIGH fuse bits
.equ	BODLEVEL0	= 0	; Brown-out Detector trigger level
.equ	BODLEVEL1	= 1	; Brown-out Detector trigger level
.equ	BODLEVEL2	= 2	; Brown-out Detector trigger level
.equ	EESAVE	= 3	; EEPROM memory is preserved through the Chip Erase
.equ	WDTON	= 4	; Watchdog Timer always on
.equ	SPIEN	= 5	; Enable Serial Program and Data Downloading
.equ	DWEN	= 6	; DebugWIRE Enable
.equ	RSTDISBL	= 7	; External Reset disable

; EXTENDED fuse bits
.equ	SELFPRGEN	= 0	; Self-Programming Enable



; ***** CPU REGISTER DEFINITIONS *****************************************
.def	XH	= r27
.def	XL	= r26
.def	YH	= r29
.def	YL	= r28
.def	ZH	= r31
.def	ZL	= r30



; ***** DATA MEMORY DECLARATIONS *****************************************
.equ	FLASHEND	= 0x07ff	; Note: Word address
.equ	IOEND	= 0x003f
.equ	SRAM_START	= 0x0060
.equ	SRAM_SIZE	= 256
.equ	RAMEND	= 0x015f
.equ	XRAMEND	= 0x0000
.equ	E2END	= 0x00ff
.equ	EEPROMEND	= 0x00ff
.equ	EEADRBITS	= 8
#pragma AVRPART MEMORY PROG_FLASH 4096
#pragma AVRPART MEMORY EEPROM 256
#pragma AVRPART MEMORY INT_SRAM SIZE 256
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60



; ***** BOOTLOADER DECLARATIONS ******************************************
.equ	NRWW_START_ADDR	= 0x0
.equ	NRWW_STOP_ADDR	= 0x7ff
.equ	RWW_START_ADDR	= 0x0
.equ	RWW_STOP_ADDR	= 0x0
.equ	PAGESIZE	= 32



; ***** INTERRUPT VECTORS ************************************************
.equ	INT0addr	= 0x0001	; External Interrupt 0
.equ	PCIaddr	= 0x0002	; Pin Change Interrupt
.equ	OC1Aaddr	= 0x0003	; Timer/Counter1 Compare Match 1A
.equ	OC1Baddr	= 0x0004	; Timer/Counter1 Compare Match 1B
.equ	OVF1addr	= 0x0005	; Timer/Counter1 Overflow
.equ	OVF0addr	= 0x0006	; Timer/Counter0 Overflow
.equ	USI_STARTaddr	= 0x0007	; USI Start
.equ	USI_OVFaddr	= 0x0008	; USI Overflow
.equ	ERDYaddr	= 0x0009	; EEPROM Ready
.equ	ACIaddr	= 0x000a	; Analog Comparator
.equ	ADCCaddr	= 0x000b	; ADC Conversion Complete
.equ	WDTaddr	= 0x000c	; Watchdog Time-Out
.equ	INT1addr	= 0x000d	; External Interrupt 1
.equ	OC0Aaddr	= 0x000e	; Timer/Counter0 Compare Match A
.equ	OC0Baddr	= 0x000f	; Timer/Counter0 Compare Match B
.equ	ICP0addr	= 0x0010	; ADC Conversion Complete
.equ	OC1Daddr	= 0x0011	; Timer/Counter1 Compare Match D
.equ	FAULT_PROTaddr	= 0x0012	; Timer/Counter1 Fault Protection

.equ	INT_VECTORS_SIZE	= 19	; size in words

#endif  /* _TN461DEF_INC_ */

; ***** END OF FILE ******************************************************