can64def.inc

AVR Assembler 2 compiler

; CANGCON - CAN General Control Register
.equ	SWRES	= 0	; Software Reset Request
.equ	ENASTB	= 1	; Enable / Standby
.equ	TEST	= 2	; Test Mode
.equ	LISTEN	= 3	; Listening Mode
.equ	SYNTTC	= 4	; Synchronization of TTC
.equ	TTC	= 5	; Time Trigger Communication
.equ	OVRQ	= 6	; Overload Frame Request
.equ	ABRQ	= 7	; Abort Request

; CANGSTA - CAN General Status Register
.equ	ERRP	= 0	; Error Passive Mode
.equ	BOFF	= 1	; Bus Off Mode
.equ	ENFG	= 2	; Enable Flag
.equ	RXBSY	= 3	; Receiver Busy
.equ	TXBSY	= 4	; Transmitter Busy
.equ	OVRG	= 6	; Overload Frame Flag

; CANGIT - CAN General Interrupt Register
.equ	AERG	= 0	; Ackknowledgement Error General
.equ	FERG	= 1	; Form Error General
.equ	CERG	= 2	; CRC Error General
.equ	SERG	= 3	; Stuff Error General
.equ	BXOK	= 4	; Burst Receive Interrupt
.equ	OVRTIM	= 5	; Overrun CAN Timer
.equ	BOFFIT	= 6	; Bus Off Interrupt Flag
.equ	CANIT	= 7	; General Interrupt Flag

; CANGIE - CAN General Interrupt Enable Register
.equ	ENOVRT	= 0	; Enable CAN Timer Overrun Interrupt
.equ	ENERG	= 1	; Enable General Error Interrupt
.equ	ENBX	= 2	; Enable Burst Receive Interrupt
.equ	ENERR	= 3	; Enable MOb Error Interrupt
.equ	ENTX	= 4	; Enable Transmitt Interrupt
.equ	ENRX	= 5	; Enable Receive Interrupt
.equ	ENBOFF	= 6	; Enable Bus Off INterrupt
.equ	ENIT	= 7	; Enable all Interrupts

; CANEN2 - Enable MOb Register
.equ	ENMOB0	= 0	; 
.equ	ENMOB1	= 1	; 
.equ	ENMOB2	= 2	; 
.equ	ENMOB3	= 3	; 
.equ	ENMOB4	= 4	; 
.equ	ENMOB5	= 5	; 
.equ	ENMOB6	= 6	; 
.equ	ENMOB7	= 7	; 

; CANEN1 - Enable MOb Register
.equ	ENMOB8	= 0	; 
.equ	ENMOB9	= 1	; 
.equ	ENMOB10	= 2	; 
.equ	ENMOB11	= 3	; 
.equ	ENMOB12	= 4	; 
.equ	ENMOB13	= 5	; 
.equ	ENMOB14	= 6	; 

; CANIE2 - Enable Interrupt MOb Register
.equ	IEMOB0	= 0	; 
.equ	IEMOB1	= 1	; 
.equ	IEMOB2	= 2	; 
.equ	IEMOB3	= 3	; 
.equ	IEMOB4	= 4	; 
.equ	IEMOB5	= 5	; 
.equ	IEMOB6	= 6	; 
.equ	IEMOB7	= 7	; 

; CANIE1 - Enable Interrupt MOb Register
.equ	IEMOB8	= 0	; 
.equ	IEMOB9	= 1	; 
.equ	IEMOB10	= 2	; 
.equ	IEMOB11	= 3	; 
.equ	IEMOB12	= 4	; 
.equ	IEMOB13	= 5	; 
.equ	IEMOB14	= 6	; 

; CANSIT2 - CAN Status Interrupt MOb Register
.equ	SIT0	= 0	; 
.equ	SIT1	= 1	; 
.equ	SIT2	= 2	; 
.equ	SIT3	= 3	; 
.equ	SIT4	= 4	; 
.equ	SIT5	= 5	; 
.equ	SIT6	= 6	; 
.equ	SIT7	= 7	; 

; CANSIT1 - CAN Status Interrupt MOb Register
.equ	SIT8	= 0	; 
.equ	SIT9	= 1	; 
.equ	SIT10	= 2	; 
.equ	SIT11	= 3	; 
.equ	SIT12	= 4	; 
.equ	SIT13	= 5	; 
.equ	SIT14	= 6	; 

; CANBT1 - Bit Timing Register 1
.equ	BRP0	= 1	; Baud Rate Prescaler bit 0
.equ	BRP1	= 2	; Baud Rate Prescaler bit 1
.equ	BRP2	= 3	; Baud Rate Prescaler bit 2
.equ	BRP3	= 4	; Baud Rate Prescaler bit 3
.equ	BRP4	= 5	; Baud Rate Prescaler bit 4
.equ	BRP5	= 6	; Baud Rate Prescaler bit 5

; CANBT2 - Bit Timing Register 2
.equ	PRS0	= 1	; Propagation Time Segment
.equ	PRS1	= 2	; Propagation Time Segment
.equ	PRS2	= 3	; Propagation Time Segment
.equ	SJW0	= 5	; Re-Sync Jump Width
.equ	SJW1	= 6	; Re-Sync Jump Width

; CANBT3 - Bit Timing Register 3
.equ	SMP	= 0	; Sample Type
.equ	PHS10	= 1	; Phase Segment 1
.equ	PHS11	= 2	; Phase Segment 1
.equ	PHS12	= 3	; Phase Segment 1
.equ	PHS20	= 4	; Phase Segment 2
.equ	PHS21	= 5	; Phase Segment 2
.equ	PHS22	= 6	; Phase Segment 2

; CANTCON - Timer Control Register

; CANTIML - Timer Register Low

; CANTIMH - Timer Register High

; CANTTCL - TTC Timer Register Low

; CANTTCH - TTC Timer Register High

; CANTEC - Transmit Error Counter Register

; CANREC - Receive Error Counter Register

; CANHPMOB - Highest Priority MOb Register
.equ	CGP0	= 0	; 
.equ	CGP	= CGP0	; For compatibility
.equ	CGP1	= 1	; 
.equ	CGP2	= 2	; 
.equ	CGP3	= 3	; 
.equ	HPMOB0	= 4	; 
.equ	HPMOB1	= 5	; 
.equ	HPMOB2	= 6	; 
.equ	HPMOB3	= 7	; 

; CANPAGE - Page MOb Register
.equ	INDX0	= 0	; Data Buffer Index Bit 0
.equ	INDX1	= 1	; Data Buffer Index Bit 1
.equ	INDX2	= 2	; Data Buffer Index Bit 2
.equ	AINC	= 3	; MOb Data Buffer Auto Increment
.equ	MOBNB0	= 4	; MOb Number Bit 0
.equ	MOBNB1	= 5	; MOb Number Bit 1
.equ	MOBNB2	= 6	; MOb Number Bit 2
.equ	MOBNB3	= 7	; MOb Number Bit 3

; CANSTMOB - MOb Status Register
.equ	AERR	= 0	; Ackknowledgement Error
.equ	FERR	= 1	; Form Error
.equ	CERR	= 2	; CRC Error
.equ	SERR	= 3	; Stuff Error
.equ	BERR	= 4	; Bit Error
.equ	RXOK	= 5	; Receive OK
.equ	TXOK	= 6	; Transmit OK
.equ	DLCW	= 7	; Data Length Code Warning

; CANCDMOB - MOb Control and DLC Register
.equ	DLC0	= 0	; Data Length Code Bit 0
.equ	DLC1	= 1	; Data Length Code Bit 1
.equ	DLC2	= 2	; Data Length Code Bit 2
.equ	DLC3	= 3	; Data Length Code Bit 3
.equ	IDE	= 4	; Identifier Extension
.equ	RPLV	= 5	; Reply Valid
.equ	CONMOB0	= 6	; MOb Config Bit 0
.equ	CONMOB1	= 7	; MOb Config Bit 1

; CANIDT4 - Identifier Tag Register 4
.equ	RB0TAG	= 0	; 
.equ	RB1TAG	= 1	; 
.equ	RTRTAG	= 2	; 
.equ	IDT0	= 3	; 
.equ	IDT1	= 4	; 
.equ	IDT2	= 5	; 
.equ	IDT3	= 6	; 
.equ	IDT4	= 7	; 

; CANIDT3 - Identifier Tag Register 3
.equ	IDT5	= 0	; 
.equ	IDT6	= 1	; 
.equ	IDT7	= 2	; 
.equ	IDT8	= 3	; 
.equ	IDT9	= 4	; 
.equ	IDT10	= 5	; 
.equ	IDT11	= 6	; 
.equ	IDT12	= 7	; 

; CANIDT2 - Identifier Tag Register 2
.equ	IDT13	= 0	; 
.equ	IDT14	= 1	; 
.equ	IDT15	= 2	; 
.equ	IDT16	= 3	; 
.equ	IDT17	= 4	; 
.equ	IDT18	= 5	; 
.equ	IDT19	= 6	; 
.equ	IDT20	= 7	; 

; CANIDT1 - Identifier Tag Register 1
.equ	IDT21	= 0	; 
.equ	IDT22	= 1	; 
.equ	IDT23	= 2	; 
.equ	IDT24	= 3	; 
.equ	IDT25	= 4	; 
.equ	IDT26	= 5	; 
.equ	IDT27	= 6	; 
.equ	IDT28	= 7	; 

; CANIDM4 - Identifier Mask Register 4
.equ	IDEMSK	= 0	; 
.equ	RTRMSK	= 2	; 
.equ	IDMSK0	= 3	; 
.equ	IDMSK1	= 4	; 
.equ	IDMSK2	= 5	; 
.equ	IDMSK3	= 6	; 
.equ	IDMSK4	= 7	; 

; CANIDM3 - Identifier Mask Register 3
.equ	IDMSK5	= 0	; 
.equ	IDMSK6	= 1	; 
.equ	IDMSK7	= 2	; 
.equ	IDMSK8	= 3	; 
.equ	IDMSK9	= 4	; 
.equ	IDMSK10	= 5	; 
.equ	IDMSK11	= 6	; 
.equ	IDMSK12	= 7	; 

; CANIDM2 - Identifier Mask Register 2
.equ	IDMSK13	= 0	; 
.equ	IDMSK14	= 1	; 
.equ	IDMSK15	= 2	; 
.equ	IDMSK16	= 3	; 
.equ	IDMSK17	= 4	; 
.equ	IDMSK18	= 5	; 
.equ	IDMSK19	= 6	; 
.equ	IDMSK20	= 7	; 

; CANIDM1 - Identifier Mask Register 1
.equ	IDMSK21	= 0	; 
.equ	IDMSK22	= 1	; 
.equ	IDMSK23	= 2	; 
.equ	IDMSK24	= 3	; 
.equ	IDMSK25	= 4	; 
.equ	IDMSK26	= 5	; 
.equ	IDMSK27	= 6	; 
.equ	IDMSK28	= 7	; 

; CANSTML - Time Stamp Register Low

; CANSTMH - Time Stamp Register High

; CANMSG - Message Data Register



; ***** LOCKSBITS ********************************************************
.equ	LB1	= 0	; Lock bit
.equ	LB2	= 1	; Lock bit
.equ	BLB01	= 2	; Boot Lock bit
.equ	BLB02	= 3	; Boot Lock bit
.equ	BLB11	= 4	; Boot lock bit
.equ	BLB12	= 5	; Boot lock bit


; ***** FUSES ************************************************************
; LOW fuse bits
.equ	CKSEL0	= 0	; Select Clock Source
.equ	CKSEL1	= 1	; Select Clock Source
.equ	CKSEL2	= 2	; Select Clock Source
.equ	CKSEL3	= 3	; Select Clock Source
.equ	SUT0	= 4	; Select start-up time
.equ	SUT1	= 5	; Select start-up time
.equ	CKOUT	= 6	; Oscillator output option
.equ	CKDIV8	= 7	; Divide clock by 8

; HIGH fuse bits
.equ	BOOTRST	= 0	; Select Reset Vector
.equ	BOOTSZ0	= 1	; Select Boot Size
.equ	BOOTSZ1	= 2	; Select Boot Size
.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
.equ	WDTON	= 4	; Watchdog timer always on
.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
.equ	JTAGEN	= 6	; Enable JTAG
.equ	OCDEN	= 7	; Enable OCD

; EXTENDED fuse bits
.equ	TA0SEL	= 0	; (Reserved to factory tests)
.equ	BODLEVEL0	= 1	; Brown-out Detector trigger level
.equ	BODLEVEL1	= 2	; Brown-out Detector trigger level
.equ	BODLEVEL2	= 3	; Brown out detector trigger level



; ***** CPU REGISTER DEFINITIONS *****************************************
.def	XH	= r27
.def	XL	= r26
.def	YH	= r29
.def	YL	= r28
.def	ZH	= r31
.def	ZL	= r30



; ***** DATA MEMORY DECLARATIONS *****************************************
.equ	FLASHEND	= 0x7fff	; Note: Word address
.equ	IOEND	= 0x00ff
.equ	SRAM_START	= 0x0100
.equ	SRAM_SIZE	= 4096
.equ	RAMEND	= 0x10ff
.equ	XRAMEND	= 0xffff
.equ	E2END	= 0x07ff
.equ	EEPROMEND	= 0x07ff
.equ	EEADRBITS	= 11
#pragma AVRPART MEMORY PROG_FLASH 65536
#pragma AVRPART MEMORY EEPROM 2048
#pragma AVRPART MEMORY INT_SRAM SIZE 4096
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100



; ***** BOOTLOADER DECLARATIONS ******************************************
.equ	NRWW_START_ADDR	= 0x7000
.equ	NRWW_STOP_ADDR	= 0x7fff
.equ	RWW_START_ADDR	= 0x0
.equ	RWW_STOP_ADDR	= 0x6fff
.equ	PAGESIZE	= 128
.equ	FIRSTBOOTSTART	= 0x7e00
.equ	SECONDBOOTSTART	= 0x7c00
.equ	THIRDBOOTSTART	= 0x7800
.equ	FOURTHBOOTSTART	= 0x7000
.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
.equ	LARGEBOOTSTART	= FOURTHBOOTSTART



; ***** INTERRUPT VECTORS ************************************************
.equ	INT0addr	= 0x0002	; External Interrupt Request 0
.equ	INT1addr	= 0x0004	; External Interrupt Request 1
.equ	INT2addr	= 0x0006	; External Interrupt Request 2
.equ	INT3addr	= 0x0008	; External Interrupt Request 3
.equ	INT4addr	= 0x000a	; External Interrupt Request 4
.equ	INT5addr	= 0x000c	; External Interrupt Request 5
.equ	INT6addr	= 0x000e	; External Interrupt Request 6
.equ	INT7addr	= 0x0010	; External Interrupt Request 7
.equ	OC2addr	= 0x0012	; Timer/Counter2 Compare Match
.equ	OVF2addr	= 0x0014	; Timer/Counter2 Overflow
.equ	ICP1addr	= 0x0016	; Timer/Counter1 Capture Event
.equ	OC1Aaddr	= 0x0018	; Timer/Counter1 Compare Match A
.equ	OC1Baddr	= 0x001a	; Timer/Counter Compare Match B
.equ	OC1Caddr	= 0x001c	; Timer/Counter1 Compare Match C
.equ	OVF1addr	= 0x001e	; Timer/Counter1 Overflow
.equ	OC0addr	= 0x0020	; Timer/Counter0 Compare Match
.equ	OVF0addr	= 0x0022	; Timer/Counter0 Overflow
.equ	CANITaddr	= 0x0024	; CAN Transfer Complete or Error
.equ	OVRITaddr	= 0x0026	; CAN Timer Overrun
.equ	SPIaddr	= 0x0028	; SPI Serial Transfer Complete
.equ	URXC0addr	= 0x002a	; USART0, Rx Complete
.equ	UDRE0addr	= 0x002c	; USART0 Data Register Empty
.equ	UTXC0addr	= 0x002e	; USART0, Tx Complete
.equ	ACIaddr	= 0x0030	; Analog Comparator
.equ	ADCCaddr	= 0x0032	; ADC Conversion Complete
.equ	ERDYaddr	= 0x0034	; EEPROM Ready
.equ	ICP3addr	= 0x0036	; Timer/Counter3 Capture Event
.equ	OC3Aaddr	= 0x0038	; Timer/Counter3 Compare Match A
.equ	OC3Baddr	= 0x003a	; Timer/Counter3 Compare Match B
.equ	OC3Caddr	= 0x003c	; Timer/Counter3 Compare Match C
.equ	OVF3addr	= 0x003e	; Timer/Counter3 Overflow
.equ	URXC1addr	= 0x0040	; USART1, Rx Complete
.equ	UDRE1addr	= 0x0042	; USART1, Data Register Empty
.equ	UTXC1addr	= 0x0044	; USART1, Tx Complete
.equ	TWIaddr	= 0x0046	; 2-wire Serial Interface
.equ	SPMRaddr	= 0x0048	; Store Program Memory Read

.equ	INT_VECTORS_SIZE	= 74	; size in words

#endif  /* _CAN64DEF_INC_ */

; ***** END OF FILE ******************************************************