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📄 m169def.inc

📁 AVR Assembler 2 compiler
💻 INC
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.equ	USBS	= USBS0	; For compatibility
.equ	UPM00	= 4	; Parity Mode Bit 0
.equ	UPM0	= UPM00	; For compatibility
.equ	UPM01	= 5	; Parity Mode Bit 1
.equ	UPM1	= UPM01	; For compatibility
.equ	UMSEL0	= 6	; USART Mode Select
.equ	UMSEL	= UMSEL0	; For compatibility

; UBRR0H - USART Baud Rate Register High Byte
.equ	UBRRH	= UBRR0H	; For compatibility
.equ	UBRR8	= 0	; USART Baud Rate Register bit 8
.equ	UBRR9	= 1	; USART Baud Rate Register bit 9
.equ	UBRR10	= 2	; USART Baud Rate Register bit 10
.equ	UBRR11	= 3	; USART Baud Rate Register bit 11

; UBRR0L - USART Baud Rate Register Low Byte
.equ	UBRRL	= UBRR0L	; For compatibility
.equ	UBRR	= UBRR0L	; For compatibility
.equ	UBRR0	= 0	; USART Baud Rate Register bit 0
.equ	UBRR1	= 1	; USART Baud Rate Register bit 1
.equ	UBRR2	= 2	; USART Baud Rate Register bit 2
.equ	UBRR3	= 3	; USART Baud Rate Register bit 3
.equ	UBRR4	= 4	; USART Baud Rate Register bit 4
.equ	UBRR5	= 5	; USART Baud Rate Register bit 5
.equ	UBRR6	= 6	; USART Baud Rate Register bit 6
.equ	UBRR7	= 7	; USART Baud Rate Register bit 7


; ***** LCD **************************
; LCDCRA - LCD Control Register A
.equ	LCDBL	= 0	; LCD Blanking
.equ	LCDIE	= 3	; LCD Interrupt Enable
.equ	LCDIF	= 4	; LCD Interrupt Flag
.equ	LCDAB	= 6	; LCD A or B waveform
.equ	LCDEN	= 7	; LCD Enable

; LCDCRB - LCD Control and Status Register B
.equ	LCDPM0	= 0	; LCD Port Mask 0
.equ	LCDPM1	= 1	; LCD Port Mask 1
.equ	LCDPM2	= 2	; LCD Port Mask 2
.equ	LCDMUX0	= 4	; LCD Mux Select 0
.equ	LCDMUX1	= 5	; LCD Mux Select 1
.equ	LCD2B	= 6	; LCD 1/2 Bias Select
.equ	LCDCS	= 7	; LCD CLock Select

; LCDFRR - LCD Frame Rate Register
.equ	LCDCD0	= 0	; LCD Clock Divider 0
.equ	LCDCD1	= 1	; LCD Clock Divider 1
.equ	LCDCD2	= 2	; LCD Clock Divider 2
.equ	LCDPS0	= 4	; LCD Prescaler Select 0
.equ	LCDPS1	= 5	; LCD Prescaler Select 1
.equ	LCDPS2	= 6	; LCD Prescaler Select 2

; LCDCCR - LCD Contrast Control Register
.equ	LCDCC0	= 0	; LCD Contrast Control 0
.equ	LCDCC1	= 1	; LCD Contrast Control 1
.equ	LCDCC2	= 2	; LCD Contrast Control 2
.equ	LCDCC3	= 3	; LCD Contrast Control 3
.equ	LCDDC0	= 5	; LCD Display Configuration Bit 0
.equ	LCDDC1	= 6	; LCD Display Configuration Bit 1
.equ	LCDDC2	= 7	; LCD Display Configuration Bit 2

; LCDDR18 - LCD Data Register 18
.equ	SEG324	= 0	; 

; LCDDR17 - LCD Data Register 17
.equ	SEG316	= 0	; 
.equ	SEG317	= 1	; 
.equ	SEG318	= 2	; 
.equ	SEG319	= 3	; 
.equ	SEG320	= 4	; 
.equ	SEG321	= 5	; 
.equ	SEG322	= 6	; 
.equ	SEG323	= 7	; 

; LCDDR16 - LCD Data Register 16
.equ	SEG308	= 0	; 
.equ	SEG309	= 1	; 
.equ	SEG310	= 2	; 
.equ	SEG311	= 3	; 
.equ	SEG312	= 4	; 
.equ	SEG313	= 5	; 
.equ	SEG314	= 6	; 
.equ	SEG315	= 7	; 

; LCDDR15 - LCD Data Register 15
.equ	SEG300	= 0	; 
.equ	SEG301	= 1	; 
.equ	SEG302	= 2	; 
.equ	SEG303	= 3	; 
.equ	SEG304	= 4	; 
.equ	SEG305	= 5	; 
.equ	SEG306	= 6	; 
.equ	SEG307	= 7	; 

; LCDDR13 - LCD Data Register 13
.equ	SEG224	= 0	; 

; LCDDR12 - LCD Data Register 12
.equ	SEG216	= 0	; 
.equ	SEG217	= 1	; 
.equ	SEG218	= 2	; 
.equ	SEG219	= 3	; 
.equ	SEG220	= 4	; 
.equ	SEG221	= 5	; 
.equ	SEG222	= 6	; 
.equ	SEG223	= 7	; 

; LCDDR11 - LCD Data Register 11
.equ	SEG208	= 0	; 
.equ	SEG209	= 1	; 
.equ	SEG210	= 2	; 
.equ	SEG211	= 3	; 
.equ	SEG212	= 4	; 
.equ	SEG213	= 5	; 
.equ	SEG214	= 6	; 
.equ	SEG215	= 7	; 

; LCDDR10 - LCD Data Register 10
.equ	SEG200	= 0	; 
.equ	SEG201	= 1	; 
.equ	SEG202	= 2	; 
.equ	SEG203	= 3	; 
.equ	SEG204	= 4	; 
.equ	SEG205	= 5	; 
.equ	SEG206	= 6	; 
.equ	SEG207	= 7	; 

; LCDDR8 - LCD Data Register 8
.equ	SEG124	= 0	; 

; LCDDR7 - LCD Data Register 7
.equ	SEG116	= 0	; 
.equ	SEG117	= 1	; 
.equ	SEG118	= 2	; 
.equ	SEG119	= 3	; 
.equ	SEG120	= 4	; 
.equ	SEG121	= 5	; 
.equ	SEG122	= 6	; 
.equ	SEG123	= 7	; 

; LCDDR6 - LCD Data Register 6
.equ	SEG108	= 0	; 
.equ	SEG109	= 1	; 
.equ	SEG110	= 2	; 
.equ	SEG111	= 3	; 
.equ	SEG112	= 4	; 
.equ	SEG113	= 5	; 
.equ	SEG114	= 6	; 
.equ	SEG115	= 7	; 

; LCDDR5 - LCD Data Register 5
.equ	SEG100	= 0	; 
.equ	SEG101	= 1	; 
.equ	SEG102	= 2	; 
.equ	SEG103	= 3	; 
.equ	SEG104	= 4	; 
.equ	SEG105	= 5	; 
.equ	SEG106	= 6	; 
.equ	SEG107	= 7	; 

; LCDDR3 - LCD Data Register 3
.equ	SEG024	= 0	; 

; LCDDR2 - LCD Data Register 2
.equ	SEG016	= 0	; 
.equ	SEG017	= 1	; 
.equ	SEG018	= 2	; 
.equ	SEG019	= 3	; 
.equ	SEG020	= 4	; 
.equ	SEG021	= 5	; 
.equ	SEG022	= 6	; 
.equ	SEG023	= 7	; 

; LCDDR1 - LCD Data Register 1
.equ	SEG008	= 0	; 
.equ	SEG009	= 1	; 
.equ	SEG010	= 2	; 
.equ	SEG011	= 3	; 
.equ	SEG012	= 4	; 
.equ	SEG013	= 5	; 
.equ	SEG014	= 6	; 
.equ	SEG015	= 7	; 

; LCDDR0 - LCD Data Register 0
.equ	SEG000	= 0	; 
.equ	SEG001	= 1	; 
.equ	SEG002	= 2	; 
.equ	SEG003	= 3	; 
.equ	SEG004	= 4	; 
.equ	SEG005	= 5	; 
.equ	SEG006	= 6	; 
.equ	SEG007	= 7	; 


; ***** CPU **************************
; SREG - Status Register
.equ	SREG_C	= 0	; Carry Flag
.equ	SREG_Z	= 1	; Zero Flag
.equ	SREG_N	= 2	; Negative Flag
.equ	SREG_V	= 3	; Two's Complement Overflow Flag
.equ	SREG_S	= 4	; Sign Bit
.equ	SREG_H	= 5	; Half Carry Flag
.equ	SREG_T	= 6	; Bit Copy Storage
.equ	SREG_I	= 7	; Global Interrupt Enable

; MCUCR - MCU Control Register
.equ	IVCE	= 0	; Interrupt Vector Change Enable
.equ	IVSEL	= 1	; Interrupt Vector Select
.equ	PUD	= 4	; Pull-up disable

; MCUSR - MCU Status Register
.equ	PORF	= 0	; Power-on reset flag
.equ	EXTRF	= 1	; External Reset Flag
.equ	BORF	= 2	; Brown-out Reset Flag
.equ	WDRF	= 3	; Watchdog Reset Flag
;.equ	JTRF	= 4	; JTAG Reset Flag

; OSCCAL - Oscillator Calibration Value
.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
.equ	CAL7	= 7	; Oscillator Calibration Value Bit7

; CLKPR - Clock Prescale Register
.equ	CLKPS0	= 0	; Clock Prescaler Select Bit 0
.equ	CLKPS1	= 1	; Clock Prescaler Select Bit 1
.equ	CLKPS2	= 2	; Clock Prescaler Select Bit 2
.equ	CLKPS3	= 3	; Clock Prescaler Select Bit 3
.equ	CLKPCE	= 7	; Clock Prescaler Change Enable

; PRR - Power Reduction Register
.equ	PRADC	= 0	; Power Reduction ADC
.equ	PRUSART0	= 1	; Power Reduction USART
.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
.equ	PRLCD	= 4	; Power Reduction LCD

; SMCR - Sleep Mode Control Register
.equ	SE	= 0	; Sleep Enable
.equ	SM0	= 1	; Sleep Mode Select bit 0
.equ	SM1	= 2	; Sleep Mode Select bit 1
.equ	SM2	= 3	; Sleep Mode Select bit 2

; GPIOR2 - General Purpose IO Register 2
.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7

; GPIOR1 - General Purpose IO Register 1
.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7

; GPIOR0 - General Purpose IO Register 0
.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7


; ***** PORTG ************************
; PORTG - Port G Data Register
.equ	PORTG0	= 0	; 
.equ	PG0	= 0	; For compatibility
.equ	PORTG1	= 1	; 
.equ	PG1	= 1	; For compatibility
.equ	PORTG2	= 2	; 
.equ	PG2	= 2	; For compatibility
.equ	PORTG3	= 3	; 
.equ	PG3	= 3	; For compatibility
.equ	PORTG4	= 4	; 
.equ	PG4	= 4	; For compatibility

; DDRG - Port G Data Direction Register
.equ	DDG0	= 0	; 
.equ	DDG1	= 1	; 
.equ	DDG2	= 2	; 
.equ	DDG3	= 3	; 
.equ	DDG4	= 4	; 

; PING - Port G Input Pins
.equ	PING0	= 0	; 
.equ	PING1	= 1	; 
.equ	PING2	= 2	; 
.equ	PING3	= 3	; 
.equ	PING4	= 4	; 



; ***** LOCKSBITS ********************************************************
.equ	LB1	= 0	; Lock bit
.equ	LB2	= 1	; Lock bit
.equ	BLB01	= 2	; Boot Lock bit
.equ	BLB02	= 3	; Boot Lock bit
.equ	BLB11	= 4	; Boot lock bit
.equ	BLB12	= 5	; Boot lock bit


; ***** FUSES ************************************************************
; LOW fuse bits
.equ	CKSEL0	= 0	; Select Clock Source
.equ	CKSEL1	= 1	; Select Clock Source
.equ	CKSEL2	= 2	; Select Clock Source
.equ	CKSEL3	= 3	; Select Clock Source
.equ	SUT0	= 4	; Select start-up time
.equ	SUT1	= 5	; Select start-up time
.equ	CKOUT	= 6	; Oscillator options
.equ	CKDIV8	= 7	; Divide clock by 8

; HIGH fuse bits
.equ	BOOTRST	= 0	; Select Reset Vector
.equ	BOOTSZ0	= 1	; Select Boot Size
.equ	BOOTSZ1	= 2	; Select Boot Size
.equ	EESAVE	= 3	; EEPROM memory is preserved through chip erase
.equ	WDTON	= 4	; Watchdog timer always on
.equ	SPIEN	= 5	; Enable Serial programming and Data Downloading
.equ	JTAGEN	= 6	; Enable JTAG
.equ	OCDEN	= 7	; Enable OCD

; EXTENDED fuse bits
.equ	RSTDISBL	= 0	; Disable external reset
.equ	BODLEVEL0	= 1	; Brown-out Detector trigger level
.equ	BODLEVEL1	= 2	; Brown-out Detector trigger level
.equ	BODLEVEL2	= 3	; Brown out detector trigger level



; ***** CPU REGISTER DEFINITIONS *****************************************
.def	XH	= r27
.def	XL	= r26
.def	YH	= r29
.def	YL	= r28
.def	ZH	= r31
.def	ZL	= r30



; ***** DATA MEMORY DECLARATIONS *****************************************
.equ	FLASHEND	= 0x1fff	; Note: Word address
.equ	IOEND	= 0x00ff
.equ	SRAM_START	= 0x0100
.equ	SRAM_SIZE	= 1024
.equ	RAMEND	= 0x04ff
.equ	XRAMEND	= 0x0000
.equ	E2END	= 0x01ff
.equ	EEPROMEND	= 0x01ff
.equ	EEADRBITS	= 9
#pragma AVRPART MEMORY PROG_FLASH 16384
#pragma AVRPART MEMORY EEPROM 512
#pragma AVRPART MEMORY INT_SRAM SIZE 1024
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x100



; ***** BOOTLOADER DECLARATIONS ******************************************
.equ	NRWW_START_ADDR	= 0x1c00
.equ	NRWW_STOP_ADDR	= 0x1fff
.equ	RWW_START_ADDR	= 0x0
.equ	RWW_STOP_ADDR	= 0x1bff
.equ	PAGESIZE	= 64
.equ	FIRSTBOOTSTART	= 0x1f80
.equ	SECONDBOOTSTART	= 0x1f00
.equ	THIRDBOOTSTART	= 0x1e00
.equ	FOURTHBOOTSTART	= 0x1c00
.equ	SMALLBOOTSTART	= FIRSTBOOTSTART
.equ	LARGEBOOTSTART	= FOURTHBOOTSTART



; ***** INTERRUPT VECTORS ************************************************
.equ	INT0addr	= 0x0002	; External Interrupt Request 0
.equ	PCI0addr	= 0x0004	; Pin Change Interrupt Request 0
.equ	PCI1addr	= 0x0006	; Pin Change Interrupt Request 1
.equ	OC2addr	= 0x0008	; Timer/Counter2 Compare Match
.equ	OVF2addr	= 0x000a	; Timer/Counter2 Overflow
.equ	ICP1addr	= 0x000c	; Timer/Counter1 Capture Event
.equ	OC1Aaddr	= 0x000e	; Timer/Counter1 Compare Match A
.equ	OC1Baddr	= 0x0010	; Timer/Counter Compare Match B
.equ	OVF1addr	= 0x0012	; Timer/Counter1 Overflow
.equ	OC0addr	= 0x0014	; Timer/Counter0 Compare Match
.equ	OVF0addr	= 0x0016	; Timer/Counter0 Overflow
.equ	SPIaddr	= 0x0018	; SPI Serial Transfer Complete
.equ	URXC0addr	= 0x001a	; USART0, Rx Complete
.equ	URXCaddr	= 0x001a	; For compatibility
.equ	UDRE0addr	= 0x001c	; USART0 Data register Empty
.equ	UDREaddr	= 0x001c	; For compatibility
.equ	UTXC0addr	= 0x001e	; USART0, Tx Complete
.equ	UTXCaddr	= 0x001e	; For compatibility
.equ	USI_STARTaddr	= 0x0020	; USI Start Condition
.equ	USI_OVFaddr	= 0x0022	; USI Overflow
.equ	ACIaddr	= 0x0024	; Analog Comparator
.equ	ADCCaddr	= 0x0026	; ADC Conversion Complete
.equ	ERDYaddr	= 0x0028	; EEPROM Ready
.equ	SPMRaddr	= 0x002a	; Store Program Memory Read
.equ	LCDSFaddr	= 0x002c	; LCD Start of Frame

.equ	INT_VECTORS_SIZE	= 46	; size in words

#endif  /* _M169DEF_INC_ */

; ***** END OF FILE ******************************************************

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