m649def.inc

AVR Assembler 2 compiler

; OSCCAL - Oscillator Calibration Value
.equ	CAL0	= 0	; Oscillator Calibration Value Bit0
.equ	CAL1	= 1	; Oscillator Calibration Value Bit1
.equ	CAL2	= 2	; Oscillator Calibration Value Bit2
.equ	CAL3	= 3	; Oscillator Calibration Value Bit3
.equ	CAL4	= 4	; Oscillator Calibration Value Bit4
.equ	CAL5	= 5	; Oscillator Calibration Value Bit5
.equ	CAL6	= 6	; Oscillator Calibration Value Bit6
.equ	CAL7	= 7	; Oscillator Calibration Value Bit7

; CLKPR - Clock Prescale Register
.equ	CLKPS0	= 0	; Clock Prescaler Select Bit 0
.equ	CLKPS1	= 1	; Clock Prescaler Select Bit 1
.equ	CLKPS2	= 2	; Clock Prescaler Select Bit 2
.equ	CLKPS3	= 3	; Clock Prescaler Select Bit 3
.equ	CLKPCE	= 7	; Clock Prescaler Change Enable

; PRR - Power Reduction Register
.equ	PRADC	= 0	; Power Reduction ADC
.equ	PRUSART0	= 1	; Power Reduction USART
.equ	PRSPI	= 2	; Power Reduction Serial Peripheral Interface
.equ	PRTIM1	= 3	; Power Reduction Timer/Counter1
.equ	PRLCD	= 4	; Power Reduction LCD

; SMCR - Sleep Mode Control Register
.equ	SE	= 0	; Sleep Enable
.equ	SM0	= 1	; Sleep Mode Select bit 0
.equ	SM1	= 2	; Sleep Mode Select bit 1
.equ	SM2	= 3	; Sleep Mode Select bit 2

; GPIOR2 - General Purpose IO Register 2
.equ	GPIOR20	= 0	; General Purpose IO Register 2 bit 0
.equ	GPIOR21	= 1	; General Purpose IO Register 2 bit 1
.equ	GPIOR22	= 2	; General Purpose IO Register 2 bit 2
.equ	GPIOR23	= 3	; General Purpose IO Register 2 bit 3
.equ	GPIOR24	= 4	; General Purpose IO Register 2 bit 4
.equ	GPIOR25	= 5	; General Purpose IO Register 2 bit 5
.equ	GPIOR26	= 6	; General Purpose IO Register 2 bit 6
.equ	GPIOR27	= 7	; General Purpose IO Register 2 bit 7

; GPIOR1 - General Purpose IO Register 1
.equ	GPIOR10	= 0	; General Purpose IO Register 1 bit 0
.equ	GPIOR11	= 1	; General Purpose IO Register 1 bit 1
.equ	GPIOR12	= 2	; General Purpose IO Register 1 bit 2
.equ	GPIOR13	= 3	; General Purpose IO Register 1 bit 3
.equ	GPIOR14	= 4	; General Purpose IO Register 1 bit 4
.equ	GPIOR15	= 5	; General Purpose IO Register 1 bit 5
.equ	GPIOR16	= 6	; General Purpose IO Register 1 bit 6
.equ	GPIOR17	= 7	; General Purpose IO Register 1 bit 7

; GPIOR0 - General Purpose IO Register 0
.equ	GPIOR00	= 0	; General Purpose IO Register 0 bit 0
.equ	GPIOR01	= 1	; General Purpose IO Register 0 bit 1
.equ	GPIOR02	= 2	; General Purpose IO Register 0 bit 2
.equ	GPIOR03	= 3	; General Purpose IO Register 0 bit 3
.equ	GPIOR04	= 4	; General Purpose IO Register 0 bit 4
.equ	GPIOR05	= 5	; General Purpose IO Register 0 bit 5
.equ	GPIOR06	= 6	; General Purpose IO Register 0 bit 6
.equ	GPIOR07	= 7	; General Purpose IO Register 0 bit 7


; ***** JTAG *************************
; OCDR - On-Chip Debug Related Register in I/O Memory
.equ	OCDR0	= 0	; On-Chip Debug Register Bit 0
.equ	OCDR1	= 1	; On-Chip Debug Register Bit 1
.equ	OCDR2	= 2	; On-Chip Debug Register Bit 2
.equ	OCDR3	= 3	; On-Chip Debug Register Bit 3
.equ	OCDR4	= 4	; On-Chip Debug Register Bit 4
.equ	OCDR5	= 5	; On-Chip Debug Register Bit 5
.equ	OCDR6	= 6	; On-Chip Debug Register Bit 6
.equ	OCDR7	= 7	; On-Chip Debug Register Bit 7
.equ	IDRD	= OCDR7	; For compatibility

; MCUCR - MCU Control Register
.equ	JTD	= 7	; JTAG Interface Disable

; MCUSR - MCU Status Register
;.equ	JTRF	= 4	; JTAG Reset Flag


; ***** LCD **************************
; LCDCRA - LCD Control Register A
.equ	LCDBL	= 0	; LCD Blanking
.equ	LCDIE	= 3	; LCD Interrupt Enable
.equ	LCDIF	= 4	; LCD Interrupt Flag
.equ	LCDAB	= 6	; LCD A or B waveform
.equ	LCDEN	= 7	; LCD Enable

; LCDCRB - LCD Control and Status Register B
.equ	LCDPM0	= 0	; LCD Port Mask 0
.equ	LCDPM1	= 1	; LCD Port Mask 1
.equ	LCDPM2	= 2	; LCD Port Mask 2
.equ	LCDPM3	= 3	; LCD Port Mask 3
.equ	LCDMUX0	= 4	; LCD Mux Select 0
.equ	LCDMUX1	= 5	; LCD Mux Select 1
.equ	LCD2B	= 6	; LCD 1/2 Bias Select
.equ	LCDCS	= 7	; LCD CLock Select

; LCDFRR - LCD Frame Rate Register
.equ	LCDCD0	= 0	; LCD Clock Divider 0
.equ	LCDCD1	= 1	; LCD Clock Divider 1
.equ	LCDCD2	= 2	; LCD Clock Divider 2
.equ	LCDPS0	= 4	; LCD Prescaler Select 0
.equ	LCDPS1	= 5	; LCD Prescaler Select 1
.equ	LCDPS2	= 6	; LCD Prescaler Select 2

; LCDCCR - LCD Contrast Control Register
.equ	LCDCC0	= 0	; LCD Contrast Control 0
.equ	LCDCC1	= 1	; LCD Contrast Control 1
.equ	LCDCC2	= 2	; LCD Contrast Control 2
.equ	LCDCC3	= 3	; LCD Contrast Control 3
.equ	LCDDC0	= 5	; 
.equ	LCDDC1	= 6	; 
.equ	LCDDC2	= 7	; 

; LCDDR18 - LCD Data Register 18
.equ	SEG324	= 0	; 

; LCDDR17 - LCD Data Register 17
.equ	SEG316	= 0	; 
.equ	SEG317	= 1	; 
.equ	SEG318	= 2	; 
.equ	SEG319	= 3	; 
.equ	SEG320	= 4	; 
.equ	SEG321	= 5	; 
.equ	SEG322	= 6	; 
.equ	SEG323	= 7	; 

; LCDDR16 - LCD Data Register 16
.equ	SEG308	= 0	; 
.equ	SEG309	= 1	; 
.equ	SEG310	= 2	; 
.equ	SEG311	= 3	; 
.equ	SEG312	= 4	; 
.equ	SEG313	= 5	; 
.equ	SEG314	= 6	; 
.equ	SEG315	= 7	; 

; LCDDR15 - LCD Data Register 15
.equ	SEG300	= 0	; 
.equ	SEG301	= 1	; 
.equ	SEG302	= 2	; 
.equ	SEG303	= 3	; 
.equ	SEG304	= 4	; 
.equ	SEG305	= 5	; 
.equ	SEG306	= 6	; 
.equ	SEG307	= 7	; 

; LCDDR13 - LCD Data Register 13
.equ	SEG224	= 0	; 

; LCDDR12 - LCD Data Register 12
.equ	SEG216	= 0	; 
.equ	SEG217	= 1	; 
.equ	SEG218	= 2	; 
.equ	SEG219	= 3	; 
.equ	SEG220	= 4	; 
.equ	SEG221	= 5	; 
.equ	SEG222	= 6	; 
.equ	SEG223	= 7	; 

; LCDDR11 - LCD Data Register 11
.equ	SEG208	= 0	; 
.equ	SEG209	= 1	; 
.equ	SEG210	= 2	; 
.equ	SEG211	= 3	; 
.equ	SEG212	= 4	; 
.equ	SEG213	= 5	; 
.equ	SEG214	= 6	; 
.equ	SEG215	= 7	; 

; LCDDR10 - LCD Data Register 10
.equ	SEG200	= 0	; 
.equ	SEG201	= 1	; 
.equ	SEG202	= 2	; 
.equ	SEG203	= 3	; 
.equ	SEG204	= 4	; 
.equ	SEG205	= 5	; 
.equ	SEG206	= 6	; 
.equ	SEG207	= 7	; 

; LCDDR8 - LCD Data Register 8
.equ	SEG124	= 0	; 

; LCDDR7 - LCD Data Register 7
.equ	SEG116	= 0	; 
.equ	SEG117	= 1	; 
.equ	SEG118	= 2	; 
.equ	SEG119	= 3	; 
.equ	SEG120	= 4	; 
.equ	SEG121	= 5	; 
.equ	SEG122	= 6	; 
.equ	SEG123	= 7	; 

; LCDDR6 - LCD Data Register 6
.equ	SEG108	= 0	; 
.equ	SEG109	= 1	; 
.equ	SEG110	= 2	; 
.equ	SEG111	= 3	; 
.equ	SEG112	= 4	; 
.equ	SEG113	= 5	; 
.equ	SEG114	= 6	; 
.equ	SEG115	= 7	; 

; LCDDR5 - LCD Data Register 5
.equ	SEG100	= 0	; 
.equ	SEG101	= 1	; 
.equ	SEG102	= 2	; 
.equ	SEG103	= 3	; 
.equ	SEG104	= 4	; 
.equ	SEG105	= 5	; 
.equ	SEG106	= 6	; 
.equ	SEG107	= 7	; 

; LCDDR3 - LCD Data Register 3
.equ	SEG024	= 0	; 

; LCDDR2 - LCD Data Register 2
.equ	SEG016	= 0	; 
.equ	SEG017	= 1	; 
.equ	SEG018	= 2	; 
.equ	SEG019	= 3	; 
.equ	SEG020	= 4	; 
.equ	SEG021	= 5	; 
.equ	SEG022	= 6	; 
.equ	SEG023	= 7	; 

; LCDDR1 - LCD Data Register 1
.equ	SEG008	= 0	; 
.equ	SEG009	= 1	; 
.equ	SEG010	= 2	; 
.equ	SEG011	= 3	; 
.equ	SEG012	= 4	; 
.equ	SEG013	= 5	; 
.equ	SEG014	= 6	; 
.equ	SEG015	= 7	; 

; LCDDR0 - LCD Data Register 0
.equ	SEG000	= 0	; 
.equ	SEG001	= 1	; 
.equ	SEG002	= 2	; 
.equ	SEG003	= 3	; 
.equ	SEG004	= 4	; 
.equ	SEG005	= 5	; 
.equ	SEG006	= 6	; 
.equ	SEG007	= 7	; 


; ***** EXTERNAL_INTERRUPT ***********
; EICRA - External Interrupt Control Register A
.equ	ISC00	= 0	; External Interrupt Sense Control 0 Bit 0
.equ	ISC01	= 1	; External Interrupt Sense Control 0 Bit 1

; EIMSK - External Interrupt Mask Register
.equ	INT0	= 0	; External Interrupt Request 0 Enable
.equ	PCIE0	= 4	; Pin Change Interrupt Enable 0
.equ	PCIE1	= 5	; Pin Change Interrupt Enable 1
.equ	PCIE2	= 6	; Pin Change Interrupt Enable 2
.equ	PCIE3	= 7	; Pin Change Interrupt Enable 3

; EIFR - External Interrupt Flag Register
.equ	INTF0	= 0	; External Interrupt Flag 0
.equ	PCIF0	= 4	; Pin Change Interrupt Flag 0
.equ	PCIF1	= 5	; Pin Change Interrupt Flag 1
.equ	PCIF2	= 6	; Pin Change Interrupt Flag 2
.equ	PCIF3	= 7	; Pin Change Interrupt Flag 3

; PCMSK1 - Pin Change Mask Register 1
.equ	PCINT8	= 0	; Pin Change Enable Mask 8
.equ	PCINT9	= 1	; Pin Change Enable Mask 9
.equ	PCINT10	= 2	; Pin Change Enable Mask 10
.equ	PCINT11	= 3	; Pin Change Enable Mask 11
.equ	PCINT12	= 4	; Pin Change Enable Mask 12
.equ	PCINT13	= 5	; Pin Change Enable Mask 13
.equ	PCINT14	= 6	; Pin Change Enable Mask 14
.equ	PCINT15	= 7	; Pin Change Enable Mask 15

; PCMSK0 - Pin Change Mask Register 0
.equ	PCINT0	= 0	; Pin Change Enable Mask 0
.equ	PCINT1	= 1	; Pin Change Enable Mask 1
.equ	PCINT2	= 2	; Pin Change Enable Mask 2
.equ	PCINT3	= 3	; Pin Change Enable Mask 3
.equ	PCINT4	= 4	; Pin Change Enable Mask 4
.equ	PCINT5	= 5	; Pin Change Enable Mask 5
.equ	PCINT6	= 6	; Pin Change Enable Mask 6
.equ	PCINT7	= 7	; Pin Change Enable Mask 7


; ***** EEPROM ***********************
; EEDR - EEPROM Data Register
.equ	EEDR0	= 0	; EEPROM Data Register bit 0
.equ	EEDR1	= 1	; EEPROM Data Register bit 1
.equ	EEDR2	= 2	; EEPROM Data Register bit 2
.equ	EEDR3	= 3	; EEPROM Data Register bit 3
.equ	EEDR4	= 4	; EEPROM Data Register bit 4
.equ	EEDR5	= 5	; EEPROM Data Register bit 5
.equ	EEDR6	= 6	; EEPROM Data Register bit 6
.equ	EEDR7	= 7	; EEPROM Data Register bit 7

; EECR - EEPROM Control Register
.equ	EERE	= 0	; EEPROM Read Enable
.equ	EEWE	= 1	; EEPROM Write Enable
.equ	EEMWE	= 2	; EEPROM Master Write Enable
.equ	EERIE	= 3	; EEPROM Ready Interrupt Enable


; ***** PORTA ************************
; PORTA - Port A Data Register
.equ	PORTA0	= 0	; Port A Data Register bit 0
.equ	PA0	= 0	; For compatibility
.equ	PORTA1	= 1	; Port A Data Register bit 1
.equ	PA1	= 1	; For compatibility
.equ	PORTA2	= 2	; Port A Data Register bit 2
.equ	PA2	= 2	; For compatibility
.equ	PORTA3	= 3	; Port A Data Register bit 3
.equ	PA3	= 3	; For compatibility
.equ	PORTA4	= 4	; Port A Data Register bit 4
.equ	PA4	= 4	; For compatibility
.equ	PORTA5	= 5	; Port A Data Register bit 5
.equ	PA5	= 5	; For compatibility
.equ	PORTA6	= 6	; Port A Data Register bit 6
.equ	PA6	= 6	; For compatibility
.equ	PORTA7	= 7	; Port A Data Register bit 7
.equ	PA7	= 7	; For compatibility

; DDRA - Port A Data Direction Register
.equ	DDA0	= 0	; Data Direction Register, Port A, bit 0
.equ	DDA1	= 1	; Data Direction Register, Port A, bit 1
.equ	DDA2	= 2	; Data Direction Register, Port A, bit 2
.equ	DDA3	= 3	; Data Direction Register, Port A, bit 3
.equ	DDA4	= 4	; Data Direction Register, Port A, bit 4
.equ	DDA5	= 5	; Data Direction Register, Port A, bit 5
.equ	DDA6	= 6	; Data Direction Register, Port A, bit 6
.equ	DDA7	= 7	; Data Direction Register, Port A, bit 7

; PINA - Port A Input Pins
.equ	PINA0	= 0	; Input Pins, Port A bit 0
.equ	PINA1	= 1	; Input Pins, Port A bit 1
.equ	PINA2	= 2	; Input Pins, Port A bit 2
.equ	PINA3	= 3	; Input Pins, Port A bit 3
.equ	PINA4	= 4	; Input Pins, Port A bit 4
.equ	PINA5	= 5	; Input Pins, Port A bit 5
.equ	PINA6	= 6	; Input Pins, Port A bit 6
.equ	PINA7	= 7	; Input Pins, Port A bit 7


; ***** PORTB ************************
; PORTB - Port B Data Register
.equ	PORTB0	= 0	; Port B Data Register bit 0
.equ	PB0	= 0	; For compatibility
.equ	PORTB1	= 1	; Port B Data Register bit 1
.equ	PB1	= 1	; For compatibility
.equ	PORTB2	= 2	; Port B Data Register bit 2
.equ	PB2	= 2	; For compatibility
.equ	PORTB3	= 3	; Port B Data Register bit 3
.equ	PB3	= 3	; For compatibility
.equ	PORTB4	= 4	; Port B Data Register bit 4
.equ	PB4	= 4	; For compatibility
.equ	PORTB5	= 5	; Port B Data Register bit 5
.equ	PB5	= 5	; For compatibility
.equ	PORTB6	= 6	; Port B Data Register bit 6
.equ	PB6	= 6	; For compatibility
.equ	PORTB7	= 7	; Port B Data Register bit 7
.equ	PB7	= 7	; For compatibility

; DDRB - Port B Data Direction Register
.equ	DDB0	= 0	; Port B Data Direction Register bit 0
.equ	DDB1	= 1	; Port B Data Direction Register bit 1
.equ	DDB2	= 2	; Port B Data Direction Register bit 2
.equ	DDB3	= 3	; Port B Data Direction Register bit 3
.equ	DDB4	= 4	; Port B Data Direction Register bit 4
.equ	DDB5	= 5	; Port B Data Direction Register bit 5
.equ	DDB6	= 6	; Port B Data Direction Register bit 6
.equ	DDB7	= 7	; Port B Data Direction Register bit 7

; PINB - Port B Input Pins
.equ	PINB0	= 0	; Port B Input Pins bit 0
.equ	PINB1	= 1	; Port B Input Pins bit 1
.equ	PINB2	= 2	; Port B Input Pins bit 2
.equ	PINB3	= 3	; Port B Input Pins bit 3
.equ	PINB4	= 4	; Port B Input Pins bit 4
.equ	PINB5	= 5	; Port B Input Pins bit 5
.equ	PINB6	= 6	; Port B Input Pins bit 6
.equ	PINB7	= 7	; Port B Input Pins bit 7


; ***** PORTC ************************
; PORTC - Port C Data Register
.equ	PORTC0	= 0	; Port C Data Register bit 0
.equ	PC0	= 0	; For compatibility
.equ	PORTC1	= 1	; Port C Data Register bit 1
.equ	PC1	= 1	; For compatibility
.equ	PORTC2	= 2	; Port C Data Register bit 2
.equ	PC2	= 2	; For compatibility
.equ	PORTC3	= 3	; Port C Data Register bit 3
.equ	PC3	= 3	; For compatibility
.equ	PORTC4	= 4	; Port C Data Register bit 4
.equ	PC4	= 4	; For compatibility
.equ	PORTC5	= 5	; Port C Data Register bit 5
.equ	PC5	= 5	; For compatibility
.equ	PORTC6	= 6	; Port C Data Register bit 6
.equ	PC6	= 6	; For compatibility
.equ	PORTC7	= 7	; Port C Data Register bit 7
.equ	PC7	= 7	; For compatibility

; DDRC - Port C Data Direction Register
.equ	DDC0	= 0	; Port C Data Direction Register bit 0
.equ	DDC1	= 1	; Port C Data Direction Register bit 1
.equ	DDC2	= 2	; Port C Data Direction Register bit 2
.equ	DDC3	= 3	; Port C Data Direction Register bit 3
.equ	DDC4	= 4	; Port C Data Direction Register bit 4
.equ	DDC5	= 5	; Port C Data Direction Register bit 5
.equ	DDC6	= 6	; Port C Data Direction Register bit 6
.equ	DDC7	= 7	; Port C Data Direction Register bit 7

; PINC - Port C Input Pins
.equ	PINC0	= 0	; Port C Input Pins bit 0
.equ	PINC1	= 1	; Port C Input Pins bit 1
.equ	PINC2	= 2	; Port C Input Pins bit 2
.equ	PINC3	= 3	; Port C Input Pins bit 3
.equ	PINC4	= 4	; Port C Input Pins bit 4
.equ	PINC5	= 5	; Port C Input Pins bit 5
.equ	PINC6	= 6	; Port C Input Pins bit 6
.equ	PINC7	= 7	; Port C Input Pins bit 7