📄 blizzard.c
字号:
t->we_cycle_time = t->we_off_time; t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div); if (t->re_cycle_time < t->re_off_time) t->re_cycle_time = t->re_off_time; t->cs_pulse_width = 0; dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n", t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time); dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n", t->we_on_time, t->we_off_time, t->re_cycle_time, t->we_cycle_time); dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n", t->access_time, t->cs_pulse_width); return blizzard.extif->convert_timings(t);}static int calc_lut_timing(unsigned long sysclk, int div){ struct extif_timings *t; unsigned long systim; /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns, * AccessTime 2 ns + 4 * SYSCLK + 26 (lut), * WEOffTime = WEOnTime + 1 ns, * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut), * CSOffTime = REOffTime + 1 ns * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut), * WriteCycle = 2*SYSCLK + 2 ns, * CSPulseWidth = 10 ns */ systim = 1000000000 / (sysclk / 1000); dev_dbg(blizzard.fbdev->dev, "Blizzard systim %lu ps extif_clk_period %u div %d\n", systim, blizzard.extif_clk_period, div); t = &blizzard.lut_timings; memset(t, 0, sizeof(*t)); t->clk_div = div; t->cs_on_time = 0; t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim + 26000, div); t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div); t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim + 26000, div); t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div); t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div); if (t->we_cycle_time < t->we_off_time) t->we_cycle_time = t->we_off_time; t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div); if (t->re_cycle_time < t->re_off_time) t->re_cycle_time = t->re_off_time; t->cs_pulse_width = 0; dev_dbg(blizzard.fbdev->dev, "[lut]cson %d csoff %d reon %d reoff %d\n", t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time); dev_dbg(blizzard.fbdev->dev, "[lut]weon %d weoff %d recyc %d wecyc %d\n", t->we_on_time, t->we_off_time, t->re_cycle_time, t->we_cycle_time); dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n", t->access_time, t->cs_pulse_width); return blizzard.extif->convert_timings(t);}static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div){ int max_clk_div; int div; blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div); for (div = 1; div <= max_clk_div; div++) { if (calc_reg_timing(sysclk, div) == 0) break; } if (div > max_clk_div) { dev_dbg(blizzard.fbdev->dev, "reg timing failed\n"); goto err; } *extif_mem_div = div; for (div = 1; div <= max_clk_div; div++) { if (calc_lut_timing(sysclk, div) == 0) break; } if (div > max_clk_div) goto err; blizzard.extif_clk_div = div; return 0;err: dev_err(blizzard.fbdev->dev, "can't setup timings\n"); return -1;}static void calc_blizzard_clk_rates(unsigned long ext_clk, unsigned long *sys_clk, unsigned long *pix_clk){ int pix_clk_src; int sys_div = 0, sys_mul = 0; int pix_div; pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC); pix_div = ((pix_clk_src >> 3) & 0x1f) + 1; if ((pix_clk_src & (0x3 << 1)) == 0) { /* Source is the PLL */ sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1; sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0); sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1) & 0x0f) << 11); *sys_clk = ext_clk * sys_mul / sys_div; } else /* else source is ext clk, or oscillator */ *sys_clk = ext_clk; *pix_clk = *sys_clk / pix_div; /* HZ */ dev_dbg(blizzard.fbdev->dev, "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n", ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul); dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n", *sys_clk, *pix_clk);}static int setup_tearsync(unsigned long pix_clk, int extif_div){ int hdisp, vdisp; int hndp, vndp; int hsw, vsw; int hs, vs; int hs_pol_inv, vs_pol_inv; int use_hsvs, use_ndp; u8 b; hsw = blizzard_read_reg(BLIZZARD_HSW); vsw = blizzard_read_reg(BLIZZARD_VSW); hs_pol_inv = !(hsw & 0x80); vs_pol_inv = !(vsw & 0x80); hsw = hsw & 0x7f; vsw = vsw & 0x3f; hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8; vdisp = blizzard_read_reg(BLIZZARD_VDISP0) + ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8); hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f; vndp = blizzard_read_reg(BLIZZARD_VNDP); /* time to transfer one pixel (16bpp) in ps */ blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time; if (blizzard.extif->get_max_tx_rate != NULL) { /* The external interface might have a rate limitation, * if so, we have to maximize our transfer rate. */ unsigned long min_tx_time; unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate(); dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n", max_tx_rate); min_tx_time = 1000000000 / (max_tx_rate / 1000); /* ps */ if (blizzard.pix_tx_time < min_tx_time) blizzard.pix_tx_time = min_tx_time; } /* time to update one line in ps */ blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000); blizzard.line_upd_time *= 1000; if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time) /* transfer speed too low, we might have to use both * HS and VS */ use_hsvs = 1; else /* decent transfer speed, we'll always use only VS */ use_hsvs = 0; if (use_hsvs && (hs_pol_inv || vs_pol_inv)) { /* HS or'ed with VS doesn't work, use the active high * TE signal based on HNDP / VNDP */ use_ndp = 1; hs_pol_inv = 0; vs_pol_inv = 0; hs = hndp; vs = vndp; } else { /* Use HS or'ed with VS as a TE signal if both are needed * or VNDP if only vsync is needed. */ use_ndp = 0; hs = hsw; vs = vsw; if (!use_hsvs) { hs_pol_inv = 0; vs_pol_inv = 0; } } hs = hs * 1000000 / (pix_clk / 1000); /* ps */ hs *= 1000; vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */ vs *= 1000; if (vs <= hs) return -EDOM; /* set VS to 120% of HS to minimize VS detection time */ vs = hs * 12 / 10; /* minimize HS too */ if (hs > 10000) hs = 10000; b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS); b &= ~0x3; b |= use_hsvs ? 1 : 0; b |= (use_ndp && use_hsvs) ? 0 : 2; blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b); blizzard.vsync_only = !use_hsvs; dev_dbg(blizzard.fbdev->dev, "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n", pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time); dev_dbg(blizzard.fbdev->dev, "hs %d ps vs %d ps mode %d vsync_only %d\n", hs, vs, b & 0x3, !use_hsvs); return blizzard.extif->setup_tearsync(1, hs, vs, hs_pol_inv, vs_pol_inv, extif_div);}static void blizzard_get_caps(int plane, struct omapfb_caps *caps){ blizzard.int_ctrl->get_caps(plane, caps); caps->ctrl |= OMAPFB_CAPS_MANUAL_UPDATE | OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE | OMAPFB_CAPS_WINDOW_SCALE | OMAPFB_CAPS_WINDOW_OVERLAY; if (blizzard.te_connected) caps->ctrl |= OMAPFB_CAPS_TEARSYNC; caps->wnd_color |= (1 << OMAPFB_COLOR_RGB565) | (1 << OMAPFB_COLOR_YUV420);}static void _save_regs(struct blizzard_reg_list *list, int cnt){ int i; for (i = 0; i < cnt; i++, list++) { int reg; for (reg = list->start; reg <= list->end; reg += 2) blizzard_reg_cache[reg / 2] = blizzard_read_reg(reg); }}static void _restore_regs(struct blizzard_reg_list *list, int cnt){ int i; for (i = 0; i < cnt; i++, list++) { int reg; for (reg = list->start; reg <= list->end; reg += 2) blizzard_write_reg(reg, blizzard_reg_cache[reg / 2]); }}static void blizzard_save_all_regs(void){ _save_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs)); _save_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));}static void blizzard_restore_pll_regs(void){ _restore_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));}static void blizzard_restore_gen_regs(void){ _restore_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));}static void blizzard_suspend(void){ u32 l; unsigned long tmo; if (blizzard.last_color_mode) { update_full_screen(); blizzard_sync(); } blizzard.update_mode_before_suspend = blizzard.update_mode; /* the following will disable clocks as well */ blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED); blizzard_save_all_regs(); blizzard_stop_sdram(); l = blizzard_read_reg(BLIZZARD_POWER_SAVE); /* Standby, Sleep. We assume we use an external clock. */ l |= 0x03; blizzard_write_reg(BLIZZARD_POWER_SAVE, l); tmo = jiffies + msecs_to_jiffies(100); while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) { if (time_after(jiffies, tmo)) { dev_err(blizzard.fbdev->dev, "s1d1374x: sleep timeout, stopping PLL manually\n"); l = blizzard_read_reg(BLIZZARD_PLL_MODE); l &= ~0x03; /* Disable PLL, counter function */ l |= 0x2; blizzard_write_reg(BLIZZARD_PLL_MODE, l); break; } msleep(1); } if (blizzard.power_down != NULL) blizzard.power_down(blizzard.fbdev->dev);}static void blizzard_resume(void){ u32 l; if (blizzard.power_up != NULL) blizzard.power_up(blizzard.fbdev->dev); l = blizzard_read_reg(BLIZZARD_POWER_SAVE); /* Standby, Sleep */ l &= ~0x03; blizzard_write_reg(BLIZZARD_POWER_SAVE, l); blizzard_restore_pll_regs(); l = blizzard_read_reg(BLIZZARD_PLL_MODE); l &= ~0x03; /* Enable PLL, counter function */ l |= 0x1; blizzard_write_reg(BLIZZARD_PLL_MODE, l); while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7))) msleep(1); blizzard_restart_sdram(); blizzard_restore_gen_regs(); /* Enable display */ blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01); /* the following will enable clocks as necessary */ blizzard_set_update_mode(blizzard.update_mode_before_suspend); /* Force a background update */ blizzard.zoom_on = 1; update_full_screen(); blizzard_sync();}static int blizzard_init(struct omapfb_device *fbdev, int ext_mode, struct omapfb_mem_desc *req_vram){ int r = 0, i; u8 rev, conf; unsigned long ext_clk; int extif_div; unsigned long sys_clk, pix_clk; struct omapfb_platform_data *omapfb_conf; struct blizzard_platform_data *ctrl_conf; blizzard.fbdev = fbdev; BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl); blizzard.fbdev = fbdev; blizzard.extif = fbdev->ext_if; blizzard.int_ctrl = fbdev->int_ctrl; omapfb_conf = fbdev->dev->platform_data; ctrl_conf = omapfb_conf->ctrl_platform_data; if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) { dev_err(fbdev->dev, "s1d1374x: missing platform data\n"); r = -ENOENT; goto err1; } blizzard.power_down = ctrl_conf->power_down; blizzard.power_up = ctrl_conf->power_up; spin_lock_init(&blizzard.req_lock); if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0) goto err1; if ((r = blizzard.extif->init(fbdev)) < 0) goto err2; blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key; blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key; blizzard_ctrl.setup_mem = blizzard.int_ctrl->setup_mem; blizzard_ctrl.mmap = blizzard.int_ctrl->mmap; ext_clk = ctrl_conf->get_clock_rate(fbdev->dev); if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0) goto err3; set_extif_timings(&blizzard.reg_timings); if (blizzard.power_up != NULL) blizzard.power_up(fbdev->dev); calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk); if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0) goto err3; set_extif_timings(&blizzard.reg_timings); if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) { dev_err(fbdev->dev, "controller not initialized by the bootloader\n"); r = -ENODEV; goto err3; } if (ctrl_conf->te_connected) { if ((r = setup_tearsync(pix_clk, extif_div)) < 0) goto err3; blizzard.te_connected = 1; } rev = blizzard_read_reg(BLIZZARD_REV_CODE); conf = blizzard_read_reg(BLIZZARD_CONFIG); switch (rev & 0xfc) { case 0x9c: blizzard.version = BLIZZARD_VERSION_S1D13744; pr_info("omapfb: s1d13744 LCD controller rev %d " "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); break; case 0xa4: blizzard.version = BLIZZARD_VERSION_S1D13745; pr_info("omapfb: s1d13745 LCD controller rev %d " "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); break; default: dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n", rev); r = -ENODEV; goto err3; } blizzard.max_transmit_size = blizzard.extif->max_transmit_size; blizzard.update_mode = OMAPFB_UPDATE_DISABLED; blizzard.auto_update_window.x = 0; blizzard.auto_update_window.y = 0; blizzard.auto_update_window.width = fbdev->panel->x_res; blizzard.auto_update_window.height = fbdev->panel->y_res; blizzard.auto_update_window.out_x = 0; blizzard.auto_update_window.out_x = 0; blizzard.auto_update_window.out_width = fbdev->panel->x_res; blizzard.auto_update_window.out_height = fbdev->panel->y_res; blizzard.auto_update_window.format = 0; blizzard.screen_width = fbdev->panel->x_res; blizzard.screen_height = fbdev->panel->y_res; init_timer(&blizzard.auto_update_timer); blizzard.auto_update_timer.function = blizzard_update_window_auto; blizzard.auto_update_timer.data = 0; INIT_LIST_HEAD(&blizzard.free_req_list); INIT_LIST_HEAD(&blizzard.pending_req_list); for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++) list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list); BUG_ON(i <= IRQ_REQ_POOL_SIZE); sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE); return 0;err3: if (blizzard.power_down != NULL) blizzard.power_down(fbdev->dev); blizzard.extif->cleanup();err2: blizzard.int_ctrl->cleanup();err1: return r;}static void blizzard_cleanup(void){ blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED); blizzard.extif->cleanup(); blizzard.int_ctrl->cleanup(); if (blizzard.power_down != NULL) blizzard.power_down(blizzard.fbdev->dev);}struct lcd_ctrl blizzard_ctrl = { .name = "blizzard", .init = blizzard_init, .cleanup = blizzard_cleanup, .bind_client = blizzard_bind_client, .get_caps = blizzard_get_caps, .set_update_mode = blizzard_set_update_mode, .get_update_mode = blizzard_get_update_mode, .setup_plane = blizzard_setup_plane, .set_scale = blizzard_set_scale, .enable_plane = blizzard_enable_plane, .update_window = blizzard_update_window_async, .sync = blizzard_sync, .suspend = blizzard_suspend, .resume = blizzard_resume,};
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -