asiliantfb.c

Linux环境下视频显示卡设备的驱动程序源代码

static int asiliantfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
			     u_int transp, struct fb_info *p)
{
	if (regno > 255)
		return 1;
	red >>= 8;
	green >>= 8;
	blue >>= 8;

        /* Set hardware palete */
	writeb(regno, mmio_base + 0x790);
	udelay(1);
	writeb(red, mmio_base + 0x791);
	writeb(green, mmio_base + 0x791);
	writeb(blue, mmio_base + 0x791);

	if (regno < 16) {
		switch(p->var.red.offset) {
		case 10: /* RGB 555 */
			((u32 *)(p->pseudo_palette))[regno] =
				((red & 0xf8) << 7) |
				((green & 0xf8) << 2) |
				((blue & 0xf8) >> 3);
			break;
		case 11: /* RGB 565 */
			((u32 *)(p->pseudo_palette))[regno] =
				((red & 0xf8) << 8) |
				((green & 0xfc) << 3) |
				((blue & 0xf8) >> 3);
			break;
		case 16: /* RGB 888 */
			((u32 *)(p->pseudo_palette))[regno] =
				(red << 16)  |
				(green << 8) |
				(blue);
			break;
		}
	}

	return 0;
}

struct chips_init_reg {
	unsigned char addr;
	unsigned char data;
};

static struct chips_init_reg chips_init_sr[] =
{
	{0x00, 0x03},		/* Reset register */
	{0x01, 0x01},		/* Clocking mode */
	{0x02, 0x0f},		/* Plane mask */
	{0x04, 0x0e}		/* Memory mode */
};

static struct chips_init_reg chips_init_gr[] =
{
        {0x03, 0x00},		/* Data rotate */
	{0x05, 0x00},		/* Graphics mode */
	{0x06, 0x01},		/* Miscellaneous */
	{0x08, 0x00}		/* Bit mask */
};

static struct chips_init_reg chips_init_ar[] =
{
	{0x10, 0x01},		/* Mode control */
	{0x11, 0x00},		/* Overscan */
	{0x12, 0x0f},		/* Memory plane enable */
	{0x13, 0x00}		/* Horizontal pixel panning */
};

static struct chips_init_reg chips_init_cr[] =
{
	{0x0c, 0x00},		/* Start address high */
	{0x0d, 0x00},		/* Start address low */
	{0x40, 0x00},		/* Extended Start Address */
	{0x41, 0x00},		/* Extended Start Address */
	{0x14, 0x00},		/* Underline location */
	{0x17, 0xe3},		/* CRT mode control */
	{0x70, 0x00}		/* Interlace control */
};


static struct chips_init_reg chips_init_fr[] =
{
	{0x01, 0x02},
	{0x03, 0x08},
	{0x08, 0xcc},
	{0x0a, 0x08},
	{0x18, 0x00},
	{0x1e, 0x80},
	{0x40, 0x83},
	{0x41, 0x00},
	{0x48, 0x13},
	{0x4d, 0x60},
	{0x4e, 0x0f},

	{0x0b, 0x01},

	{0x21, 0x51},
	{0x22, 0x1d},
	{0x23, 0x5f},
	{0x20, 0x4f},
	{0x34, 0x00},
	{0x24, 0x51},
	{0x25, 0x00},
	{0x27, 0x0b},
	{0x26, 0x00},
	{0x37, 0x80},
	{0x33, 0x0b},
	{0x35, 0x11},
	{0x36, 0x02},
	{0x31, 0xea},
	{0x32, 0x0c},
	{0x30, 0xdf},
	{0x10, 0x0c},
	{0x11, 0xe0},
	{0x12, 0x50},
	{0x13, 0x00},
	{0x16, 0x03},
	{0x17, 0xbd},
	{0x1a, 0x00},
};


static struct chips_init_reg chips_init_xr[] =
{
	{0xce, 0x00},		/* set default memory clock */
	{0xcc, 200 },	        /* MCLK ratio M */
	{0xcd, 18  },	        /* MCLK ratio N */
	{0xce, 0x90},		/* MCLK divisor = 2 */

	{0xc4, 209 },
	{0xc5, 118 },
	{0xc7, 32  },
	{0xcf, 0x06},
	{0x09, 0x01},		/* IO Control - CRT controller extensions */
	{0x0a, 0x02},		/* Frame buffer mapping */
	{0x0b, 0x01},		/* PCI burst write */
	{0x40, 0x03},		/* Memory access control */
	{0x80, 0x82},		/* Pixel pipeline configuration 0 */
	{0x81, 0x12},		/* Pixel pipeline configuration 1 */
	{0x82, 0x08},		/* Pixel pipeline configuration 2 */

	{0xd0, 0x0f},
	{0xd1, 0x01},
};

static void __devinit chips_hw_init(struct fb_info *p)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(chips_init_xr); ++i)
		write_xr(chips_init_xr[i].addr, chips_init_xr[i].data);
	write_xr(0x81, 0x12);
	write_xr(0x82, 0x08);
	write_xr(0x20, 0x00);
	for (i = 0; i < ARRAY_SIZE(chips_init_sr); ++i)
		write_sr(chips_init_sr[i].addr, chips_init_sr[i].data);
	for (i = 0; i < ARRAY_SIZE(chips_init_gr); ++i)
		write_gr(chips_init_gr[i].addr, chips_init_gr[i].data);
	for (i = 0; i < ARRAY_SIZE(chips_init_ar); ++i)
		write_ar(chips_init_ar[i].addr, chips_init_ar[i].data);
	/* Enable video output in attribute index register */
	writeb(0x20, mmio_base + 0x780);
	for (i = 0; i < ARRAY_SIZE(chips_init_cr); ++i)
		write_cr(chips_init_cr[i].addr, chips_init_cr[i].data);
	for (i = 0; i < ARRAY_SIZE(chips_init_fr); ++i)
		write_fr(chips_init_fr[i].addr, chips_init_fr[i].data);
}

static struct fb_fix_screeninfo asiliantfb_fix __devinitdata = {
	.id =		"Asiliant 69000",
	.type =		FB_TYPE_PACKED_PIXELS,
	.visual =	FB_VISUAL_PSEUDOCOLOR,
	.accel =	FB_ACCEL_NONE,
	.line_length =	640,
	.smem_len =	0x200000,	/* 2MB */
};

static struct fb_var_screeninfo asiliantfb_var __devinitdata = {
	.xres 		= 640,
	.yres 		= 480,
	.xres_virtual 	= 640,
	.yres_virtual 	= 480,
	.bits_per_pixel = 8,
	.red 		= { .length = 8 },
	.green 		= { .length = 8 },
	.blue 		= { .length = 8 },
	.height 	= -1,
	.width 		= -1,
	.vmode 		= FB_VMODE_NONINTERLACED,
	.pixclock 	= 39722,
	.left_margin 	= 48,
	.right_margin 	= 16,
	.upper_margin 	= 33,
	.lower_margin 	= 10,
	.hsync_len 	= 96,
	.vsync_len 	= 2,
};

static void __devinit init_asiliant(struct fb_info *p, unsigned long addr)
{
	p->fix			= asiliantfb_fix;
	p->fix.smem_start	= addr;
	p->var			= asiliantfb_var;
	p->fbops		= &asiliantfb_ops;
	p->flags		= FBINFO_DEFAULT;

	fb_alloc_cmap(&p->cmap, 256, 0);

	if (register_framebuffer(p) < 0) {
		printk(KERN_ERR "C&T 69000 framebuffer failed to register\n");
		return;
	}

	printk(KERN_INFO "fb%d: Asiliant 69000 frame buffer (%dK RAM detected)\n",
		p->node, p->fix.smem_len / 1024);

	writeb(0xff, mmio_base + 0x78c);
	chips_hw_init(p);
}

static int __devinit
asiliantfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent)
{
	unsigned long addr, size;
	struct fb_info *p;

	if ((dp->resource[0].flags & IORESOURCE_MEM) == 0)
		return -ENODEV;
	addr = pci_resource_start(dp, 0);
	size = pci_resource_len(dp, 0);
	if (addr == 0)
		return -ENODEV;
	if (!request_mem_region(addr, size, "asiliantfb"))
		return -EBUSY;

	p = framebuffer_alloc(sizeof(u32) * 16, &dp->dev);
	if (!p)	{
		release_mem_region(addr, size);
		return -ENOMEM;
	}
	p->pseudo_palette = p->par;
	p->par = NULL;

	p->screen_base = ioremap(addr, 0x800000);
	if (p->screen_base == NULL) {
		release_mem_region(addr, size);
		framebuffer_release(p);
		return -ENOMEM;
	}

	pci_write_config_dword(dp, 4, 0x02800083);
	writeb(3, p->screen_base + 0x400784);

	init_asiliant(p, addr);

	pci_set_drvdata(dp, p);
	return 0;
}

static void __devexit asiliantfb_remove(struct pci_dev *dp)
{
	struct fb_info *p = pci_get_drvdata(dp);

	unregister_framebuffer(p);
	iounmap(p->screen_base);
	release_mem_region(pci_resource_start(dp, 0), pci_resource_len(dp, 0));
	pci_set_drvdata(dp, NULL);
	framebuffer_release(p);
}

static struct pci_device_id asiliantfb_pci_tbl[] __devinitdata = {
	{ PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69000, PCI_ANY_ID, PCI_ANY_ID },
	{ 0 }
};

MODULE_DEVICE_TABLE(pci, asiliantfb_pci_tbl);

static struct pci_driver asiliantfb_driver = {
	.name =		"asiliantfb",
	.id_table =	asiliantfb_pci_tbl,
	.probe =	asiliantfb_pci_init,
	.remove =	__devexit_p(asiliantfb_remove),
};

static int __init asiliantfb_init(void)
{
	if (fb_get_options("asiliantfb", NULL))
		return -ENODEV;

	return pci_register_driver(&asiliantfb_driver);
}

module_init(asiliantfb_init);

static void __exit asiliantfb_exit(void)
{
	pci_unregister_driver(&asiliantfb_driver);
}

MODULE_LICENSE("GPL");